712   ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);  in LL_USART_SetTXFIFOThreshold()
731   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);  in LL_USART_GetTXFIFOThreshold()
751   ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);  in LL_USART_SetRXFIFOThreshold()
770   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);  in LL_USART_GetRXFIFOThreshold()
798   ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG,  in LL_USART_ConfigFIFOsThreshold()
1666   SET_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_EnableRTSHWFlowCtrl()
1679   CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);  in LL_USART_DisableRTSHWFlowCtrl()
1692   SET_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_EnableCTSHWFlowCtrl()
1705   CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);  in LL_USART_DisableCTSHWFlowCtrl()
1724   MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);  in LL_USART_SetHWFlowCtrl()
1742   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));  in LL_USART_GetHWFlowCtrl()
1753   SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_EnableOneBitSamp()
1764   CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);  in LL_USART_DisableOneBitSamp()
1775   return ((READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT)) ? 1UL : 0UL);  in LL_USART_IsEnabledOneBitSamp()
1786   CLEAR_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_EnableOverrunDetect()
1797   SET_BIT(USARTx->CR3, USART_CR3_OVRDIS);  in LL_USART_DisableOverrunDetect()
1808   return ((READ_BIT(USARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);  in LL_USART_IsEnabledOverrunDetect()
1825   MODIFY_REG(USARTx->CR3, USART_CR3_WUS, Type);  in LL_USART_SetWKUPType()
1841   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_WUS));  in LL_USART_GetWKUPType()
2022   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_EnableIrda()
2035   CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_DisableIrda()
2048   return ((READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN)) ? 1UL : 0UL);  in LL_USART_IsEnabledIrda()
2064   MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);  in LL_USART_SetIrdaPowerMode()
2079   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));  in LL_USART_GetIrdaPowerMode()
2129   SET_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_EnableSmartcardNACK()
2142   CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);  in LL_USART_DisableSmartcardNACK()
2155   return ((READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcardNACK()
2168   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_EnableSmartcard()
2181   CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_DisableSmartcard()
2194   return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);  in LL_USART_IsEnabledSmartcard()
2213   MODIFY_REG(USARTx->CR3, USART_CR3_SCARCNT, AutoRetryCount << USART_CR3_SCARCNT_Pos);  in LL_USART_SetSmartcardAutoRetryCount()
2226   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);  in LL_USART_GetSmartcardAutoRetryCount()
2305   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_EnableHalfDuplex()
2318   CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_DisableHalfDuplex()
2331   return ((READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);  in LL_USART_IsEnabledHalfDuplex()
2572   SET_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_EnableDEMode()
2585   CLEAR_BIT(USARTx->CR3, USART_CR3_DEM);  in LL_USART_DisableDEMode()
2598   return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);  in LL_USART_IsEnabledDEMode()
2614   MODIFY_REG(USARTx->CR3, USART_CR3_DEP, Polarity);  in LL_USART_SetDESignalPolarity()
2629   return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_DEP));  in LL_USART_GetDESignalPolarity()
2671   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigAsyncMode()
2707   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSyncMode()
2747   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigLINMode()
2785   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));  in LL_USART_ConfigHalfDuplexMode()
2787   SET_BIT(USARTx->CR3, USART_CR3_HDSEL);  in LL_USART_ConfigHalfDuplexMode()
2825   CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));  in LL_USART_ConfigSmartcardMode()
2830   SET_BIT(USARTx->CR3, USART_CR3_SCEN);  in LL_USART_ConfigSmartcardMode()
2868   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));  in LL_USART_ConfigIrdaMode()
2870   SET_BIT(USARTx->CR3, USART_CR3_IREN);  in LL_USART_ConfigIrdaMode()
2906   CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));  in LL_USART_ConfigMultiProcessMode()
3593   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_EnableIT_ERROR()
3606   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_EnableIT_CTS()
3619   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_EnableIT_WKUP()
3632   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TXFTIE);  in LL_USART_EnableIT_TXFT()
3645   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_EnableIT_TCBGT()
3658   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_RXFTIE);  in LL_USART_EnableIT_RXFT()
3812   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);  in LL_USART_DisableIT_ERROR()
3825   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);  in LL_USART_DisableIT_CTS()
3838   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE);  in LL_USART_DisableIT_WKUP()
3851   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE);  in LL_USART_DisableIT_TXFT()
3864   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);  in LL_USART_DisableIT_TCBGT()
3877   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE);  in LL_USART_DisableIT_RXFT()
4027   return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_ERROR()
4040   return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_CTS()
4053   return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_WKUP()
4066   return ((READ_BIT(USARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_TXFT()
4079   return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_TCBGT()
4092   return ((READ_BIT(USARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);  in LL_USART_IsEnabledIT_RXFT()
4111   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_EnableDMAReq_RX()
4122   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);  in LL_USART_DisableDMAReq_RX()
4133   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_RX()
4144   ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_EnableDMAReq_TX()
4155   ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);  in LL_USART_DisableDMAReq_TX()
4166   return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMAReq_TX()
4177   SET_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_EnableDMADeactOnRxErr()
4188   CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);  in LL_USART_DisableDMADeactOnRxErr()
4199   return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);  in LL_USART_IsEnabledDMADeactOnRxErr()