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/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_tim.h1851 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
1852 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP1) || \
1853 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP2) || \
1854 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP3) || \
1855 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP4) || \
1856 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP5) || \
1857 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP6) || \
1858 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP7) || \
1859 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
1861 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
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/hal_stm32-3.5.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_tim.h1826 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
1827 ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \
1828 ((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR))
1830 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
1831 ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR))
1885 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1886 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1887 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1888 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1889 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
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/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_adc_ex.h277 #define IS_ADC_MODE(__MODE__) (((__MODE__) == ADC_MODE_INDEPENDENT) || \ argument
278 ((__MODE__) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
279 ((__MODE__) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
280 ((__MODE__) == ADC_DUALMODE_INJECSIMULT) || \
281 ((__MODE__) == ADC_DUALMODE_REGSIMULT) || \
282 ((__MODE__) == ADC_DUALMODE_INTERL) || \
283 ((__MODE__) == ADC_DUALMODE_ALTERTRIG) || \
284 ((__MODE__) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
285 ((__MODE__) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
286 ((__MODE__) == ADC_TRIPLEMODE_INJECSIMULT) || \
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Dstm32f7xx_hal_tim.h1744 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
1745 ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR))
1799 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1800 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1801 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1802 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1803 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1805 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
1806 ((__MODE__) == TIM_UIFREMAP_ENABLE))
1846 #define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ argument
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/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_tim.h1843 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
1844 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP1) || \
1845 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP2) || \
1846 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
1878 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1879 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1880 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1881 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1882 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1884 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_tim.h1847 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
1848 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP1) || \
1849 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP2) || \
1850 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
1882 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1883 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1884 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1885 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1886 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1888 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_tim.h1780 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
1781 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP1) || \
1782 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP2) || \
1783 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP3) || \
1784 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
1786 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
1787 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP1) || \
1788 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP2) || \
1789 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
1791 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
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/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_tim.h1851 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
1852 ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \
1853 ((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR))
1884 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1885 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1886 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1887 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1888 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1890 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
1891 ((__MODE__) == TIM_UIFREMAP_ENABLE))
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Dstm32h5xx_hal_i2s.h585 #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) … argument
586 … ((__MODE__) == I2S_MODE_SLAVE_RX) || \
587 … ((__MODE__) == I2S_MODE_MASTER_TX) || \
588 … ((__MODE__) == I2S_MODE_MASTER_RX) || \
589 … ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX) || \
590 ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX))
592 #define IS_I2S_MASTER(__MODE__) (((__MODE__) == I2S_MODE_MASTER_TX) … argument
593 … ((__MODE__) == I2S_MODE_MASTER_RX) || \
594 ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX))
596 #define IS_I2S_SLAVE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) … argument
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Dstm32h5xx_hal_adc_ex.h961 #define IS_ADC_MULTIMODE(__MODE__) (((__MODE__) == ADC_MODE_INDEPENDENT) || \ argument
962 ((__MODE__) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
963 ((__MODE__) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
964 ((__MODE__) == ADC_DUALMODE_REGINTERL_INJECSIMULT) || \
965 ((__MODE__) == ADC_DUALMODE_INJECSIMULT) || \
966 ((__MODE__) == ADC_DUALMODE_REGSIMULT) || \
967 ((__MODE__) == ADC_DUALMODE_INTERL) || \
968 ((__MODE__) == ADC_DUALMODE_ALTERTRIG) )
975 #define IS_ADC_DMA_ACCESS_MULTIMODE(__MODE__) (((__MODE__) == ADC_DMAACCESSMODE_DISABLED) || \ argument
976 ((__MODE__) == ADC_DMAACCESSMODE_12_10_BITS) || \
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/hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_tim.h1766 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
1767 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP1) || \
1768 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP2) || \
1769 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
1798 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1799 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1800 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1801 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1802 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1804 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_tim.h1743 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
1744 ((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \
1745 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
1774 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1775 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1776 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1777 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1778 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1780 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
1781 ((__MODE__) == TIM_UIFREMAP_ENABLE))
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Dstm32l4xx_hal_gpio.h243 #define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\ argument
244 ((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\
245 ((__MODE__) == GPIO_MODE_OUTPUT_OD) ||\
246 ((__MODE__) == GPIO_MODE_AF_PP) ||\
247 ((__MODE__) == GPIO_MODE_AF_OD) ||\
248 ((__MODE__) == GPIO_MODE_IT_RISING) ||\
249 ((__MODE__) == GPIO_MODE_IT_FALLING) ||\
250 ((__MODE__) == GPIO_MODE_IT_RISING_FALLING) ||\
251 ((__MODE__) == GPIO_MODE_EVT_RISING) ||\
252 ((__MODE__) == GPIO_MODE_EVT_FALLING) ||\
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/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_tim.h1764 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
1765 ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR))
1794 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1795 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1796 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1797 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1798 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1800 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
1801 ((__MODE__) == TIM_UIFREMAP_ENABLE))
1841 #define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ argument
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Dstm32l5xx_hal_adc_ex.h920 #define IS_ADC_MULTIMODE(__MODE__) (((__MODE__) == ADC_MODE_INDEPENDENT) || \ argument
921 ((__MODE__) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
922 ((__MODE__) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
923 ((__MODE__) == ADC_DUALMODE_REGINTERL_INJECSIMULT) || \
924 ((__MODE__) == ADC_DUALMODE_INJECSIMULT) || \
925 ((__MODE__) == ADC_DUALMODE_REGSIMULT) || \
926 ((__MODE__) == ADC_DUALMODE_INTERL) || \
927 ((__MODE__) == ADC_DUALMODE_ALTERTRIG) )
934 #define IS_ADC_DMA_ACCESS_MULTIMODE(__MODE__) (((__MODE__) == ADC_DMAACCESSMODE_DISABLED) || \ argument
935 ((__MODE__) == ADC_DMAACCESSMODE_12_10_BITS) || \
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/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_tim.h1646 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
1647 ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR))
1675 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1676 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1677 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1678 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1679 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1716 #define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ argument
1717 ((__MODE__) == TIM_OPMODE_REPETITIVE))
1719 #define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) || \ argument
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_tim.h1766 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
1767 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP1) || \
1768 ((__MODE__) == TIM_CLEARINPUTSOURCE_COMP2) || \
1769 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
1798 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1799 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1800 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1801 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1802 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1804 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
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/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_i2s.h594 #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) … argument
595 … ((__MODE__) == I2S_MODE_SLAVE_RX) || \
596 … ((__MODE__) == I2S_MODE_MASTER_TX) || \
597 … ((__MODE__) == I2S_MODE_MASTER_RX) || \
598 … ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX) || \
599 ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX))
601 #define IS_I2S_MASTER(__MODE__) (((__MODE__) == I2S_MODE_MASTER_TX) … argument
602 … ((__MODE__) == I2S_MODE_MASTER_RX) || \
603 ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX))
605 #define IS_I2S_SLAVE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) … argument
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Dstm32h7xx_hal_tim.h1789 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
1790 ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR))
1820 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1821 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1822 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1823 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1824 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1826 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
1827 ((__MODE__) == TIM_UIFREMAP_ENABLE))
1867 #define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ argument
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/hal_stm32-3.5.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_tim.h1770 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ argument
1771 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
1800 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1801 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1802 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1803 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1804 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1806 #define IS_TIM_UIFREMAP_MODE(__MODE__) (((__MODE__) == TIM_UIFREMAP_DISABLE) || \ argument
1807 ((__MODE__) == TIM_UIFREMAP_ENABLE))
1851 #define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ argument
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Dstm32c0xx_hal_gpio.h271 #define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\ argument
272 ((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\
273 ((__MODE__) == GPIO_MODE_OUTPUT_OD) ||\
274 ((__MODE__) == GPIO_MODE_AF_PP) ||\
275 ((__MODE__) == GPIO_MODE_AF_OD) ||\
276 ((__MODE__) == GPIO_MODE_IT_RISING) ||\
277 ((__MODE__) == GPIO_MODE_IT_FALLING) ||\
278 ((__MODE__) == GPIO_MODE_IT_RISING_FALLING) ||\
279 ((__MODE__) == GPIO_MODE_EVT_RISING) ||\
280 ((__MODE__) == GPIO_MODE_EVT_FALLING) ||\
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/hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_tim.h1337 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
1338 ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \
1339 ((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR))
1361 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1362 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1363 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1364 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1365 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1396 #define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ argument
1397 ((__MODE__) == TIM_OPMODE_REPETITIVE))
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Dstm32l1xx_hal_spi.h535 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \ argument
536 ((__MODE__) == SPI_MODE_MASTER))
543 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ argument
544 ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
545 ((__MODE__) == SPI_DIRECTION_1LINE))
551 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES) argument
557 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \ argument
558 ((__MODE__) == SPI_DIRECTION_1LINE))
621 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \ argument
622 ((__MODE__) == SPI_TIMODE_ENABLE))
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/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_tim.h1336 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ argument
1337 ((__MODE__) == TIM_CLEARINPUTSOURCE_ETR))
1359 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ argument
1360 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
1361 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
1362 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
1363 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
1394 #define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ argument
1395 ((__MODE__) == TIM_OPMODE_REPETITIVE))
1397 #define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) || \ argument
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Dstm32l0xx_hal_gpio.h158 #define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\ argument
159 ((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\
160 ((__MODE__) == GPIO_MODE_OUTPUT_OD) ||\
161 ((__MODE__) == GPIO_MODE_AF_PP) ||\
162 ((__MODE__) == GPIO_MODE_AF_OD) ||\
163 ((__MODE__) == GPIO_MODE_IT_RISING) ||\
164 ((__MODE__) == GPIO_MODE_IT_FALLING) ||\
165 ((__MODE__) == GPIO_MODE_IT_RISING_FALLING) ||\
166 ((__MODE__) == GPIO_MODE_EVT_RISING) ||\
167 ((__MODE__) == GPIO_MODE_EVT_FALLING) ||\
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