1 /** 2 ****************************************************************************** 3 * @file stm32h7xx_hal_i2s.h 4 * @author MCD Application Team 5 * @brief Header file of I2S HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32H7xx_HAL_I2S_H 21 #define STM32H7xx_HAL_I2S_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32h7xx_hal_def.h" 29 30 /** @addtogroup STM32H7xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup I2S 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup I2S_Exported_Types I2S Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief I2S Init structure definition 45 */ 46 typedef struct 47 { 48 uint32_t Mode; /*!< Specifies the I2S operating mode. 49 This parameter can be a value of @ref I2S_Mode */ 50 51 uint32_t Standard; /*!< Specifies the standard used for the I2S communication. 52 This parameter can be a value of @ref I2S_Standard */ 53 54 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. 55 This parameter can be a value of @ref I2S_Data_Format */ 56 57 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. 58 This parameter can be a value of @ref I2S_MCLK_Output */ 59 60 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. 61 This parameter can be a value of @ref I2S_Audio_Frequency */ 62 63 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. 64 This parameter can be a value of @ref I2S_Clock_Polarity */ 65 66 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 67 This parameter can be a value of @ref I2S_MSB_LSB_Transmission */ 68 69 uint32_t WSInversion; /*!< Control the Word Select Inversion. 70 This parameter can be a value of @ref I2S_WSInversion */ 71 72 uint32_t Data24BitAlignment; /*!< Specifies the Data Padding for 24 bits data length 73 This parameter can be a value of @ref I2S_Data_24Bit_Alignment */ 74 75 uint32_t MasterKeepIOState; /*!< Control of Alternate function GPIOs state 76 This parameter can be a value of @ref I2S_Master_Keep_IO_State */ 77 78 } I2S_InitTypeDef; 79 80 /** 81 * @brief HAL State structures definition 82 */ 83 typedef enum 84 { 85 HAL_I2S_STATE_RESET = 0x00UL, /*!< I2S not yet initialized or disabled */ 86 HAL_I2S_STATE_READY = 0x01UL, /*!< I2S initialized and ready for use */ 87 HAL_I2S_STATE_BUSY = 0x02UL, /*!< I2S internal process is ongoing */ 88 HAL_I2S_STATE_BUSY_TX = 0x03UL, /*!< Data Transmission process is ongoing */ 89 HAL_I2S_STATE_BUSY_RX = 0x04UL, /*!< Data Reception process is ongoing */ 90 HAL_I2S_STATE_BUSY_TX_RX = 0x05UL, /*!< Data Transmission and Reception process is ongoing */ 91 HAL_I2S_STATE_TIMEOUT = 0x06UL, /*!< I2S timeout state */ 92 HAL_I2S_STATE_ERROR = 0x07UL /*!< I2S error state */ 93 } HAL_I2S_StateTypeDef; 94 95 /** 96 * @brief I2S handle Structure definition 97 */ 98 typedef struct __I2S_HandleTypeDef 99 { 100 SPI_TypeDef *Instance; /*!< I2S registers base address */ 101 102 I2S_InitTypeDef Init; /*!< I2S communication parameters */ 103 104 const uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ 105 106 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ 107 108 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ 109 110 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ 111 112 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ 113 114 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter 115 (This field is initialized at the 116 same value as transfer size at the 117 beginning of the transfer and 118 decremented when a sample is received 119 NbSamplesReceived = RxBufferSize-RxBufferCount) */ 120 121 void (*RxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Rx ISR */ 122 123 void (*TxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Tx ISR */ 124 125 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ 126 127 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ 128 129 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ 130 131 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ 132 133 __IO uint32_t ErrorCode; /*!< I2S Error code 134 This parameter can be a value of @ref I2S_Error */ 135 136 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) 137 void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */ 138 void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */ 139 void (* TxRxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Completed callback */ 140 void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */ 141 void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */ 142 void (* TxRxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Half Completed callback */ 143 void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */ 144 void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */ 145 void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */ 146 147 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 148 } I2S_HandleTypeDef; 149 150 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL) 151 /** 152 153 * @brief HAL I2S Callback ID enumeration definition 154 */ 155 typedef enum 156 { 157 HAL_I2S_TX_COMPLETE_CB_ID = 0x00UL, /*!< I2S Tx Completed callback ID */ 158 HAL_I2S_RX_COMPLETE_CB_ID = 0x01UL, /*!< I2S Rx Completed callback ID */ 159 HAL_I2S_TX_RX_COMPLETE_CB_ID = 0x02UL, /*!< I2S TxRx Completed callback ID */ 160 HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03UL, /*!< I2S Tx Half Completed callback ID */ 161 HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04UL, /*!< I2S Rx Half Completed callback ID */ 162 HAL_I2S_TX_RX_HALF_COMPLETE_CB_ID = 0x05UL, /*!< I2S TxRx Half Completed callback ID */ 163 HAL_I2S_ERROR_CB_ID = 0x06UL, /*!< I2S Error callback ID */ 164 HAL_I2S_MSPINIT_CB_ID = 0x07UL, /*!< I2S Msp Init callback ID */ 165 HAL_I2S_MSPDEINIT_CB_ID = 0x08UL /*!< I2S Msp DeInit callback ID */ 166 167 } HAL_I2S_CallbackIDTypeDef; 168 169 /** 170 * @brief HAL I2S Callback pointer definition 171 */ 172 typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */ 173 174 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 175 /** 176 * @} 177 */ 178 179 /* Exported constants --------------------------------------------------------*/ 180 /** @defgroup I2S_Exported_Constants I2S Exported Constants 181 * @{ 182 */ 183 /** @defgroup I2S_Error I2S Error 184 * @{ 185 */ 186 #define HAL_I2S_ERROR_NONE (0x00000000UL) /*!< No error */ 187 #define HAL_I2S_ERROR_TIMEOUT (0x00000001UL) /*!< Timeout error */ 188 #define HAL_I2S_ERROR_OVR (0x00000002UL) /*!< OVR error */ 189 #define HAL_I2S_ERROR_UDR (0x00000004UL) /*!< UDR error */ 190 #define HAL_I2S_ERROR_DMA (0x00000008UL) /*!< DMA transfer error */ 191 #define HAL_I2S_ERROR_PRESCALER (0x00000010UL) /*!< Prescaler Calculation error */ 192 #define HAL_I2S_ERROR_FRE (0x00000020UL) /*!< FRE error */ 193 #define HAL_I2S_ERROR_NO_OGT (0x00000040UL) /*!< No On Going Transfer error */ 194 #define HAL_I2S_ERROR_NOT_SUPPORTED (0x00000080UL) /*!< Requested operation not supported */ 195 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL) 196 #define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000100UL) /*!< Invalid Callback error */ 197 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 198 /** 199 * @} 200 */ 201 202 /** @defgroup I2S_Mode I2S Mode 203 * @{ 204 */ 205 #define I2S_MODE_SLAVE_TX (0x00000000UL) 206 #define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0) 207 #define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1) 208 #define I2S_MODE_MASTER_RX (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1) 209 #define I2S_MODE_SLAVE_FULLDUPLEX (SPI_I2SCFGR_I2SCFG_2) 210 #define I2S_MODE_MASTER_FULLDUPLEX (SPI_I2SCFGR_I2SCFG_2 | SPI_I2SCFGR_I2SCFG_0) 211 /** 212 * @} 213 */ 214 215 /** @defgroup I2S_Standard I2S Standard 216 * @{ 217 */ 218 #define I2S_STANDARD_PHILIPS (0x00000000UL) 219 #define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0) 220 #define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1) 221 #define I2S_STANDARD_PCM_SHORT (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1) 222 #define I2S_STANDARD_PCM_LONG (SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC) 223 /** 224 * @} 225 */ 226 227 /** @defgroup I2S_Data_Format I2S Data Format 228 * @{ 229 */ 230 #define I2S_DATAFORMAT_16B (0x00000000UL) 231 #define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN) 232 #define I2S_DATAFORMAT_24B (SPI_I2SCFGR_DATLEN_0) 233 #define I2S_DATAFORMAT_32B (SPI_I2SCFGR_DATLEN_1) 234 /** 235 * @} 236 */ 237 238 /** @defgroup I2S_MCLK_Output I2S MCLK Output 239 * @{ 240 */ 241 #define I2S_MCLKOUTPUT_ENABLE (SPI_I2SCFGR_MCKOE) 242 #define I2S_MCLKOUTPUT_DISABLE (0x00000000UL) 243 /** 244 * @} 245 */ 246 247 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency 248 * @{ 249 */ 250 #define I2S_AUDIOFREQ_192K (192000UL) 251 #define I2S_AUDIOFREQ_96K (96000UL) 252 #define I2S_AUDIOFREQ_48K (48000UL) 253 #define I2S_AUDIOFREQ_44K (44100UL) 254 #define I2S_AUDIOFREQ_32K (32000UL) 255 #define I2S_AUDIOFREQ_22K (22050UL) 256 #define I2S_AUDIOFREQ_16K (16000UL) 257 #define I2S_AUDIOFREQ_11K (11025UL) 258 #define I2S_AUDIOFREQ_8K (8000UL) 259 #define I2S_AUDIOFREQ_DEFAULT (2UL) 260 /** 261 * @} 262 */ 263 264 /** @defgroup I2S_Clock_Polarity I2S FullDuplex Mode 265 * @{ 266 */ 267 #define I2S_CPOL_LOW (0x00000000UL) 268 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL) 269 /** 270 * @} 271 */ 272 273 /** @defgroup I2S_MSB_LSB_Transmission I2S MSB LSB Transmission 274 * @{ 275 */ 276 #define I2S_FIRSTBIT_MSB (0x00000000UL) 277 #define I2S_FIRSTBIT_LSB SPI_CFG2_LSBFRST 278 /** 279 * @} 280 */ 281 282 /** @defgroup I2S_WSInversion I2S Word Select Inversion 283 * @{ 284 */ 285 #define I2S_WS_INVERSION_DISABLE (0x00000000UL) 286 #define I2S_WS_INVERSION_ENABLE SPI_I2SCFGR_WSINV 287 /** 288 * @} 289 */ 290 291 /** @defgroup I2S_Data_24Bit_Alignment Data Padding 24Bit 292 * @{ 293 */ 294 #define I2S_DATA_24BIT_ALIGNMENT_RIGHT (0x00000000UL) 295 #define I2S_DATA_24BIT_ALIGNMENT_LEFT SPI_I2SCFGR_DATFMT 296 /** 297 * @} 298 */ 299 300 /** @defgroup I2S_Master_Keep_IO_State Keep IO State 301 * @{ 302 */ 303 #define I2S_MASTER_KEEP_IO_STATE_DISABLE (0x00000000U) 304 #define I2S_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR 305 /** 306 * @} 307 */ 308 309 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition 310 * @{ 311 */ 312 #define I2S_IT_RXP SPI_IER_RXPIE 313 #define I2S_IT_TXP SPI_IER_TXPIE 314 #define I2S_IT_DXP SPI_IER_DXPIE 315 #define I2S_IT_UDR SPI_IER_UDRIE 316 #define I2S_IT_OVR SPI_IER_OVRIE 317 #define I2S_IT_FRE SPI_IER_TIFREIE 318 #define I2S_IT_ERR (SPI_IER_UDRIE | SPI_IER_OVRIE | SPI_IER_TIFREIE) 319 /** 320 * @} 321 */ 322 323 /** @defgroup I2S_Flags_Definition I2S Flags Definition 324 * @{ 325 */ 326 #define I2S_FLAG_RXP SPI_SR_RXP /* I2S status flag : Rx-Packet available flag */ 327 #define I2S_FLAG_TXP SPI_SR_TXP /* I2S status flag : Tx-Packet space available flag */ 328 #define I2S_FLAG_DXP SPI_SR_DXP /* I2S status flag : Dx-Packet space available flag */ 329 #define I2S_FLAG_UDR SPI_SR_UDR /* I2S Error flag : Underrun flag */ 330 #define I2S_FLAG_OVR SPI_SR_OVR /* I2S Error flag : Overrun flag */ 331 #define I2S_FLAG_FRE SPI_SR_TIFRE /* I2S Error flag : TI mode frame format error flag */ 332 333 #define I2S_FLAG_MASK (SPI_SR_RXP | SPI_SR_TXP | SPI_SR_DXP |SPI_SR_UDR | SPI_SR_OVR | SPI_SR_TIFRE) 334 /** 335 * @} 336 */ 337 338 /** 339 * @} 340 */ 341 342 /* Exported macros -----------------------------------------------------------*/ 343 /** @defgroup I2S_Exported_macros I2S Exported Macros 344 * @{ 345 */ 346 347 /** @brief Reset I2S handle state 348 * @param __HANDLE__ specifies the I2S Handle. 349 * @retval None 350 */ 351 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL) 352 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \ 353 (__HANDLE__)->State = HAL_I2S_STATE_RESET; \ 354 (__HANDLE__)->MspInitCallback = NULL; \ 355 (__HANDLE__)->MspDeInitCallback = NULL; \ 356 } while(0) 357 #else 358 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) 359 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 360 361 /** @brief Enable the specified SPI peripheral (in I2S mode). 362 * @param __HANDLE__ specifies the I2S Handle. 363 * @retval None 364 */ 365 #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)) 366 367 /** @brief Disable the specified SPI peripheral (in I2S mode). 368 * @param __HANDLE__ specifies the I2S Handle. 369 * @retval None 370 */ 371 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)) 372 373 /** @brief Enable the specified I2S interrupts. 374 * @param __HANDLE__ specifies the I2S Handle. 375 * This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral. 376 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 377 * This parameter can be one of the following values: 378 * @arg I2S_IT_RXP : Rx-Packet available interrupt 379 * @arg I2S_IT_TXP : Tx-Packet space available interrupt 380 * @arg I2S_IT_UDR : Underrun interrupt 381 * @arg I2S_IT_OVR : Overrun interrupt 382 * @arg I2S_IT_FRE : TI mode frame format error interrupt 383 * @arg I2S_IT_ERR : Error interrupt enable 384 * @retval None 385 */ 386 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 387 388 /** @brief Disable the specified I2S interrupts. 389 * @param __HANDLE__ specifies the I2S Handle. 390 * This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral. 391 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 392 * This parameter can be one of the following values: 393 * @arg I2S_IT_RXP : Rx-Packet available interrupt 394 * @arg I2S_IT_TXP : Tx-Packet space available interrupt 395 * @arg I2S_IT_UDR : Underrun interrupt 396 * @arg I2S_IT_OVR : Overrun interrupt 397 * @arg I2S_IT_FRE : TI mode frame format error interrupt 398 * @arg I2S_IT_ERR : Error interrupt enable 399 * @retval None 400 */ 401 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) 402 403 /** @brief Check if the specified I2S interrupt source is enabled or disabled. 404 * @param __HANDLE__ specifies the I2S Handle. 405 * This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral. 406 * @param __INTERRUPT__ specifies the I2S interrupt source to check. 407 * This parameter can be one of the following values: 408 * @arg I2S_IT_RXP : Rx-Packet available interrupt 409 * @arg I2S_IT_TXP : Tx-Packet space available interrupt 410 * @arg I2S_IT_DXP : Tx-Packet space available interrupt 411 * @arg I2S_IT_UDR : Underrun interrupt 412 * @arg I2S_IT_OVR : Overrun interrupt 413 * @arg I2S_IT_FRE : TI mode frame format error interrupt 414 * @arg I2S_IT_ERR : Error interrupt enable 415 * @retval The new state of __IT__ (TRUE or FALSE). 416 */ 417 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER\ 418 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 419 420 /** @brief Check whether the specified I2S flag is set or not. 421 * @param __HANDLE__ specifies the I2S Handle. 422 * This parameter can be I2S where x: 1, 2 or 3 to select the I2S peripheral. 423 * @param __FLAG__ specifies the flag to check. 424 * This parameter can be one of the following values: 425 * @arg I2S_FLAG_RXP : Rx-Packet available flag 426 * @arg I2S_FLAG_TXP : Tx-Packet space available flag 427 * @arg I2S_FLAG_UDR : Underrun flag 428 * @arg I2S_FLAG_OVR : Overrun flag 429 * @arg I2S_FLAG_FRE : TI mode frame format error flag 430 * @retval The new state of __FLAG__ (TRUE or FALSE). 431 */ 432 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 433 434 /** @brief Clear the I2S OVR pending flag. 435 * @param __HANDLE__ specifies the I2S Handle. 436 * @retval None 437 */ 438 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_OVRC) 439 440 /** @brief Clear the I2S UDR pending flag. 441 * @param __HANDLE__ specifies the I2S Handle. 442 * @retval None 443 */ 444 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_UDRC) 445 446 /** @brief Clear the I2S FRE pending flag. 447 * @param __HANDLE__: specifies the I2S Handle. 448 * @retval None 449 */ 450 #define __HAL_I2S_CLEAR_TIFREFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_TIFREC) 451 /** 452 * @} 453 */ 454 455 456 /* Exported functions --------------------------------------------------------*/ 457 /** @addtogroup I2S_Exported_Functions 458 * @{ 459 */ 460 461 /** @addtogroup I2S_Exported_Functions_Group1 462 * @{ 463 */ 464 /* Initialization/de-initialization functions ********************************/ 465 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); 466 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s); 467 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); 468 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); 469 470 /* Callbacks Register/UnRegister functions ***********************************/ 471 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1UL) 472 HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, 473 pI2S_CallbackTypeDef pCallback); 474 HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID); 475 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ 476 /** 477 * @} 478 */ 479 480 /** @addtogroup I2S_Exported_Functions_Group2 481 * @{ 482 */ 483 /* I/O operation functions ***************************************************/ 484 /* Blocking mode: Polling */ 485 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, const uint16_t *pData, uint16_t Size, uint32_t Timeout); 486 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); 487 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData, 488 uint16_t Size, uint32_t Timeout); 489 490 /* Non-Blocking mode: Interrupt */ 491 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, const uint16_t *pData, uint16_t Size); 492 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 493 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_IT(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData, 494 uint16_t Size); 495 496 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); 497 498 /* Non-Blocking mode: DMA */ 499 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, const uint16_t *pData, uint16_t Size); 500 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); 501 HAL_StatusTypeDef HAL_I2SEx_TransmitReceive_DMA(I2S_HandleTypeDef *hi2s, const uint16_t *pTxData, uint16_t *pRxData, 502 uint16_t Size); 503 504 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); 505 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); 506 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); 507 508 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ 509 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 510 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); 511 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 512 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); 513 void HAL_I2SEx_TxRxHalfCpltCallback(I2S_HandleTypeDef *hi2s); 514 void HAL_I2SEx_TxRxCpltCallback(I2S_HandleTypeDef *hi2s); 515 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); 516 /** 517 * @} 518 */ 519 520 /** @addtogroup I2S_Exported_Functions_Group3 521 * @{ 522 */ 523 /* Peripheral Control and State functions ************************************/ 524 HAL_I2S_StateTypeDef HAL_I2S_GetState(const I2S_HandleTypeDef *hi2s); 525 uint32_t HAL_I2S_GetError(const I2S_HandleTypeDef *hi2s); 526 /** 527 * @} 528 */ 529 530 /** 531 * @} 532 */ 533 534 /* Private types -------------------------------------------------------------*/ 535 /* Private variables ---------------------------------------------------------*/ 536 /* Private constants ---------------------------------------------------------*/ 537 /** @defgroup I2S_Private_Constants I2S Private Constants 538 * @{ 539 */ 540 541 /** 542 * @} 543 */ 544 545 /* Private Functions ---------------------------------------------------------*/ 546 /** @defgroup I2S_Private_Functions I2S Private Functions 547 * @{ 548 */ 549 /* Private functions are defined in stm32h7xx_hal_i2S.c file */ 550 /** 551 * @} 552 */ 553 554 /* Private macros ------------------------------------------------------------*/ 555 /** @defgroup I2S_Private_Macros I2S Private Macros 556 * @{ 557 */ 558 559 /** @brief Check whether the specified SPI flag is set or not. 560 * @param __SR__ copy of I2S SR register. 561 * @param __FLAG__ specifies the flag to check. 562 * This parameter can be one of the following values: 563 * @arg I2S_FLAG_RXP : Rx-Packet available flag 564 * @arg I2S_FLAG_TXP : Tx-Packet space available flag 565 * @arg I2S_FLAG_UDR : Underrun flag 566 * @arg I2S_FLAG_OVR : Overrun flag 567 * @arg I2S_FLAG_FRE : TI mode frame format error flag 568 * @retval SET or RESET. 569 */ 570 #define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\ 571 & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK))\ 572 ? SET : RESET) 573 574 /** @brief Check whether the specified SPI Interrupt is set or not. 575 * @param __IER__ copy of I2S IER register. 576 * @param __INTERRUPT__ specifies the SPI interrupt source to check. 577 * This parameter can be one of the following values: 578 * @arg I2S_IT_RXP : Rx-Packet available interrupt 579 * @arg I2S_IT_TXP : Tx-Packet space available interrupt 580 * @arg I2S_IT_UDR : Underrun interrupt 581 * @arg I2S_IT_OVR : Overrun interrupt 582 * @arg I2S_IT_FRE : TI mode frame format error interrupt 583 * @arg I2S_IT_ERR : Error interrupt enable 584 * @retval SET or RESET. 585 */ 586 #define I2S_CHECK_IT_SOURCE(__IER__, __INTERRUPT__) ((((__IER__)\ 587 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 588 589 /** @brief Checks if I2S Mode parameter is in allowed range. 590 * @param __MODE__ specifies the I2S Mode. 591 * This parameter can be a value of @ref I2S_Mode 592 * @retval None 593 */ 594 #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \ 595 ((__MODE__) == I2S_MODE_SLAVE_RX) || \ 596 ((__MODE__) == I2S_MODE_MASTER_TX) || \ 597 ((__MODE__) == I2S_MODE_MASTER_RX) || \ 598 ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX) || \ 599 ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX)) 600 601 #define IS_I2S_MASTER(__MODE__) (((__MODE__) == I2S_MODE_MASTER_TX) || \ 602 ((__MODE__) == I2S_MODE_MASTER_RX) || \ 603 ((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX)) 604 605 #define IS_I2S_SLAVE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \ 606 ((__MODE__) == I2S_MODE_SLAVE_RX) || \ 607 ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX)) 608 609 #define IS_I2S_FULLDUPLEX(__MODE__) (((__MODE__) == I2S_MODE_MASTER_FULLDUPLEX) || \ 610 ((__MODE__) == I2S_MODE_SLAVE_FULLDUPLEX)) 611 612 #define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \ 613 ((__STANDARD__) == I2S_STANDARD_MSB) || \ 614 ((__STANDARD__) == I2S_STANDARD_LSB) || \ 615 ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \ 616 ((__STANDARD__) == I2S_STANDARD_PCM_LONG)) 617 618 #define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \ 619 ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \ 620 ((__FORMAT__) == I2S_DATAFORMAT_24B) || \ 621 ((__FORMAT__) == I2S_DATAFORMAT_32B)) 622 623 #define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \ 624 ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE)) 625 626 #define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \ 627 ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \ 628 ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT)) 629 630 #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \ 631 ((__CPOL__) == I2S_CPOL_HIGH)) 632 633 #define IS_I2S_FIRST_BIT(__BIT__) (((__BIT__) == I2S_FIRSTBIT_MSB) || \ 634 ((__BIT__) == I2S_FIRSTBIT_LSB)) 635 636 #define IS_I2S_WS_INVERSION(__WSINV__) (((__WSINV__) == I2S_WS_INVERSION_DISABLE) || \ 637 ((__WSINV__) == I2S_WS_INVERSION_ENABLE)) 638 639 #define IS_I2S_DATA_24BIT_ALIGNMENT(__ALIGNMENT__) (((__ALIGNMENT__) == I2S_DATA_24BIT_ALIGNMENT_RIGHT) || \ 640 ((__ALIGNMENT__) == I2S_DATA_24BIT_ALIGNMENT_LEFT)) 641 642 #define IS_I2S_MASTER_KEEP_IO_STATE(__AFCNTR__) (((__AFCNTR__) == I2S_MASTER_KEEP_IO_STATE_DISABLE) || \ 643 ((__AFCNTR__) == I2S_MASTER_KEEP_IO_STATE_ENABLE)) 644 645 646 /** 647 * @} 648 */ 649 650 /** 651 * @} 652 */ 653 654 /** 655 * @} 656 */ 657 658 #ifdef __cplusplus 659 } 660 #endif 661 662 #endif /* STM32H7xx_HAL_I2S_H */ 663 664
