| /hal_nxp-latest/s32/drivers/s32k3/Mcu/src/ |
| D | Clock_Ip_Data.c | 95 #define CLOCK_IP_NO_CALLBACK 0U 115 #define CLOCK_IP_SCS_EXTENSION 0U 197 #define CLOCK_IP_PRT0_COL1_REQ40_INDEX 0U 753 #define CLOCK_IP_FXOSC_INSTANCE 0U 758 #define CLOCK_IP_PLL_INSTANCE 0U 764 #define CLOCK_IP_CGM_0_INSTANCE 0U 766 #define CLOCK_IP_CMU_0_INSTANCE 0U 774 #define CLOCK_IP_DIV_0_INDEX 0U 791 #define CLOCK_IP_PARTITION_0_INDEX 0U 800 #define CLOCK_IP_COLLECTION_0_INDEX 0U [all …]
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| /hal_nxp-latest/s32/drivers/s32ze/Mcu/src/ |
| D | Clock_Ip_Data.c | 97 #define CLOCK_IP_NO_CALLBACK 0U 121 #define CLOCK_IP_DDR_EXTENSION 0U 254 #define CLOCK_IP_COREPLL_INSTANCE 0U 258 #define CLOCK_IP_COREDFS_INSTANCE 0U 261 #define CLOCK_IP_LFAST0_PLL_INSTANCE 0U 264 #define CLOCK_IP_CGM0_INSTANCE 0U 275 #define CLOCK_IP_GPR0_INSTANCE 0U 281 #define CLOCK_IP_SMU_CMU_FC_INSTANCE 0U 310 #define CLOCK_IP_P6_GROUP_0_BIT0_INDEX 0U 412 #define CLOCK_IP_GATE_0_INDEX 0U [all …]
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| /hal_nxp-latest/s32/drivers/s32k1/Mcu/src/ |
| D | Clock_Ip_Data.c | 96 #define CLOCK_IP_NO_CALLBACK 0U 130 #define CLOCK_IP_NO_CALLBACK 0U 164 #define CLOCK_IP_NO_CALLBACK 0U 203 #define CLOCK_IP_CMU_FC_0_INSTANCE 0U 209 #define CLOCK_IP_DIV_0_INDEX 0U 303 #define CLOCK_IP_SIM_PLATCGC_0_INDEX 0U 800 …U, CLOCK_IP_NO_CALLBACK, 0U, 0U, … 801 …U, CLOCK_IP_NO_CALLBACK, 0U, 0U, … 802 …U, CLOCK_IP_SIRCOSC, 0U, 0U, … 803 …U, CLOCK_IP_SIRCOSC_VLP, 0U, 0U, … [all …]
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| /hal_nxp-latest/s32/soc/s32z270/src/ |
| D | Clock_Ip_Cfg.c | 108 #if CLOCK_IP_CONFIGURED_XOSCS_0_NO > 0U 114 0U, /* XOSC bypass option */ 117 0U, /* Gain value */ 118 0U, /* Monitor type */ 119 0U, /* Automatic level controller */ 127 #if CLOCK_IP_CONFIGURED_PLLS_0_NO > 0U 132 0U, /* Bypass */ 134 0U, /* multiplier */ 135 0U, /* postdivider */ 136 0U, /* numeratorFracLoopDiv */ [all …]
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| /hal_nxp-latest/s32/soc/s32k344/src/ |
| D | Clock_Ip_Cfg.c | 153 #if CLOCK_IP_CONFIGURED_IRCOSCS_0_NO > 0U 157 0U, /* Enable regulator */ 159 0U, /* Ircosc enable in VLP mode */ 160 0U, /* Ircosc enable in STOP mode */ 167 0U, /* Disabled in standby mode. */ 168 0U, /* Enable regulator */ 169 0U, /* Ircosc range */ 170 0U, /* Ircosc enable in VLP mode */ 171 0U, /* Ircosc enable in STOP mode */ 178 0U, /* Disabled in standby mode. */ [all …]
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| /hal_nxp-latest/s32/soc/s32k146/src/ |
| D | Clock_Ip_Cfg.c | 111 0U, /* clkConfigId */ 119 0U, /* dividerTriggersCount */ 120 0U, /* fracDivsCount */ 123 0U, /* pcfsCount */ 124 0U, /* cmusCount */ 131 #if CLOCK_IP_IRCOSCS_NO > 0U 135 0U, /* Enabled regulator */ 138 0U, /* Ircosc disable in STOP mode */ 146 0U, /* Enabled regulator */ 147 0U, /* Ircosc range */ [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/ |
| D | fsl_clock.c | 32 volatile uint32_t g_senseAudioClkFreq = 0U; 38 volatile uint32_t g_clkinFreq = 0U; 40 volatile uint32_t g_mclkFreq = 0U; 42 volatile uint32_t g_32kClkinFreq = 0U; 57 while ((CLKCTL0->PSCCTL0 & bitMask) == 0U) in CLOCK_EnableClock() 63 while ((CLKCTL0->PSCCTL1 & bitMask) == 0U) in CLOCK_EnableClock() 69 while ((CLKCTL0->PSCCTL2 & bitMask) == 0U) in CLOCK_EnableClock() 75 while ((CLKCTL0->PSCCTL3 & bitMask) == 0U) in CLOCK_EnableClock() 81 while ((CLKCTL0->PSCCTL4 & bitMask) == 0U) in CLOCK_EnableClock() 87 while ((CLKCTL0->PSCCTL5 & bitMask) == 0U) in CLOCK_EnableClock() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/ |
| D | fsl_clock.c | 32 volatile uint32_t g_senseAudioClkFreq = 0U; 38 volatile uint32_t g_clkinFreq = 0U; 40 volatile uint32_t g_mclkFreq = 0U; 42 volatile uint32_t g_32kClkinFreq = 0U; 57 while ((CLKCTL0->PSCCTL0 & bitMask) == 0U) in CLOCK_EnableClock() 63 while ((CLKCTL0->PSCCTL1 & bitMask) == 0U) in CLOCK_EnableClock() 69 while ((CLKCTL0->PSCCTL2 & bitMask) == 0U) in CLOCK_EnableClock() 75 while ((CLKCTL0->PSCCTL3 & bitMask) == 0U) in CLOCK_EnableClock() 81 while ((CLKCTL0->PSCCTL4 & bitMask) == 0U) in CLOCK_EnableClock() 87 while ((CLKCTL0->PSCCTL5 & bitMask) == 0U) in CLOCK_EnableClock() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/ |
| D | fsl_clock.c | 32 volatile uint32_t g_senseAudioClkFreq = 0U; 38 volatile uint32_t g_clkinFreq = 0U; 40 volatile uint32_t g_mclkFreq = 0U; 42 volatile uint32_t g_32kClkinFreq = 0U; 57 while ((CLKCTL0->PSCCTL0 & bitMask) == 0U) in CLOCK_EnableClock() 63 while ((CLKCTL0->PSCCTL1 & bitMask) == 0U) in CLOCK_EnableClock() 69 while ((CLKCTL0->PSCCTL2 & bitMask) == 0U) in CLOCK_EnableClock() 75 while ((CLKCTL0->PSCCTL3 & bitMask) == 0U) in CLOCK_EnableClock() 81 while ((CLKCTL0->PSCCTL4 & bitMask) == 0U) in CLOCK_EnableClock() 87 while ((CLKCTL0->PSCCTL5 & bitMask) == 0U) in CLOCK_EnableClock() [all …]
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/device/ |
| D | usb_device_lpcip3511.c | 19 #if (defined(USB_DEVICE_CONFIG_CHARGER_DETECT) && (USB_DEVICE_CONFIG_CHARGER_DETECT > 0U)) && \ 20 ((defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U))) 23 #if ((defined FSL_FEATURE_SOC_USBPHY_COUNT) && (FSL_FEATURE_SOC_USBPHY_COUNT > 0U)) 24 #if ((defined FSL_FEATURE_USBHSD_HAS_EXIT_HS_ISSUE) && (FSL_FEATURE_USBHSD_HAS_EXIT_HS_ISSUE > 0U)) 28 #if (((defined(USB_DEVICE_CONFIG_LPCIP3511FS)) && (USB_DEVICE_CONFIG_LPCIP3511FS > 0U)) || \ 29 ((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U))) 38 #if ((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)) 138 #if ((defined(USB_DEVICE_CONFIG_LPCIP3511HS)) && (USB_DEVICE_CONFIG_LPCIP3511HS > 0U)) 143 … ((0U != lpc3511IpState->controllerSpeed) ? \ 161 ((0U != ((endpoint)&USB_DESCRIPTOR_ENDPOINT_ADDRESS_DIRECTION_MASK)) ? (1U) : (0U))) [all …]
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| D | usb_device_ehci.c | 16 #if ((defined(USB_DEVICE_CONFIG_EHCI)) && (USB_DEVICE_CONFIG_EHCI > 0U)) 27 #if (defined(USB_DEVICE_CONFIG_LOW_POWER_MODE) && (USB_DEVICE_CONFIG_LOW_POWER_MODE > 0U)) 28 #if ((defined FSL_FEATURE_SOC_USBPHY_COUNT) && (FSL_FEATURE_SOC_USBPHY_COUNT > 0U)) 32 #if (defined(USB_DEVICE_CONFIG_CHARGER_DETECT) && (USB_DEVICE_CONFIG_CHARGER_DETECT > 0U)) && \ 33 (defined(FSL_FEATURE_SOC_USBHSDCD_COUNT) && (FSL_FEATURE_SOC_USBHSDCD_COUNT > 0U)) 35 #elif (defined(USB_DEVICE_CONFIG_CHARGER_DETECT) && (USB_DEVICE_CONFIG_CHARGER_DETECT > 0U)) && \ 36 (defined(FSL_FEATURE_SOC_USB_ANALOG_COUNT) && (FSL_FEATURE_SOC_USB_ANALOG_COUNT > 0U)) 42 …USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE) && (USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE > 0U)) 49 #if defined(USB_STACK_USE_DEDICATED_RAM) && (USB_STACK_USE_DEDICATED_RAM > 0U) 77 #if (defined(USB_DEVICE_CONFIG_SOF_NOTIFICATIONS) && (USB_DEVICE_CONFIG_SOF_NOTIFICATIONS > 0U)) [all …]
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| D | usb_device_khci.c | 16 #if ((defined(USB_DEVICE_CONFIG_KHCI)) && (USB_DEVICE_CONFIG_KHCI > 0U)) 25 #if defined(USB_STACK_USE_DEDICATED_RAM) && (USB_STACK_USE_DEDICATED_RAM > 0U) 28 #if defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U) 57 #if (defined(USB_DEVICE_CONFIG_LOW_POWER_MODE) && (USB_DEVICE_CONFIG_LOW_POWER_MODE > 0U)) 62 #if defined(USB_DEVICE_CONFIG_ERROR_HANDLING) && (USB_DEVICE_CONFIG_ERROR_HANDLING > 0U) 78 #if (defined(USB_DEVICE_CHARGER_DETECT_ENABLE) && (USB_DEVICE_CHARGER_DETECT_ENABLE > 0U)) && \ 79 (defined(FSL_FEATURE_SOC_USBDCD_COUNT) && (FSL_FEATURE_SOC_USBDCD_COUNT > 0U)) 150 …ned(FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED) && (FSL_FEATURE_USB_KHCI_KEEP_ALIVE_ENABLED > 0U) && \ in USB_DeviceKhciPrimeNextSetup() 151 …defined(USB_DEVICE_CONFIG_KEEP_ALIVE_MODE) && (USB_DEVICE_CONFIG_KEEP_ALIVE_MODE > 0U) && … in USB_DeviceKhciPrimeNextSetup() 152 defined(FSL_FEATURE_USB_KHCI_USB_RAM) && (FSL_FEATURE_USB_KHCI_USB_RAM > 0U) in USB_DeviceKhciPrimeNextSetup() [all …]
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| /hal_nxp-latest/s32/drivers/s32k3/Eth_GMAC/src/ |
| D | Gmac_Ip_Irq.c | 78 #if (FEATURE_GMAC_NUM_INSTANCES > 0U) 82 GMAC_CommonIRQHandler(0U); in ISR() 89 GMAC_SafetyIRQHandler(0U); in ISR() 95 #if (FEATURE_GMAC_NUM_CHANNELS > 0U) 99 GMAC_TxIRQHandler(0U, 0U); in ISR() 104 GMAC_RxIRQHandler(0U, 0U); in ISR() 112 GMAC_TxIRQHandler(0U, 1U); in ISR() 117 GMAC_RxIRQHandler(0U, 1U); in ISR() 125 GMAC_TxIRQHandler(0U, 2U); in ISR() 130 GMAC_RxIRQHandler(0U, 2U); in ISR() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/edma/ |
| D | fsl_edma.c | 92 assert(((uint32_t)tcd & 0x1FU) == 0U); in EDMA_InstallTCD() 132 base->ERQ = 0U; in EDMA_Init() 232 assert(((uint32_t)nextTcd & 0x1FU) == 0U); in EDMA_SetTransferConfig() 304 (DMA_DCHPRI0_DPA((true == tmpEnablePreemptAbility ? 0U : 1U)) | in EDMA_SetChannelPreemptionConfig() 305 …DMA_DCHPRI0_ECP((true == tmpEnableChannelPreemption ? 1U : 0U)) | DMA_DCHPRI0_CHPRI(tmpChannelPrio… in EDMA_SetChannelPreemptionConfig() 388 if (0U != (mask & (uint32_t)kEDMA_ErrorInterruptEnable)) in EDMA_EnableChannelInterrupts() 394 if (0U != (mask & (uint32_t)kEDMA_MajorInterruptEnable)) in EDMA_EnableChannelInterrupts() 400 if (0U != (mask & (uint32_t)kEDMA_HalfInterruptEnable)) in EDMA_EnableChannelInterrupts() 419 if (0U != (mask & (uint32_t)kEDMA_ErrorInterruptEnable)) in EDMA_DisableChannelInterrupts() 425 if (0U != (mask & (uint32_t)kEDMA_MajorInterruptEnable)) in EDMA_DisableChannelInterrupts() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9131/drivers/ |
| D | fsl_clock.h | 19 #define CCM_REG(root) CCM_REG_OFF(root, 0U) 34 #define CCM_LPCG_LPM_SETTING_0 (0U) 277 kCLOCK_A55PERIPH_ClockRoot_MuxOsc24M = 0U, 283 kCLOCK_A55MTRBUS_ClockRoot_MuxOsc24M = 0U, 289 kCLOCK_A55_ClockRoot_MuxOsc24M = 0U, 295 kCLOCK_M33_ClockRoot_MuxOsc24M = 0U, 301 kCLOCK_SENTINEL_ClockRoot_MuxOsc24M = 0U, 307 kCLOCK_BUSWAKEUP_ClockRoot_MuxOsc24M = 0U, 313 kCLOCK_BUSAON_ClockRoot_MuxOsc24M = 0U, 319 kCLOCK_WAKEUPAXI_ClockRoot_MuxOsc24M = 0U, [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/drivers/ |
| D | fsl_clock.h | 19 #define CCM_REG(root) CCM_REG_OFF(root, 0U) 34 #define CCM_LPCG_LPM_SETTING_0 (0U) 277 kCLOCK_A55PERIPH_ClockRoot_MuxOsc24M = 0U, 283 kCLOCK_A55MTRBUS_ClockRoot_MuxOsc24M = 0U, 289 kCLOCK_A55_ClockRoot_MuxOsc24M = 0U, 295 kCLOCK_M33_ClockRoot_MuxOsc24M = 0U, 301 kCLOCK_SENTINEL_ClockRoot_MuxOsc24M = 0U, 307 kCLOCK_BUSWAKEUP_ClockRoot_MuxOsc24M = 0U, 313 kCLOCK_BUSAON_ClockRoot_MuxOsc24M = 0U, 319 kCLOCK_WAKEUPAXI_ClockRoot_MuxOsc24M = 0U, [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/netc/ |
| D | fsl_netc_msg.c | 28 if (handle->macFilterCount[i] == 0U) in EP_RxL2MFFreeNum() 43 if (handle->macFilterCount[i] == 0U) in EP_RxL2MFFreeIndex() 65 if (getSiNum(handle->cfg.si) != 0U) in EP_RxL2MFQueryEMTableEntry() 71 for (i = 0U; i < NUM_MAC_FILTER_ENTRY; i++) in EP_RxL2MFQueryEMTableEntry() 74 if (handle->macFilterCount[i] == 0U) in EP_RxL2MFQueryEMTableEntry() 83 cmdBd.generic.ci = 0U; in EP_RxL2MFQueryEMTableEntry() 90 result->valid = 0U; in EP_RxL2MFQueryEMTableEntry() 114 uint8_t match_num = 0U; in EP_RxL2MFQueryAddEMTableEntry() 118 uint16_t index = 0U; in EP_RxL2MFQueryAddEMTableEntry() 121 if (count == 0U) in EP_RxL2MFQueryAddEMTableEntry() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/utilities/str/ |
| D | fsl_str.c | 34 #if (defined(PRINTF_ADVANCED_ENABLE) && (PRINTF_ADVANCED_ENABLE > 0U)) 65 #if (defined(PRINTF_FLOAT_ENABLE) && (PRINTF_FLOAT_ENABLE > 0U)) 81 #if (defined(PRINTF_ADVANCED_ENABLE) && (PRINTF_ADVANCED_ENABLE > 0U)) 91 if (0U != (flags_used & (uint32_t)kPRINTF_Plus)) in PrintGetSignChar() 95 else if (0U != (flags_used & (uint32_t)kPRINTF_Space)) in PrintGetSignChar() 102 len = 0U; in PrintGetSignChar() 112 uint8_t done = 0U; in PrintGetWidth() 115 while (0U == done) in PrintGetWidth() 122 #if (defined(PRINTF_ADVANCED_ENABLE) && (PRINTF_ADVANCED_ENABLE > 0U)) in PrintGetWidth() 142 uint8_t done = 0U; in PrintGetPrecision() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/drivers/ |
| D | fsl_clock.c | 48 if (0U != (div_value & (1UL << 30U))) in CLOCK_IsDivHalt() 90 uint32_t actual_sel = 0U; in CLOCK_GetClockAttachId() 91 uint32_t clock_attach_id = 0U; in CLOCK_GetClockAttachId() 133 uint32_t actual_sel = 0U; in CLOCK_GetClockSelect() 160 if (value == 0U) /*!< halt */ in CLOCK_SetClockDiv() 179 if (((*pDivCtrl) & (1UL << 30U)) != 0U) in CLOCK_GetClockDiv() 249 while ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) == 0U) in CLOCK_SetupFROHFClocking() 269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking() 299 uint8_t range = 0U; in CLOCK_SetupExtClocking() 303 range = 0U; in CLOCK_SetupExtClocking() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/drivers/ |
| D | fsl_clock.c | 48 if (0U != (div_value & (1UL << 30U))) in CLOCK_IsDivHalt() 90 uint32_t actual_sel = 0U; in CLOCK_GetClockAttachId() 91 uint32_t clock_attach_id = 0U; in CLOCK_GetClockAttachId() 133 uint32_t actual_sel = 0U; in CLOCK_GetClockSelect() 160 if (value == 0U) /*!< halt */ in CLOCK_SetClockDiv() 179 if (((*pDivCtrl) & (1UL << 30U)) != 0U) in CLOCK_GetClockDiv() 249 while ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) == 0U) in CLOCK_SetupFROHFClocking() 269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking() 299 uint8_t range = 0U; in CLOCK_SetupExtClocking() 303 range = 0U; in CLOCK_SetupExtClocking() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/drivers/ |
| D | fsl_clock.c | 48 if (0U != (div_value & (1UL << 30U))) in CLOCK_IsDivHalt() 90 uint32_t actual_sel = 0U; in CLOCK_GetClockAttachId() 91 uint32_t clock_attach_id = 0U; in CLOCK_GetClockAttachId() 133 uint32_t actual_sel = 0U; in CLOCK_GetClockSelect() 160 if (value == 0U) /*!< halt */ in CLOCK_SetClockDiv() 179 if (((*pDivCtrl) & (1UL << 30U)) != 0U) in CLOCK_GetClockDiv() 249 while ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) == 0U) in CLOCK_SetupFROHFClocking() 269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking() 299 uint8_t range = 0U; in CLOCK_SetupExtClocking() 303 range = 0U; in CLOCK_SetupExtClocking() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/drivers/ |
| D | fsl_clock.c | 48 if (0U != (div_value & (1UL << 30U))) in CLOCK_IsDivHalt() 90 uint32_t actual_sel = 0U; in CLOCK_GetClockAttachId() 91 uint32_t clock_attach_id = 0U; in CLOCK_GetClockAttachId() 133 uint32_t actual_sel = 0U; in CLOCK_GetClockSelect() 160 if (value == 0U) /*!< halt */ in CLOCK_SetClockDiv() 179 if (((*pDivCtrl) & (1UL << 30U)) != 0U) in CLOCK_GetClockDiv() 249 while ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) == 0U) in CLOCK_SetupFROHFClocking() 269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking() 299 uint8_t range = 0U; in CLOCK_SetupExtClocking() 303 range = 0U; in CLOCK_SetupExtClocking() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/drivers/ |
| D | fsl_clock.c | 48 if (0U != (div_value & (1UL << 30U))) in CLOCK_IsDivHalt() 90 uint32_t actual_sel = 0U; in CLOCK_GetClockAttachId() 91 uint32_t clock_attach_id = 0U; in CLOCK_GetClockAttachId() 133 uint32_t actual_sel = 0U; in CLOCK_GetClockSelect() 160 if (value == 0U) /*!< halt */ in CLOCK_SetClockDiv() 179 if (((*pDivCtrl) & (1UL << 30U)) != 0U) in CLOCK_GetClockDiv() 249 while ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) == 0U) in CLOCK_SetupFROHFClocking() 269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking() 299 uint8_t range = 0U; in CLOCK_SetupExtClocking() 303 range = 0U; in CLOCK_SetupExtClocking() [all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/drivers/ |
| D | fsl_clock.c | 48 if (0U != (div_value & (1UL << 30U))) in CLOCK_IsDivHalt() 90 uint32_t actual_sel = 0U; in CLOCK_GetClockAttachId() 91 uint32_t clock_attach_id = 0U; in CLOCK_GetClockAttachId() 133 uint32_t actual_sel = 0U; in CLOCK_GetClockSelect() 160 if (value == 0U) /*!< halt */ in CLOCK_SetClockDiv() 179 if (((*pDivCtrl) & (1UL << 30U)) != 0U) in CLOCK_GetClockDiv() 249 while ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) == 0U) in CLOCK_SetupFROHFClocking() 269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking() 299 uint8_t range = 0U; in CLOCK_SetupExtClocking() 303 range = 0U; in CLOCK_SetupExtClocking() [all …]
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/otg/ |
| D | usb_otg_khci.c | 51 otgKhciInstance->checkTime = 0U; in _USB_OtgKhciCheckSrp() 52 otgKhciInstance->checkSrpState = 0U; in _USB_OtgKhciCheckSrp() 55 if (otgKhciInstance->checkSrpState == 0U) /* check SE0 */ in _USB_OtgKhciCheckSrp() 57 if (0U != otgKhciInstance->se0State) /* se0 */ in _USB_OtgKhciCheckSrp() 64 if (0U != otgKhciInstance->jState) /* J */ in _USB_OtgKhciCheckSrp() 69 else if ((0U == (otgKhciInstance->se0State)) && in _USB_OtgKhciCheckSrp() 70 (0U != (otgKhciInstance->usbRegBase->OTGSTAT & USB_OTGSTAT_LINESTATESTABLE_MASK))) in _USB_OtgKhciCheckSrp() 72 otgKhciInstance->checkSrpState = 0U; in _USB_OtgKhciCheckSrp() 81 if (0U != otgKhciInstance->se0State) /* se0 */ in _USB_OtgKhciCheckSrp() 83 otgKhciInstance->checkSrpState = 0U; /* check next srp */ in _USB_OtgKhciCheckSrp() [all …]
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