Lines Matching refs:U

108     #if CLOCK_IP_CONFIGURED_XOSCS_0_NO > 0U
114 0U, /* XOSC bypass option */
117 0U, /* Gain value */
118 0U, /* Monitor type */
119 0U, /* Automatic level controller */
127 #if CLOCK_IP_CONFIGURED_PLLS_0_NO > 0U
132 0U, /* Bypass */
134 0U, /* multiplier */
135 0U, /* postdivider */
136 0U, /* numeratorFracLoopDiv */
139 0U, /* Modulation type: Spread spectrum modulation bypassed */
140 0U, /* modulationPeriod */
141 0U, /* incrementStep */
142 0U, /* sigmaDelta */
143 0U, /* ditherControl */
144 0U, /* ditherControlValue */
145 0U, /* Monitor type */
147 0U,
148 0U,
149 0U,
151 0U, /* SoftwareDisable */
160 0U, /* Bypass */
162 0U, /* multiplier */
163 0U, /* postdivider */
164 0U, /* numeratorFracLoopDiv */
166 0U, /* ModulationBypass */
167 0U, /* Modulation type: Spread spectrum modulation bypassed */
168 0U, /* modulationPeriod */
169 0U, /* incrementStep */
170 0U, /* sigmaDelta */
171 0U, /* ditherControl */
172 0U, /* ditherControlValue */
173 0U, /* Monitor type */
175 0U,
176 0U,
177 0U,
179 0U, /* SoftwareDisable */
188 0U, /* Bypass */
190 0U, /* multiplier */
191 0U, /* postdivider */
192 0U, /* numeratorFracLoopDiv */
195 0U, /* Modulation type: Spread spectrum modulation bypassed */
196 0U, /* modulationPeriod */
197 0U, /* incrementStep */
198 0U, /* sigmaDelta */
199 0U, /* ditherControl */
200 0U, /* ditherControlValue */
201 0U, /* Monitor type */
203 0U,
204 0U,
205 0U,
207 0U, /* SoftwareDisable */
216 0U, /* Bypass */
218 0U, /* multiplier */
219 0U, /* postdivider */
220 0U, /* numeratorFracLoopDiv */
222 0U, /* ModulationBypass */
223 0U, /* Modulation type: Spread spectrum modulation bypassed */
224 0U, /* modulationPeriod */
225 0U, /* incrementStep */
226 0U, /* sigmaDelta */
227 0U, /* ditherControl */
228 0U, /* ditherControlValue */
229 0U, /* Monitor type */
231 0U,
232 0U,
233 0U,
235 0U, /* SoftwareDisable */
244 0U, /* Bypass */
246 0U, /* multiplier */
247 0U, /* postdivider */
248 0U, /* numeratorFracLoopDiv */
250 0U, /* ModulationBypass */
251 0U, /* Modulation type: Spread spectrum modulation bypassed */
252 0U, /* modulationPeriod */
253 0U, /* incrementStep */
254 0U, /* sigmaDelta */
255 0U, /* ditherControl */
256 0U, /* ditherControlValue */
257 0U, /* Monitor type */
259 0U,
260 0U,
261 0U,
263 0U, /* SoftwareDisable */
270 #if CLOCK_IP_CONFIGURED_SELECTORS_0_NO > 0U
715 #if CLOCK_IP_CONFIGURED_DIVIDERS_0_NO > 0U
720 0U,
730 0U,
740 0U,
750 0U,
760 0U,
770 0U,
780 0U,
790 0U,
800 0U,
810 0U,
820 0U,
830 0U,
840 0U,
850 0U,
860 0U,
870 0U,
880 0U,
890 0U,
900 0U,
910 0U,
920 0U,
930 0U,
940 0U,
960 0U,
970 0U,
980 0U,
990 0U,
1000 0U,
1010 0U,
1020 0U,
1030 0U,
1040 0U,
1050 0U,
1060 0U,
1070 0U,
1080 0U,
1090 0U,
1100 0U,
1110 0U,
1120 0U,
1130 0U,
1140 0U,
1150 0U,
1160 0U,
1170 0U,
1180 0U,
1190 0U,
1200 0U,
1210 0U,
1230 0U,
1240 0U,
1250 0U,
1260 0U,
1270 0U,
1280 0U,
1290 0U,
1300 0U,
1310 0U,
1320 0U,
1330 0U,
1340 0U,
1350 0U,
1360 0U,
1370 0U,
1380 0U,
1390 0U,
1400 0U,
1410 0U,
1420 0U,
1430 0U,
1440 0U,
1450 0U,
1460 0U,
1470 0U,
1480 0U,
1490 0U,
1500 0U,
1510 0U,
1520 0U,
1530 0U,
1540 0U,
1550 0U,
1560 0U,
1569 #if CLOCK_IP_CONFIGURED_DIVIDER_TRIGGERS_0_NO > 0U
1581 #if CLOCK_IP_CONFIGURED_FRACTIONAL_DIVIDERS_0_NO > 0U
1587 0U, /* fractional part */
1620 0U, /* fractional part */
1675 0U, /* fractional part */
1708 0U, /* fractional part */
1717 #if CLOCK_IP_CONFIGURED_EXT_CLKS_0_NO > 0U
1727 0U, /* value */
1777 #if CLOCK_IP_CONFIGURED_GATES_0_NO > 0U
2489 #if CLOCK_IP_CONFIGURED_CMUS_0_NO > 0U
2492 0U, /*Enable/disable clock monitor SMU__CMU_FC */
2501 0U, /* Start index in register values array */
2502 0U, /* End index in register values array */
2510 0U, /*Enable/disable clock monitor CMU_FC_0 */
2519 0U, /* Start index in register values array */
2520 0U, /* End index in register values array */
2528 0U, /*Enable/disable clock monitor CMU_FC_1 */
2537 0U, /* Start index in register values array */
2538 0U, /* End index in register values array */
2546 0U, /*Enable/disable clock monitor CMU_FC_2A */
2555 0U, /* Start index in register values array */
2556 0U, /* End index in register values array */
2564 0U, /*Enable/disable clock monitor CMU_FC_2B */
2573 0U, /* Start index in register values array */
2574 0U, /* End index in register values array */
2582 0U, /*Enable/disable clock monitor CMU_FC_2C */
2591 0U, /* Start index in register values array */
2592 0U, /* End index in register values array */
2600 0U, /*Enable/disable clock monitor CMU_FC_3 */
2609 0U, /* Start index in register values array */
2610 0U, /* End index in register values array */
2618 0U, /*Enable/disable clock monitor CMU_FC_4 */
2627 0U, /* Start index in register values array */
2628 0U, /* End index in register values array */
2636 0U, /*Enable/disable clock monitor CMU_FC_5 */
2645 0U, /* Start index in register values array */
2646 0U, /* End index in register values array */
2654 0U, /*Enable/disable clock monitor CMU_FC_6 */
2663 0U, /* Start index in register values array */
2664 0U, /* End index in register values array */
2672 0U, /*Enable/disable clock monitor CE_CMU_FC_0 */
2681 0U, /* Start index in register values array */
2682 0U, /* End index in register values array */
2690 0U, /*Enable/disable clock monitor CE_CMU_FC_1 */
2699 0U, /* Start index in register values array */
2700 0U, /* End index in register values array */
2708 0U, /*Enable/disable clock monitor CE_CMU_FC_2 */
2717 0U, /* Start index in register values array */
2718 0U, /* End index in register values array */
2726 0U, /*Enable/disable clock monitor CMU_FC_DEBUG_1 */
2735 0U, /* Start index in register values array */
2736 0U, /* End index in register values array */
2744 0U, /*Enable/disable clock monitor CMU_FC_DEBUG_2 */
2753 0U, /* Start index in register values array */
2754 0U, /* End index in register values array */
2765 0U,
2889 0U, /* clkConfigId */
2892 0U, /* ircoscsCount */
2901 0U, /* pcfsCount */