msr (reference) in projects: hal_nxp-3.5.0

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Searched refs:msr (Results 1 – 25 of 161) sorted by relevance

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/hal_nxp-3.5.0/s32/drivers/s32k3/Rte/src/
D	SchM_Adc.c	74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 562 uint32 msr; in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00() local 568 msr = OsIf_Trusted_Call_Return(Adc_schm_read_msr); in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00() 570 msr = Adc_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00() 572 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00() 579 msr_ADC_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_00() [all …]
D	SchM_Pwm.c	74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 436 uint32 msr; in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_00() local 442 msr = OsIf_Trusted_Call_Return(Pwm_schm_read_msr); in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_00() 444 msr = Pwm_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_00() 446 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_00() 453 msr_PWM_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Pwm_PWM_EXCLUSIVE_AREA_00() [all …]
D	SchM_Icu.c	74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 452 uint32 msr; in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() local 458 msr = OsIf_Trusted_Call_Return(Icu_schm_read_msr); in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() 460 msr = Icu_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() 462 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() 469 msr_ICU_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() [all …]
D	SchM_Mcl.c	74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 460 uint32 msr; in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00() local 466 msr = OsIf_Trusted_Call_Return(Mcl_schm_read_msr); in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00() 468 msr = Mcl_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00() 470 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00() 477 msr_MCL_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Mcl_MCL_EXCLUSIVE_AREA_00() [all …]
D	SchM_Port.c	74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 422 uint32 msr; in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() local 428 msr = OsIf_Trusted_Call_Return(Port_schm_read_msr); in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() 430 msr = Port_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() 432 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() 439 msr_PORT_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() [all …]
D	SchM_Fls.c	74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 376 uint32 msr; in SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_10() local 382 msr = OsIf_Trusted_Call_Return(Fls_schm_read_msr); in SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_10() 384 msr = Fls_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_10() 386 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_10() 393 msr_FLS_EXCLUSIVE_AREA_10[u32CoreId] = msr; in SchM_Enter_Fls_FLS_EXCLUSIVE_AREA_10() [all …]
D	SchM_Mcu.c	74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 372 uint32 msr; in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() local 378 msr = OsIf_Trusted_Call_Return(Mcu_schm_read_msr); in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() 380 msr = Mcu_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() 382 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() 389 msr_MCU_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() [all …]
D	SchM_Dio.c	74 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 76 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 78 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 82 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 84 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 370 uint32 msr; in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() local 376 msr = OsIf_Trusted_Call_Return(Dio_schm_read_msr); in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() 378 msr = Dio_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() 380 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() 387 msr_DIO_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() [all …]
/hal_nxp-3.5.0/s32/drivers/s32ze/Rte/src/
D	SchM_Icu.c	69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 447 uint32 msr; in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() local 453 msr = OsIf_Trusted_Call_Return(Icu_schm_read_msr); in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() 455 msr = Icu_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() 457 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() 464 msr_ICU_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Icu_ICU_EXCLUSIVE_AREA_00() [all …]
D	SchM_Gpt.c	69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 469 uint32 msr; in SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_00() local 475 msr = OsIf_Trusted_Call_Return(Gpt_schm_read_msr); in SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_00() 477 msr = Gpt_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_00() 479 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_00() 486 msr_GPT_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Gpt_GPT_EXCLUSIVE_AREA_00() [all …]
D	SchM_Port.c	69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 417 uint32 msr; in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() local 423 msr = OsIf_Trusted_Call_Return(Port_schm_read_msr); in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() 425 msr = Port_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() 427 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() 434 msr_PORT_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Port_PORT_EXCLUSIVE_AREA_00() [all …]
D	SchM_Can_43_CANEXCEL.c	69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 403 uint32 msr; in SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_00() local 409 msr = OsIf_Trusted_Call_Return(Can_43_CANEXCEL_schm_read_msr); in SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_00() 411 msr = Can_43_CANEXCEL_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_00() 413 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_00() 420 msr_CAN_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Can_43_CANEXCEL_CAN_EXCLUSIVE_AREA_00() [all …]
D	SchM_Spi.c	69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 399 uint32 msr; in SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00() local 405 msr = OsIf_Trusted_Call_Return(Spi_schm_read_msr); in SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00() 407 msr = Spi_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00() 409 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00() 416 msr_SPI_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Spi_SPI_EXCLUSIVE_AREA_00() [all …]
D	SchM_Wdg.c	69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 391 uint32 msr; in SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00() local 397 msr = OsIf_Trusted_Call_Return(Wdg_schm_read_msr); in SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00() 399 msr = Wdg_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00() 401 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00() 408 msr_WDG_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Wdg_WDG_EXCLUSIVE_AREA_00() [all …]
D	SchM_Uart.c	69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 379 uint32 msr; in SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00() local 385 msr = OsIf_Trusted_Call_Return(Uart_schm_read_msr); in SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00() 387 msr = Uart_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00() 389 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00() 396 msr_UART_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Uart_UART_EXCLUSIVE_AREA_00() [all …]
D	SchM_Mcu.c	69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 367 uint32 msr; in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() local 373 msr = OsIf_Trusted_Call_Return(Mcu_schm_read_msr); in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() 375 msr = Mcu_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() 377 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() 384 msr_MCU_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00() [all …]
D	SchM_Dio.c	69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK)) 365 uint32 msr; in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() local 371 msr = OsIf_Trusted_Call_Return(Dio_schm_read_msr); in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() 373 msr = Dio_schm_read_msr(); /read MSR (to store interrupts state)/ in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() 375 if (ISR_ON(msr)) /if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts/ in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() 382 msr_DIO_EXCLUSIVE_AREA_00[u32CoreId] = msr; in SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00() [all …]
D	SchM_EthSwt_43_NETC.c	`69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK))`
D	SchM_Eth_43_NETC.c	`69 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… argument 71 …#define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR… 73 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 77 … #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0) 79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK))`
/hal_nxp-3.5.0/mcux/mcux-sdk/components/exception_handling/cm7/
D	fsl_component_exception_handling.c	`87 msr msp, r1 in COPY_TO_STACK() 98 msr msp, r5 in COPY_TO_STACK()`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE04Z4/gcc/
D	startup_MKE04Z4.S	`102 msr msp, r2`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/gcc/
D	startup_MKE15Z4.S	`100 msr msp, r2`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/gcc/
D	startup_MKE14Z4.S	`100 msr msp, r2`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM35Z7/gcc/
D	startup_MKM35Z7.S	`100 msr msp, r2`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM34Z7/gcc/
D	startup_MKM34Z7.S	`100 msr msp, r2`

12 3 4 5 6 7

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
bsim-3.7.0
canopennode-2.7.6
canopennode-3.5.0-3.4.0
chre-3.4.0
civetweb-2.7.6
cmsis-2.7.6
cmsis-3.4.0
cmsis-3.5.0
cmsis-3.7.0-3.6.0
cmsis-dsp-3.5.0
cmsis-dsp-3.7.0-3.6.0
cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
hal_adi-3.7.0
hal_altera-2.7.6
hal_altera-3.6.0-3.5.0-3.4.0
hal_altera-3.7.0
hal_ambiq-3.5.0
hal_ambiq-3.6.0
hal_ambiq-3.7.0
hal_atmel-2.7.6
hal_atmel-3.5.0-3.4.0
hal_atmel-3.6.0
hal_atmel-3.7.0
hal_cypress-2.7.6
hal_espressif-2.7.6
hal_espressif-3.4.0
hal_espressif-3.5.0
hal_espressif-3.6.0
hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
hal_ethos_u-3.7.0
hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0
hal_infineon-2.7.6
hal_infineon-3.4.0
hal_infineon-3.5.0
hal_infineon-3.6.0
hal_infineon-3.7.0
hal_intel-3.5.0
hal_intel-3.6.0
hal_intel-3.7.0
hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
hal_nordic-3.4.0
hal_nordic-3.5.0
hal_nordic-3.6.0
hal_nordic-3.7.0
hal_nuvoton-2.7.6
hal_nuvoton-3.4.0
hal_nuvoton-3.5.0
hal_nuvoton-3.6.0
hal_nuvoton-3.7.0
hal_nxp-2.7.6
hal_nxp-3.4.0
hal_nxp-3.5.0
hal_nxp-3.6.0
hal_nxp-3.7.0
hal_openisa-2.7.6
hal_openisa-3.5.0-3.4.0
hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
hal_renesas-3.5.0
hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
hal_silabs-3.4.0
hal_silabs-3.5.0
hal_silabs-3.6.0
hal_silabs-3.7.0
hal_st-2.7.6
hal_st-3.4.0
hal_st-3.5.0
hal_st-3.6.0
hal_st-3.7.0
hal_stm32-2.7.6
hal_stm32-3.4.0
hal_stm32-3.5.0
hal_stm32-3.6.0
hal_stm32-3.7.0
hal_telink-2.7.6
hal_telink-3.6.0-3.5.0-3.4.0
hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
hal_wurthelektronik-3.7.0-3.6.0
hal_xtensa-2.7.6
hal_xtensa-3.4.0
hal_xtensa-3.5.0
hal_xtensa-3.6.0
hal_xtensa-3.7.0
hostap-3.6.0
hostap-3.7.0
liblc3-3.5.0-3.4.0
liblc3-3.7.0-3.6.0
libmetal-2.7.6
libmetal-3.5.0-3.4.0
libmetal-3.6.0
libmetal-3.7.0
littlefs-2.7.6
littlefs-3.5.0-3.4.0
littlefs-3.7.0-3.6.0
loramac-node-2.7.6
loramac-node-3.4.0
loramac-node-3.6.0-3.5.0
loramac-node-3.7.0
lvgl-2.7.6
lvgl-3.4.0
lvgl-3.5.0
lvgl-3.6.0
lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
mbedtls-3.4.0
mbedtls-3.5.0
mbedtls-3.6.0
mbedtls-3.7.0
mcuboot-2.7.6
mcuboot-3.4.0
mcuboot-3.5.0
mcuboot-3.6.0
mcuboot-3.7.0
mcumgr-2.7.6
mipi-sys-t-2.7.6
mipi-sys-t-3.4.0
mipi-sys-t-3.6.0-3.5.0
mipi-sys-t-3.7.0
nanopb-2.7.6
nanopb-3.4.0
net-tools-2.7.6
net-tools-3.4.0
net-tools-3.5.0
net-tools-3.6.0
net-tools-3.7.0
nrf_hw_models-2.7.6
nrf_hw_models-3.4.0
nrf_hw_models-3.5.0
nrf_hw_models-3.6.0
nrf_hw_models-3.7.0
open-amp-2.7.6
open-amp-3.4.0
open-amp-3.5.0
open-amp-3.6.0
open-amp-3.7.0
openthread-2.7.6
openthread-3.4.0
openthread-3.5.0
openthread-3.6.0
openthread-3.7.0
percepio-3.5.0
percepio-3.6.0
percepio-3.7.0
picolibc-3.5.0-3.4.0
picolibc-3.7.0-3.6.0
psa-arch-tests-3.4.0
segger-2.7.6
segger-3.4.0
segger-3.6.0-3.5.0
segger-3.7.0
sof-2.7.6
sof-3.4.0
tf-m-tests-3.4.0
tflite-micro-3.4.0-2.7.6
thrift-3.4.0
tinycbor-2.7.6
tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
trusted-firmware-a-3.4.0
trusted-firmware-a-3.6.0-3.5.0
trusted-firmware-a-3.7.0
trusted-firmware-m-3.4.0
trusted-firmware-m-3.5.0
trusted-firmware-m-3.6.0
trusted-firmware-m-3.7.0
uoscore-uedhoc-3.4.0
uoscore-uedhoc-3.5.0
uoscore-uedhoc-3.6.0
uoscore-uedhoc-3.7.0
zcbor-3.5.0-3.4.0
zcbor-3.6.0
zcbor-3.7.0
zscilib-3.4.0