1 /*
2 * Copyright 2021-2022 NXP
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 /**
8 * @file
9 *
10 * @addtogroup RTE_MODULE
11 * @{
12 */
13
14 #ifdef __cplusplus
15 extern "C"{
16 #endif
17
18 /*==================================================================================================
19 * INCLUDE FILES
20 * 1) system and project includes
21 * 2) needed interfaces from external units
22 * 3) internal and external interfaces from this unit
23 ==================================================================================================*/
24 #include "Std_Types.h"
25 #include "Mcal.h"
26 #include "OsIf.h"
27 #include "SchM_Dio.h"
28 #ifdef MCAL_TESTING_ENVIRONMENT
29 #include "EUnit.h" /* EUnit Test Suite */
30 #endif
31
32 /*==================================================================================================
33 * SOURCE FILE VERSION INFORMATION
34 ==================================================================================================*/
35 #define SCHM_DIO_AR_RELEASE_MAJOR_VERSION_C 4
36 #define SCHM_DIO_AR_RELEASE_MINOR_VERSION_C 7
37 #define SCHM_DIO_AR_RELEASE_REVISION_VERSION_C 0
38 #define SCHM_DIO_SW_MAJOR_VERSION_C 0
39 #define SCHM_DIO_SW_MINOR_VERSION_C 9
40 #define SCHM_DIO_SW_PATCH_VERSION_C 0
41
42 /*==================================================================================================
43 * LOCAL CONSTANTS
44 ==================================================================================================*/
45 #ifdef MCAL_PLATFORM_ARM
46 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
47 #define ISR_STATE_MASK ((uint32)0x000000C0UL) /**< @brief DAIF bit I and F */
48 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
49 #define ISR_STATE_MASK ((uint32)0x00000080UL) /**< @brief CPSR bit I */
50 #else
51 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
52 #define ISR_STATE_MASK ((uint32)0x000000FFUL) /**< @brief BASEPRI[7:0] mask */
53 #else
54 #define ISR_STATE_MASK ((uint32)0x00000001UL) /**< @brief PRIMASK bit 0 */
55 #endif
56 #endif
57 #else
58 #ifdef MCAL_PLATFORM_S12
59 #define ISR_STATE_MASK ((uint32)0x00000010UL) /**< @brief I bit of CCR */
60 #else
61 #define ISR_STATE_MASK ((uint32)0x00008000UL) /**< @brief EE bit of MSR */
62 #endif
63 #endif
64 /*==================================================================================================
65 * LOCAL MACROS
66 ==================================================================================================*/
67 #ifdef MCAL_PLATFORM_ARM
68 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
69 #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR_STATE_MASK))
70 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
71 #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR_STATE_MASK))
72 #else
73 #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0)
74 #endif
75 #else
76 #ifdef MCAL_PLATFORM_S12
77 #define ISR_ON(msr) (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0)
78 #else
79 #define ISR_ON(msr) (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK))
80 #endif
81 #endif
82
83 /*==================================================================================================
84 * FILE VERSION CHECKS
85 ==================================================================================================*/
86
87 /*==================================================================================================
88 * LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
89 ==================================================================================================*/
90
91
92 /*==================================================================================================
93 * LOCAL VARIABLES
94 ==================================================================================================*/
95 #define RTE_START_SEC_VAR_CLEARED_32_NO_CACHEABLE
96 #include "Rte_MemMap.h"
97 VAR_SEC_NOCACHE(msr_DIO_EXCLUSIVE_AREA_00) static volatile uint32 msr_DIO_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
98 VAR_SEC_NOCACHE(reentry_guard_DIO_EXCLUSIVE_AREA_00) static volatile uint32 reentry_guard_DIO_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
99 VAR_SEC_NOCACHE(msr_DIO_EXCLUSIVE_AREA_01) static volatile uint32 msr_DIO_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
100 VAR_SEC_NOCACHE(reentry_guard_DIO_EXCLUSIVE_AREA_01) static volatile uint32 reentry_guard_DIO_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
101
102 #define RTE_STOP_SEC_VAR_CLEARED_32_NO_CACHEABLE
103 #include "Rte_MemMap.h"
104 /*==================================================================================================
105 * GLOBAL CONSTANTS
106 ==================================================================================================*/
107
108
109 /*==================================================================================================
110 * GLOBAL VARIABLES
111 ==================================================================================================*/
112
113 /*==================================================================================================
114 * LOCAL FUNCTION PROTOTYPES
115 ==================================================================================================*/
116
117 #ifndef _COSMIC_C_S32ZE_
118 /*================================================================================================*/
119 /**
120 * @brief This function returns the MSR register value (32 bits).
121 * @details This function returns the MSR register value (32 bits).
122 *
123 * @param[in] void No input parameters
124 * @return uint32 msr This function returns the MSR register value (32 bits).
125 *
126 * @pre None
127 * @post None
128 *
129 */
130 uint32 Dio_schm_read_msr(void);
131 #endif /*ifndef _COSMIC_C_S32ZE_*/
132 /*==================================================================================================
133 * LOCAL FUNCTIONS
134 ==================================================================================================*/
135 #define RTE_START_SEC_CODE
136 #include "Rte_MemMap.h"
137
138 #if (defined(_GREENHILLS_C_S32ZE_) || defined(_CODEWARRIOR_C_S32ZE_))
139 /*================================================================================================*/
140 /**
141 * @brief This macro returns the MSR register value (32 bits).
142 * @details This macro function implementation returns the MSR register value in r3 (32 bits).
143 *
144 * @pre None
145 * @post None
146 *
147 */
148 #ifdef MCAL_PLATFORM_ARM
149 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
Dio_schm_read_msr(void)150 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
151 {
152 mrs x0, S3_3_c4_c2_1
153 }
154 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
Dio_schm_read_msr(void)155 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
156 {
157 mrs r0, CPSR
158 }
159 #else
Dio_schm_read_msr(void)160 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
161 {
162 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
163 mrs r0, BASEPRI
164 #else
165 mrs r0, PRIMASK
166 #endif
167 }
168 #endif
169 #else
170 #ifdef MCAL_PLATFORM_S12
Dio_schm_read_msr(void)171 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
172 {
173 tfr ccr, d6
174 }
175 #else
Dio_schm_read_msr(void)176 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
177 {
178 mfmsr r3
179 }
180 #endif
181 #endif
182 #endif /*#ifdef GHS||CW*/
183
184 #ifdef _DIABDATA_C_S32ZE_
185 /**
186 * @brief This function returns the MSR register value (32 bits).
187 * @details This function returns the MSR register value (32 bits).
188 *
189 * @param[in] void No input parameters
190 * @return uint32 msr This function returns the MSR register value (32 bits).
191 *
192 * @pre None
193 * @post None
194 *
195 */
196 #ifdef MCAL_PLATFORM_ARM
Dio_schm_read_msr(void)197 uint32 Dio_schm_read_msr(void)
198 {
199 register uint32 reg_tmp;
200 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
201 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
202 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
203 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
204 #else
205 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
206 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
207 #else
208 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
209 #endif
210 #endif
211 return (uint32)reg_tmp;
212 }
213 #else
Dio_schm_read_msr(void)214 ASM_KEYWORD uint32 Dio_schm_read_msr(void)
215 {
216 mfmsr r3
217 }
218 #endif /* MCAL_PLATFORM_ARM */
219
220 #endif /* _DIABDATA_C_S32ZE_*/
221
222 #ifdef _COSMIC_C_S32ZE_
223 /*================================================================================================*/
224 /**
225 * @brief This function returns the MSR register value (32 bits).
226 * @details This function returns the MSR register value (32 bits).
227 *
228 * @param[in] void No input parameters
229 * @return uint32 msr This function returns the MSR register value (32 bits).
230 *
231 * @pre None
232 * @post None
233 *
234 */
235
236 #ifdef MCAL_PLATFORM_S12
237 #define Dio_schm_read_msr() ASM_KEYWORD("tfr ccr, d6")
238 #else
239 #define Dio_schm_read_msr() ASM_KEYWORD("mfmsr r3")
240 #endif
241
242 #endif /*Cosmic compiler only*/
243
244
245 #ifdef _HITECH_C_S32ZE_
246 /*================================================================================================*/
247 /**
248 * @brief This function returns the MSR register value (32 bits).
249 * @details This function returns the MSR register value (32 bits).
250 *
251 * @param[in] void No input parameters
252 * @return uint32 msr This function returns the MSR register value (32 bits).
253 *
254 * @pre None
255 * @post None
256 *
257 */
Dio_schm_read_msr(void)258 uint32 Dio_schm_read_msr(void)
259 {
260 uint32 result;
261 __asm volatile("mfmsr %0" : "=r" (result) :);
262 return result;
263 }
264
265 #endif /*HighTec compiler only*/
266 /*================================================================================================*/
267 #ifdef _LINARO_C_S32ZE_
268 /**
269 * @brief This function returns the MSR register value (32 bits).
270 * @details This function returns the MSR register value (32 bits).
271 *
272 * @param[in] void No input parameters
273 * @return uint32 msr This function returns the MSR register value (32 bits).
274 *
275 * @pre None
276 * @post None
277 *
278 */
Dio_schm_read_msr(void)279 uint32 Dio_schm_read_msr(void)
280 {
281 register uint32 reg_tmp;
282 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
283 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
284 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
285 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
286 #else
287 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
288 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
289 #else
290 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
291 #endif
292 #endif
293 return (uint32)reg_tmp;
294 }
295 #endif /* _LINARO_C_S32ZE_*/
296 /*================================================================================================*/
297
298 #ifdef _ARM_DS5_C_S32ZE_
299 /**
300 * @brief This function returns the MSR register value (32 bits).
301 * @details This function returns the MSR register value (32 bits).
302 *
303 * @param[in] void No input parameters
304 * @return uint32 msr This function returns the MSR register value (32 bits).
305 *
306 * @pre None
307 * @post None
308 *
309 */
Dio_schm_read_msr(void)310 uint32 Dio_schm_read_msr(void)
311 {
312 register uint32 reg_tmp;
313 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
314 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
315 #elif (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
316 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
317 #else
318 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
319 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
320 #else
321 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
322 #endif
323 #endif
324 return (uint32)reg_tmp;
325 }
326 #endif /* _ARM_DS5_C_S32ZE_ */
327
328 #ifdef _IAR_C_S32ZE_
329 /**
330 * @brief This function returns the MSR register value (32 bits).
331 * @details This function returns the MSR register value (32 bits).
332 *
333 * @param[in] void No input parameters
334 * @return uint32 msr This function returns the MSR register value (32 bits).
335 *
336 * @pre None
337 * @post None
338 *
339 */
Dio_schm_read_msr(void)340 uint32 Dio_schm_read_msr(void)
341 {
342 register uint32 reg_tmp;
343
344 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
345 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
346 #else
347 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
348 #endif
349
350 return (uint32)reg_tmp;
351 }
352 #endif /* _IAR_C_S32ZE_ */
353
354 #define RTE_STOP_SEC_CODE
355 #include "Rte_MemMap.h"
356
357 /*==================================================================================================
358 * GLOBAL FUNCTIONS
359 ==================================================================================================*/
360 #define RTE_START_SEC_CODE
361 #include "Rte_MemMap.h"
362
SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00(void)363 void SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_00(void)
364 {
365 uint32 msr;
366 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
367
368 if(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId])
369 {
370 #if (defined MCAL_ENABLE_USER_MODE_SUPPORT)
371 msr = OsIf_Trusted_Call_Return(Dio_schm_read_msr);
372 #else
373 msr = Dio_schm_read_msr(); /*read MSR (to store interrupts state)*/
374 #endif /* MCAL_ENABLE_USER_MODE_SUPPORT */
375 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/
376 {
377 OsIf_SuspendAllInterrupts();
378 #ifdef _ARM_DS5_C_S32ZE_
379 ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
380 #endif
381 }
382 msr_DIO_EXCLUSIVE_AREA_00[u32CoreId] = msr;
383 }
384 reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId]++;
385 }
386
SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_00(void)387 void SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_00(void)
388 {
389 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
390
391 reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId]--;
392 if ((ISR_ON(msr_DIO_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId])) /*if interrupts were enabled*/
393 {
394 OsIf_ResumeAllInterrupts();
395 #ifdef _ARM_DS5_C_S32ZE_
396 ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
397 #endif
398 }
399 }
400
SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_01(void)401 void SchM_Enter_Dio_DIO_EXCLUSIVE_AREA_01(void)
402 {
403 uint32 msr;
404 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
405
406 if(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId])
407 {
408 #if (defined MCAL_ENABLE_USER_MODE_SUPPORT)
409 msr = OsIf_Trusted_Call_Return(Dio_schm_read_msr);
410 #else
411 msr = Dio_schm_read_msr(); /*read MSR (to store interrupts state)*/
412 #endif /* MCAL_ENABLE_USER_MODE_SUPPORT */
413 if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/
414 {
415 OsIf_SuspendAllInterrupts();
416 #ifdef _ARM_DS5_C_S32ZE_
417 ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
418 #endif
419 }
420 msr_DIO_EXCLUSIVE_AREA_01[u32CoreId] = msr;
421 }
422 reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId]++;
423 }
424
SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_01(void)425 void SchM_Exit_Dio_DIO_EXCLUSIVE_AREA_01(void)
426 {
427 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
428
429 reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId]--;
430 if ((ISR_ON(msr_DIO_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId])) /*if interrupts were enabled*/
431 {
432 OsIf_ResumeAllInterrupts();
433 #ifdef _ARM_DS5_C_S32ZE_
434 ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
435 #endif
436 }
437 }
438
439
440 #ifdef MCAL_TESTING_ENVIRONMENT
441 /**
442 @brief This function checks that all entered exclusive areas were also exited.
443 @details This function checks that all entered exclusive areas were also exited. The check
444 is done by verifying that all reentry_guard_* static variables are back to the
445 zero value.
446
447 @param[in] void No input parameters
448 @return void This function does not return a value. Test asserts are used instead.
449
450 @pre None
451 @post None
452
453 @remarks Covers
454 @remarks Implements
455 */
SchM_Check_dio(void)456 void SchM_Check_dio(void)
457 {
458 uint32 u32CoreId = (uint32)OsIf_GetCoreID();
459
460 EU_ASSERT(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId]);
461 reentry_guard_DIO_EXCLUSIVE_AREA_00[u32CoreId] = 0UL; /*reset reentry_guard_DIO_EXCLUSIVE_AREA_00 for the next test in the suite*/
462
463 EU_ASSERT(0UL == reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId]);
464 reentry_guard_DIO_EXCLUSIVE_AREA_01[u32CoreId] = 0UL; /*reset reentry_guard_DIO_EXCLUSIVE_AREA_01 for the next test in the suite*/
465
466
467 }
468 #endif /*MCAL_TESTING_ENVIRONMENT*/
469
470 #define RTE_STOP_SEC_CODE
471 #include "Rte_MemMap.h"
472
473 #ifdef __cplusplus
474 }
475 #endif
476
477 /** @} */
478
