1 /*
2  * Copyright 2020-2023 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 /**
8 *   @file    SchM_Mcu.c
9 *   @version 3.0.0
10 *
11 *   @brief   AUTOSAR Rte - module implementation
12 *   @details This module implements stubs for the AUTOSAR Rte
13 *            This file contains sample code only. It is not part of the production code deliverables.
14 *
15 *   @addtogroup RTE_MODULE
16 *   @{
17 */
18 
19 #ifdef __cplusplus
20 extern "C"{
21 #endif
22 
23 /*==================================================================================================
24 *                                         INCLUDE FILES
25 * 1) system and project includes
26 * 2) needed interfaces from external units
27 * 3) internal and external interfaces from this unit
28 ==================================================================================================*/
29 #include "Std_Types.h"
30 #include "Mcal.h"
31 #include "OsIf.h"
32 #include "SchM_Mcu.h"
33 #ifdef MCAL_TESTING_ENVIRONMENT
34 #include "EUnit.h" /* EUnit Test Suite */
35 #endif
36 
37 /*==================================================================================================
38 *                               SOURCE FILE VERSION INFORMATION
39 ==================================================================================================*/
40 #define SCHM_MCU_AR_RELEASE_MAJOR_VERSION_C     4
41 #define SCHM_MCU_AR_RELEASE_MINOR_VERSION_C     7
42 #define SCHM_MCU_AR_RELEASE_REVISION_VERSION_C  0
43 #define SCHM_MCU_SW_MAJOR_VERSION_C             3
44 #define SCHM_MCU_SW_MINOR_VERSION_C             0
45 #define SCHM_MCU_SW_PATCH_VERSION_C             0
46 
47 /*==================================================================================================
48 *                                       LOCAL CONSTANTS
49 ==================================================================================================*/
50 #ifdef MCAL_PLATFORM_ARM
51     #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
52         #define ISR_STATE_MASK     ((uint32)0x000000C0UL)   /**< @brief DAIF bit I and F */
53     #elif  (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
54         #define ISR_STATE_MASK     ((uint32)0x00000080UL)   /**< @brief CPSR bit I */
55     #else
56         #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
57             #define ISR_STATE_MASK     ((uint32)0x000000FFUL)   /**< @brief BASEPRI[7:0] mask */
58         #else
59             #define ISR_STATE_MASK     ((uint32)0x00000001UL)   /**< @brief PRIMASK bit 0 */
60         #endif
61     #endif
62 #else
63     #ifdef MCAL_PLATFORM_S12
64         #define ISR_STATE_MASK     ((uint32)0x00000010UL)   /**< @brief I bit of CCR */
65     #else
66         #define ISR_STATE_MASK     ((uint32)0x00008000UL)   /**< @brief EE bit of MSR */
67     #endif
68 #endif
69 /*==================================================================================================
70 *                                       LOCAL MACROS
71 ==================================================================================================*/
72 #ifdef MCAL_PLATFORM_ARM
73     #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
74         #define ISR_ON(msr)            (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR_STATE_MASK))
75     #elif  (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
76         #define ISR_ON(msr)            (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) != (uint32)(ISR_STATE_MASK))
77     #else
78         #define ISR_ON(msr)            (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0)
79     #endif
80 #else
81     #ifdef MCAL_PLATFORM_S12
82         #define ISR_ON(msr)            (uint32)(((uint32)(msr) & (uint32)(ISR_STATE_MASK)) == (uint32)0)
83     #else
84         #define ISR_ON(msr)            (uint32)((uint32)(msr) & (uint32)(ISR_STATE_MASK))
85     #endif
86 #endif
87 
88 /*==================================================================================================
89 *                                      FILE VERSION CHECKS
90 ==================================================================================================*/
91 
92 /*==================================================================================================
93 *                          LOCAL TYPEDEFS (STRUCTURES, UNIONS, ENUMS)
94 ==================================================================================================*/
95 
96 
97 /*==================================================================================================
98 *                                       LOCAL VARIABLES
99 ==================================================================================================*/
100 #define RTE_START_SEC_VAR_CLEARED_32_NO_CACHEABLE
101 #include "Rte_MemMap.h"
102 VAR_SEC_NOCACHE(msr_MCU_EXCLUSIVE_AREA_00) static volatile uint32 msr_MCU_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
103 VAR_SEC_NOCACHE(reentry_guard_MCU_EXCLUSIVE_AREA_00) static volatile uint32 reentry_guard_MCU_EXCLUSIVE_AREA_00[NUMBER_OF_CORES];
104 VAR_SEC_NOCACHE(msr_MCU_EXCLUSIVE_AREA_01) static volatile uint32 msr_MCU_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
105 VAR_SEC_NOCACHE(reentry_guard_MCU_EXCLUSIVE_AREA_01) static volatile uint32 reentry_guard_MCU_EXCLUSIVE_AREA_01[NUMBER_OF_CORES];
106 VAR_SEC_NOCACHE(msr_MCU_EXCLUSIVE_AREA_02) static volatile uint32 msr_MCU_EXCLUSIVE_AREA_02[NUMBER_OF_CORES];
107 VAR_SEC_NOCACHE(reentry_guard_MCU_EXCLUSIVE_AREA_02) static volatile uint32 reentry_guard_MCU_EXCLUSIVE_AREA_02[NUMBER_OF_CORES];
108 
109 #define RTE_STOP_SEC_VAR_CLEARED_32_NO_CACHEABLE
110 #include "Rte_MemMap.h"
111 /*==================================================================================================
112 *                                       GLOBAL CONSTANTS
113 ==================================================================================================*/
114 
115 
116 /*==================================================================================================
117 *                                       GLOBAL VARIABLES
118 ==================================================================================================*/
119 
120 /*==================================================================================================
121 *                                   LOCAL FUNCTION PROTOTYPES
122 ==================================================================================================*/
123 
124 #ifndef _COSMIC_C_S32K3XX_
125 /*================================================================================================*/
126 /**
127 * @brief   This function returns the MSR register value (32 bits).
128 * @details This function returns the MSR register value (32 bits).
129 *
130 * @param[in]     void        No input parameters
131 * @return        uint32 msr  This function returns the MSR register value (32 bits).
132 *
133 * @pre  None
134 * @post None
135 *
136 */
137 uint32 Mcu_schm_read_msr(void);
138 #endif /*ifndef _COSMIC_C_S32K3XX_*/
139 /*==================================================================================================
140 *                                       LOCAL FUNCTIONS
141 ==================================================================================================*/
142 #define RTE_START_SEC_CODE
143 #include "Rte_MemMap.h"
144 
145 #if (defined(_GREENHILLS_C_S32K3XX_) || defined(_CODEWARRIOR_C_S32K3XX_))
146 /*================================================================================================*/
147 /**
148 * @brief   This macro returns the MSR register value (32 bits).
149 * @details This macro function implementation returns the MSR register value in r3 (32 bits).
150 *
151 * @pre  None
152 * @post None
153 *
154 */
155 #ifdef MCAL_PLATFORM_ARM
156 #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
Mcu_schm_read_msr(void)157 ASM_KEYWORD uint32 Mcu_schm_read_msr(void)
158 {
159     mrs x0, S3_3_c4_c2_1
160 }
161 #elif  (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
Mcu_schm_read_msr(void)162 ASM_KEYWORD uint32 Mcu_schm_read_msr(void)
163 {
164     mrs r0, CPSR
165 }
166 #else
Mcu_schm_read_msr(void)167 ASM_KEYWORD uint32 Mcu_schm_read_msr(void)
168 {
169 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
170     mrs r0, BASEPRI
171 #else
172     mrs r0, PRIMASK
173 #endif
174 }
175 #endif
176 #else
177 #ifdef MCAL_PLATFORM_S12
Mcu_schm_read_msr(void)178 ASM_KEYWORD uint32 Mcu_schm_read_msr(void)
179 {
180    tfr ccr, d6
181 }
182 #else
Mcu_schm_read_msr(void)183 ASM_KEYWORD uint32 Mcu_schm_read_msr(void)
184 {
185     mfmsr r3
186 }
187 #endif
188 #endif
189 #endif /*#ifdef GHS||CW*/
190 
191 #ifdef _DIABDATA_C_S32K3XX_
192 /**
193 * @brief   This function returns the MSR register value (32 bits).
194 * @details This function returns the MSR register value (32 bits).
195 *
196 * @param[in]     void        No input parameters
197 * @return        uint32 msr  This function returns the MSR register value (32 bits).
198 *
199 * @pre  None
200 * @post None
201 *
202 */
203 #ifdef MCAL_PLATFORM_ARM
Mcu_schm_read_msr(void)204 uint32 Mcu_schm_read_msr(void)
205 {
206     register uint32 reg_tmp;
207     #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
208         __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
209     #elif  (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
210         __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
211     #else
212         #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
213         __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
214         #else
215         __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
216         #endif
217     #endif
218     return (uint32)reg_tmp;
219 }
220 #else
Mcu_schm_read_msr(void)221 ASM_KEYWORD uint32 Mcu_schm_read_msr(void)
222 {
223     mfmsr r3
224 }
225 #endif  /* MCAL_PLATFORM_ARM */
226 
227 #endif   /* _DIABDATA_C_S32K3XX_*/
228 
229 #ifdef _COSMIC_C_S32K3XX_
230 /*================================================================================================*/
231 /**
232 * @brief   This function returns the MSR register value (32 bits).
233 * @details This function returns the MSR register value (32 bits).
234 *
235 * @param[in]     void        No input parameters
236 * @return        uint32 msr  This function returns the MSR register value (32 bits).
237 *
238 * @pre  None
239 * @post None
240 *
241 */
242 
243 #ifdef MCAL_PLATFORM_S12
244     #define Mcu_schm_read_msr()  ASM_KEYWORD("tfr ccr, d6")
245 #else
246     #define Mcu_schm_read_msr() ASM_KEYWORD("mfmsr r3")
247 #endif
248 
249 #endif  /*Cosmic compiler only*/
250 
251 
252 #ifdef _HITECH_C_S32K3XX_
253 /*================================================================================================*/
254 /**
255 * @brief   This function returns the MSR register value (32 bits).
256 * @details This function returns the MSR register value (32 bits).
257 *
258 * @param[in]     void        No input parameters
259 * @return        uint32 msr  This function returns the MSR register value (32 bits).
260 *
261 * @pre  None
262 * @post None
263 *
264 */
Mcu_schm_read_msr(void)265 uint32 Mcu_schm_read_msr(void)
266 {
267     uint32 result;
268     __asm volatile("mfmsr %0" : "=r" (result) :);
269     return result;
270 }
271 
272 #endif  /*HighTec compiler only*/
273  /*================================================================================================*/
274 #ifdef _LINARO_C_S32K3XX_
275 /**
276 * @brief   This function returns the MSR register value (32 bits).
277 * @details This function returns the MSR register value (32 bits).
278 *
279 * @param[in]     void        No input parameters
280 * @return        uint32 msr  This function returns the MSR register value (32 bits).
281 *
282 * @pre  None
283 * @post None
284 *
285 */
Mcu_schm_read_msr(void)286 uint32 Mcu_schm_read_msr(void)
287 {
288     register uint32 reg_tmp;
289     #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
290         __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
291     #elif  (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
292         __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
293     #else
294         #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
295         __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
296         #else
297         __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
298         #endif
299     #endif
300     return (uint32)reg_tmp;
301 }
302 #endif   /* _LINARO_C_S32K3XX_*/
303 /*================================================================================================*/
304 
305 #ifdef _ARM_DS5_C_S32K3XX_
306 /**
307 * @brief   This function returns the MSR register value (32 bits).
308 * @details This function returns the MSR register value (32 bits).
309 *
310 * @param[in]     void        No input parameters
311 * @return        uint32 msr  This function returns the MSR register value (32 bits).
312 *
313 * @pre  None
314 * @post None
315 *
316 */
Mcu_schm_read_msr(void)317 uint32 Mcu_schm_read_msr(void)
318 {
319     register uint32 reg_tmp;
320     #if (MCAL_PLATFORM_ARM == MCAL_ARM_AARCH64)
321         __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) );
322     #elif  (MCAL_PLATFORM_ARM == MCAL_ARM_RARCH)
323         __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) );
324     #else
325         #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
326         __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
327         #else
328         __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
329         #endif
330     #endif
331     return (uint32)reg_tmp;
332 }
333 #endif   /* _ARM_DS5_C_S32K3XX_ */
334 
335 #ifdef _IAR_C_S32K3XX_
336 /**
337 * @brief   This function returns the MSR register value (32 bits).
338 * @details This function returns the MSR register value (32 bits).
339 *
340 * @param[in]     void        No input parameters
341 * @return        uint32 msr  This function returns the MSR register value (32 bits).
342 *
343 * @pre  None
344 * @post None
345 *
346 */
Mcu_schm_read_msr(void)347 uint32 Mcu_schm_read_msr(void)
348 {
349     register uint32 reg_tmp;
350 
351 #if ((defined MCAL_ENABLE_USER_MODE_SUPPORT)&&(!defined MCAL_PLATFORM_ARM_M0PLUS))
352    __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) );
353 #else
354    __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) );
355 #endif
356 
357     return (uint32)reg_tmp;
358 }
359 #endif   /* _IAR_C_S32K3XX_ */
360 
361 #define RTE_STOP_SEC_CODE
362 #include "Rte_MemMap.h"
363 
364 /*==================================================================================================
365 *                                        GLOBAL FUNCTIONS
366 ==================================================================================================*/
367 #define RTE_START_SEC_CODE
368 #include "Rte_MemMap.h"
369 
SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00(void)370 void SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_00(void)
371 {
372     uint32 msr;
373     uint32 u32CoreId = (uint32)OsIf_GetCoreID();
374 
375     if(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId])
376     {
377 #if (defined MCAL_ENABLE_USER_MODE_SUPPORT)
378         msr = OsIf_Trusted_Call_Return(Mcu_schm_read_msr);
379 #else
380         msr = Mcu_schm_read_msr();  /*read MSR (to store interrupts state)*/
381 #endif /* MCAL_ENABLE_USER_MODE_SUPPORT */
382         if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/
383         {
384             OsIf_SuspendAllInterrupts();
385 #ifdef _ARM_DS5_C_S32K3XX_
386             ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
387 #endif
388         }
389         msr_MCU_EXCLUSIVE_AREA_00[u32CoreId] = msr;
390     }
391     reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId]++;
392 }
393 
SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00(void)394 void SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_00(void)
395 {
396     uint32 u32CoreId = (uint32)OsIf_GetCoreID();
397 
398     reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId]--;
399     if ((ISR_ON(msr_MCU_EXCLUSIVE_AREA_00[u32CoreId]))&&(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId]))         /*if interrupts were enabled*/
400     {
401         OsIf_ResumeAllInterrupts();
402 #ifdef _ARM_DS5_C_S32K3XX_
403         ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
404 #endif
405     }
406 }
407 
SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01(void)408 void SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_01(void)
409 {
410     uint32 msr;
411     uint32 u32CoreId = (uint32)OsIf_GetCoreID();
412 
413     if(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId])
414     {
415 #if (defined MCAL_ENABLE_USER_MODE_SUPPORT)
416         msr = OsIf_Trusted_Call_Return(Mcu_schm_read_msr);
417 #else
418         msr = Mcu_schm_read_msr();  /*read MSR (to store interrupts state)*/
419 #endif /* MCAL_ENABLE_USER_MODE_SUPPORT */
420         if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/
421         {
422             OsIf_SuspendAllInterrupts();
423 #ifdef _ARM_DS5_C_S32K3XX_
424             ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
425 #endif
426         }
427         msr_MCU_EXCLUSIVE_AREA_01[u32CoreId] = msr;
428     }
429     reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId]++;
430 }
431 
SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01(void)432 void SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_01(void)
433 {
434     uint32 u32CoreId = (uint32)OsIf_GetCoreID();
435 
436     reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId]--;
437     if ((ISR_ON(msr_MCU_EXCLUSIVE_AREA_01[u32CoreId]))&&(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId]))         /*if interrupts were enabled*/
438     {
439         OsIf_ResumeAllInterrupts();
440 #ifdef _ARM_DS5_C_S32K3XX_
441         ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
442 #endif
443     }
444 }
445 
SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02(void)446 void SchM_Enter_Mcu_MCU_EXCLUSIVE_AREA_02(void)
447 {
448     uint32 msr;
449     uint32 u32CoreId = (uint32)OsIf_GetCoreID();
450 
451     if(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId])
452     {
453 #if (defined MCAL_ENABLE_USER_MODE_SUPPORT)
454         msr = OsIf_Trusted_Call_Return(Mcu_schm_read_msr);
455 #else
456         msr = Mcu_schm_read_msr();  /*read MSR (to store interrupts state)*/
457 #endif /* MCAL_ENABLE_USER_MODE_SUPPORT */
458         if (ISR_ON(msr)) /*if MSR[EE] = 0, skip calling Suspend/Resume AllInterrupts*/
459         {
460             OsIf_SuspendAllInterrupts();
461 #ifdef _ARM_DS5_C_S32K3XX_
462             ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
463 #endif
464         }
465         msr_MCU_EXCLUSIVE_AREA_02[u32CoreId] = msr;
466     }
467     reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId]++;
468 }
469 
SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02(void)470 void SchM_Exit_Mcu_MCU_EXCLUSIVE_AREA_02(void)
471 {
472     uint32 u32CoreId = (uint32)OsIf_GetCoreID();
473 
474     reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId]--;
475     if ((ISR_ON(msr_MCU_EXCLUSIVE_AREA_02[u32CoreId]))&&(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId]))         /*if interrupts were enabled*/
476     {
477         OsIf_ResumeAllInterrupts();
478 #ifdef _ARM_DS5_C_S32K3XX_
479         ASM_KEYWORD(" nop ");/* Compiler fix - forces the CSPID instruction to be generated with -02, -Ospace are selected*/
480 #endif
481     }
482 }
483 
484 
485 #ifdef MCAL_TESTING_ENVIRONMENT
486 /**
487 @brief   This function checks that all entered exclusive areas were also exited.
488 @details This function checks that all entered exclusive areas were also exited. The check
489          is done by verifying that all reentry_guard_* static variables are back to the
490          zero value.
491 
492 @param[in]     void       No input parameters
493 @return        void       This function does not return a value. Test asserts are used instead.
494 
495 @pre  None
496 @post None
497 
498 @remarks Covers
499 @remarks Implements
500 */
SchM_Check_mcu(void)501 void SchM_Check_mcu(void)
502 {
503     uint32 u32CoreId = (uint32)OsIf_GetCoreID();
504 
505     EU_ASSERT(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId]);
506     reentry_guard_MCU_EXCLUSIVE_AREA_00[u32CoreId] = 0UL; /*reset reentry_guard_MCU_EXCLUSIVE_AREA_00 for the next test in the suite*/
507 
508     EU_ASSERT(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId]);
509     reentry_guard_MCU_EXCLUSIVE_AREA_01[u32CoreId] = 0UL; /*reset reentry_guard_MCU_EXCLUSIVE_AREA_01 for the next test in the suite*/
510 
511     EU_ASSERT(0UL == reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId]);
512     reentry_guard_MCU_EXCLUSIVE_AREA_02[u32CoreId] = 0UL; /*reset reentry_guard_MCU_EXCLUSIVE_AREA_02 for the next test in the suite*/
513 
514 
515 }
516 #endif /*MCAL_TESTING_ENVIRONMENT*/
517 
518 #define RTE_STOP_SEC_CODE
519 #include "Rte_MemMap.h"
520 
521 #ifdef __cplusplus
522 }
523 #endif
524 
525 /** @} */
526