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/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg41/component/
Dpm.h29 #define PM_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define PM_CTRLA_IORET_Pos _UINT8_(2) …
32 #define PM_CTRLA_IORET_Msk (_UINT8_(0x1) << PM_CTRLA_IORET_Pos) …
33 #define PM_CTRLA_IORET(value) (PM_CTRLA_IORET_Msk & (_UINT8_(value) << PM_CTRLA_IOR…
34 #define PM_CTRLA_Msk _UINT8_(0x04) …
38 #define PM_SLEEPCFG_RESETVALUE _UINT8_(0x02) …
40 #define PM_SLEEPCFG_SLEEPMODE_Pos _UINT8_(0) …
41 #define PM_SLEEPCFG_SLEEPMODE_Msk (_UINT8_(0x7) << PM_SLEEPCFG_SLEEPMODE_Pos) …
42 #define PM_SLEEPCFG_SLEEPMODE(value) (PM_SLEEPCFG_SLEEPMODE_Msk & (_UINT8_(value) << PM_SL…
43 #define PM_SLEEPCFG_SLEEPMODE_IDLE_Val _UINT8_(0x2) …
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Ddac.h29 #define DAC_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define DAC_CTRLA_SWRST_Pos _UINT8_(0) …
32 #define DAC_CTRLA_SWRST_Msk (_UINT8_(0x1) << DAC_CTRLA_SWRST_Pos) …
33 #define DAC_CTRLA_SWRST(value) (DAC_CTRLA_SWRST_Msk & (_UINT8_(value) << DAC_CTRLA_S…
34 #define DAC_CTRLA_ENABLE_Pos _UINT8_(1) …
35 #define DAC_CTRLA_ENABLE_Msk (_UINT8_(0x1) << DAC_CTRLA_ENABLE_Pos) …
36 #define DAC_CTRLA_ENABLE(value) (DAC_CTRLA_ENABLE_Msk & (_UINT8_(value) << DAC_CTRLA_…
37 #define DAC_CTRLA_Msk _UINT8_(0x03) …
41 #define DAC_CTRLB_RESETVALUE _UINT8_(0x02) …
43 #define DAC_CTRLB_DIFF_Pos _UINT8_(0) …
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Dwdt.h29 #define WDT_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define WDT_CTRLA_ENABLE_Pos _UINT8_(1) …
32 #define WDT_CTRLA_ENABLE_Msk (_UINT8_(0x1) << WDT_CTRLA_ENABLE_Pos) …
33 #define WDT_CTRLA_ENABLE(value) (WDT_CTRLA_ENABLE_Msk & (_UINT8_(value) << WDT_CTRLA_…
34 #define WDT_CTRLA_WEN_Pos _UINT8_(2) …
35 #define WDT_CTRLA_WEN_Msk (_UINT8_(0x1) << WDT_CTRLA_WEN_Pos) …
36 #define WDT_CTRLA_WEN(value) (WDT_CTRLA_WEN_Msk & (_UINT8_(value) << WDT_CTRLA_WEN…
37 #define WDT_CTRLA_ALWAYSON_Pos _UINT8_(7) …
38 #define WDT_CTRLA_ALWAYSON_Msk (_UINT8_(0x1) << WDT_CTRLA_ALWAYSON_Pos) …
39 #define WDT_CTRLA_ALWAYSON(value) (WDT_CTRLA_ALWAYSON_Msk & (_UINT8_(value) << WDT_CTRL…
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Dusb.h62 #define USB_DEVICE_STATUS_BK_CRCERR_Pos _UINT8_(0) …
63 #define USB_DEVICE_STATUS_BK_CRCERR_Msk (_UINT8_(0x1) << USB_DEVICE_STATUS_BK_CRCERR_Pos) …
64 #define USB_DEVICE_STATUS_BK_CRCERR(value) (USB_DEVICE_STATUS_BK_CRCERR_Msk & (_UINT8_(value) <<…
65 #define USB_DEVICE_STATUS_BK_ERRORFLOW_Pos _UINT8_(1) …
66 #define USB_DEVICE_STATUS_BK_ERRORFLOW_Msk (_UINT8_(0x1) << USB_DEVICE_STATUS_BK_ERRORFLOW_Pos) …
67 #define USB_DEVICE_STATUS_BK_ERRORFLOW(value) (USB_DEVICE_STATUS_BK_ERRORFLOW_Msk & (_UINT8_(value)…
68 #define USB_DEVICE_STATUS_BK_Msk _UINT8_(0x03) …
105 #define USB_HOST_STATUS_BK_CRCERR_Pos _UINT8_(0) …
106 #define USB_HOST_STATUS_BK_CRCERR_Msk (_UINT8_(0x1) << USB_HOST_STATUS_BK_CRCERR_Pos) …
107 #define USB_HOST_STATUS_BK_CRCERR(value) (USB_HOST_STATUS_BK_CRCERR_Msk & (_UINT8_(value) << U…
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Drstc.h29 #define RSTC_RCAUSE_POR_Pos _UINT8_(0) …
30 #define RSTC_RCAUSE_POR_Msk (_UINT8_(0x1) << RSTC_RCAUSE_POR_Pos) …
31 #define RSTC_RCAUSE_POR(value) (RSTC_RCAUSE_POR_Msk & (_UINT8_(value) << RSTC_RCAUSE…
32 #define RSTC_RCAUSE_BOD12_Pos _UINT8_(1) …
33 #define RSTC_RCAUSE_BOD12_Msk (_UINT8_(0x1) << RSTC_RCAUSE_BOD12_Pos) …
34 #define RSTC_RCAUSE_BOD12(value) (RSTC_RCAUSE_BOD12_Msk & (_UINT8_(value) << RSTC_RCAU…
35 #define RSTC_RCAUSE_BOD33_Pos _UINT8_(2) …
36 #define RSTC_RCAUSE_BOD33_Msk (_UINT8_(0x1) << RSTC_RCAUSE_BOD33_Pos) …
37 #define RSTC_RCAUSE_BOD33(value) (RSTC_RCAUSE_BOD33_Msk & (_UINT8_(value) << RSTC_RCAU…
38 #define RSTC_RCAUSE_NVM_Pos _UINT8_(3) …
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Dtc.h123 #define TC_CTRLBCLR_RESETVALUE _UINT8_(0x00) …
125 #define TC_CTRLBCLR_DIR_Pos _UINT8_(0) …
126 #define TC_CTRLBCLR_DIR_Msk (_UINT8_(0x1) << TC_CTRLBCLR_DIR_Pos) …
127 #define TC_CTRLBCLR_DIR(value) (TC_CTRLBCLR_DIR_Msk & (_UINT8_(value) << TC_CTRLBCLR…
128 #define TC_CTRLBCLR_LUPD_Pos _UINT8_(1) …
129 #define TC_CTRLBCLR_LUPD_Msk (_UINT8_(0x1) << TC_CTRLBCLR_LUPD_Pos) …
130 #define TC_CTRLBCLR_LUPD(value) (TC_CTRLBCLR_LUPD_Msk & (_UINT8_(value) << TC_CTRLBCL…
131 #define TC_CTRLBCLR_ONESHOT_Pos _UINT8_(2) …
132 #define TC_CTRLBCLR_ONESHOT_Msk (_UINT8_(0x1) << TC_CTRLBCLR_ONESHOT_Pos) …
133 #define TC_CTRLBCLR_ONESHOT(value) (TC_CTRLBCLR_ONESHOT_Msk & (_UINT8_(value) << TC_CTRL…
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Dpdec.h105 #define PDEC_CTRLBCLR_RESETVALUE _UINT8_(0x00) …
107 #define PDEC_CTRLBCLR_LUPD_Pos _UINT8_(1) …
108 #define PDEC_CTRLBCLR_LUPD_Msk (_UINT8_(0x1) << PDEC_CTRLBCLR_LUPD_Pos) …
109 #define PDEC_CTRLBCLR_LUPD(value) (PDEC_CTRLBCLR_LUPD_Msk & (_UINT8_(value) << PDEC_CTR…
110 #define PDEC_CTRLBCLR_CMD_Pos _UINT8_(5) …
111 #define PDEC_CTRLBCLR_CMD_Msk (_UINT8_(0x7) << PDEC_CTRLBCLR_CMD_Pos) …
112 #define PDEC_CTRLBCLR_CMD(value) (PDEC_CTRLBCLR_CMD_Msk & (_UINT8_(value) << PDEC_CTRL…
113 #define PDEC_CTRLBCLR_CMD_NONE_Val _UINT8_(0x0) …
114 #define PDEC_CTRLBCLR_CMD_RETRIGGER_Val _UINT8_(0x1) …
115 #define PDEC_CTRLBCLR_CMD_UPDATE_Val _UINT8_(0x2) …
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Dac.h29 #define AC_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define AC_CTRLA_SWRST_Pos _UINT8_(0) …
32 #define AC_CTRLA_SWRST_Msk (_UINT8_(0x1) << AC_CTRLA_SWRST_Pos) …
33 #define AC_CTRLA_SWRST(value) (AC_CTRLA_SWRST_Msk & (_UINT8_(value) << AC_CTRLA_SWR…
34 #define AC_CTRLA_ENABLE_Pos _UINT8_(1) …
35 #define AC_CTRLA_ENABLE_Msk (_UINT8_(0x1) << AC_CTRLA_ENABLE_Pos) …
36 #define AC_CTRLA_ENABLE(value) (AC_CTRLA_ENABLE_Msk & (_UINT8_(value) << AC_CTRLA_EN…
37 #define AC_CTRLA_Msk _UINT8_(0x03) …
41 #define AC_CTRLB_RESETVALUE _UINT8_(0x00) …
43 #define AC_CTRLB_START0_Pos _UINT8_(0) …
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Dramecc.h29 #define RAMECC_INTENCLR_RESETVALUE _UINT8_(0x00) …
31 #define RAMECC_INTENCLR_SINGLEE_Pos _UINT8_(0) …
32 #define RAMECC_INTENCLR_SINGLEE_Msk (_UINT8_(0x1) << RAMECC_INTENCLR_SINGLEE_Pos) …
33 #define RAMECC_INTENCLR_SINGLEE(value) (RAMECC_INTENCLR_SINGLEE_Msk & (_UINT8_(value) << RAM…
34 #define RAMECC_INTENCLR_DUALE_Pos _UINT8_(1) …
35 #define RAMECC_INTENCLR_DUALE_Msk (_UINT8_(0x1) << RAMECC_INTENCLR_DUALE_Pos) …
36 #define RAMECC_INTENCLR_DUALE(value) (RAMECC_INTENCLR_DUALE_Msk & (_UINT8_(value) << RAMEC…
37 #define RAMECC_INTENCLR_Msk _UINT8_(0x03) …
41 #define RAMECC_INTENSET_RESETVALUE _UINT8_(0x00) …
43 #define RAMECC_INTENSET_SINGLEE_Pos _UINT8_(0) …
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/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg61/component/
Dpm.h29 #define PM_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define PM_CTRLA_IORET_Pos _UINT8_(2) …
32 #define PM_CTRLA_IORET_Msk (_UINT8_(0x1) << PM_CTRLA_IORET_Pos) …
33 #define PM_CTRLA_IORET(value) (PM_CTRLA_IORET_Msk & (_UINT8_(value) << PM_CTRLA_IOR…
34 #define PM_CTRLA_Msk _UINT8_(0x04) …
38 #define PM_SLEEPCFG_RESETVALUE _UINT8_(0x02) …
40 #define PM_SLEEPCFG_SLEEPMODE_Pos _UINT8_(0) …
41 #define PM_SLEEPCFG_SLEEPMODE_Msk (_UINT8_(0x7) << PM_SLEEPCFG_SLEEPMODE_Pos) …
42 #define PM_SLEEPCFG_SLEEPMODE(value) (PM_SLEEPCFG_SLEEPMODE_Msk & (_UINT8_(value) << PM_SL…
43 #define PM_SLEEPCFG_SLEEPMODE_IDLE_Val _UINT8_(0x2) …
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Ddac.h29 #define DAC_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define DAC_CTRLA_SWRST_Pos _UINT8_(0) …
32 #define DAC_CTRLA_SWRST_Msk (_UINT8_(0x1) << DAC_CTRLA_SWRST_Pos) …
33 #define DAC_CTRLA_SWRST(value) (DAC_CTRLA_SWRST_Msk & (_UINT8_(value) << DAC_CTRLA_S…
34 #define DAC_CTRLA_ENABLE_Pos _UINT8_(1) …
35 #define DAC_CTRLA_ENABLE_Msk (_UINT8_(0x1) << DAC_CTRLA_ENABLE_Pos) …
36 #define DAC_CTRLA_ENABLE(value) (DAC_CTRLA_ENABLE_Msk & (_UINT8_(value) << DAC_CTRLA_…
37 #define DAC_CTRLA_Msk _UINT8_(0x03) …
41 #define DAC_CTRLB_RESETVALUE _UINT8_(0x02) …
43 #define DAC_CTRLB_DIFF_Pos _UINT8_(0) …
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Dwdt.h29 #define WDT_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define WDT_CTRLA_ENABLE_Pos _UINT8_(1) …
32 #define WDT_CTRLA_ENABLE_Msk (_UINT8_(0x1) << WDT_CTRLA_ENABLE_Pos) …
33 #define WDT_CTRLA_ENABLE(value) (WDT_CTRLA_ENABLE_Msk & (_UINT8_(value) << WDT_CTRLA_…
34 #define WDT_CTRLA_WEN_Pos _UINT8_(2) …
35 #define WDT_CTRLA_WEN_Msk (_UINT8_(0x1) << WDT_CTRLA_WEN_Pos) …
36 #define WDT_CTRLA_WEN(value) (WDT_CTRLA_WEN_Msk & (_UINT8_(value) << WDT_CTRLA_WEN…
37 #define WDT_CTRLA_ALWAYSON_Pos _UINT8_(7) …
38 #define WDT_CTRLA_ALWAYSON_Msk (_UINT8_(0x1) << WDT_CTRLA_ALWAYSON_Pos) …
39 #define WDT_CTRLA_ALWAYSON(value) (WDT_CTRLA_ALWAYSON_Msk & (_UINT8_(value) << WDT_CTRL…
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Dusb.h62 #define USB_DEVICE_STATUS_BK_CRCERR_Pos _UINT8_(0) …
63 #define USB_DEVICE_STATUS_BK_CRCERR_Msk (_UINT8_(0x1) << USB_DEVICE_STATUS_BK_CRCERR_Pos) …
64 #define USB_DEVICE_STATUS_BK_CRCERR(value) (USB_DEVICE_STATUS_BK_CRCERR_Msk & (_UINT8_(value) <<…
65 #define USB_DEVICE_STATUS_BK_ERRORFLOW_Pos _UINT8_(1) …
66 #define USB_DEVICE_STATUS_BK_ERRORFLOW_Msk (_UINT8_(0x1) << USB_DEVICE_STATUS_BK_ERRORFLOW_Pos) …
67 #define USB_DEVICE_STATUS_BK_ERRORFLOW(value) (USB_DEVICE_STATUS_BK_ERRORFLOW_Msk & (_UINT8_(value)…
68 #define USB_DEVICE_STATUS_BK_Msk _UINT8_(0x03) …
105 #define USB_HOST_STATUS_BK_CRCERR_Pos _UINT8_(0) …
106 #define USB_HOST_STATUS_BK_CRCERR_Msk (_UINT8_(0x1) << USB_HOST_STATUS_BK_CRCERR_Pos) …
107 #define USB_HOST_STATUS_BK_CRCERR(value) (USB_HOST_STATUS_BK_CRCERR_Msk & (_UINT8_(value) << U…
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Drstc.h29 #define RSTC_RCAUSE_POR_Pos _UINT8_(0) …
30 #define RSTC_RCAUSE_POR_Msk (_UINT8_(0x1) << RSTC_RCAUSE_POR_Pos) …
31 #define RSTC_RCAUSE_POR(value) (RSTC_RCAUSE_POR_Msk & (_UINT8_(value) << RSTC_RCAUSE…
32 #define RSTC_RCAUSE_BOD12_Pos _UINT8_(1) …
33 #define RSTC_RCAUSE_BOD12_Msk (_UINT8_(0x1) << RSTC_RCAUSE_BOD12_Pos) …
34 #define RSTC_RCAUSE_BOD12(value) (RSTC_RCAUSE_BOD12_Msk & (_UINT8_(value) << RSTC_RCAU…
35 #define RSTC_RCAUSE_BOD33_Pos _UINT8_(2) …
36 #define RSTC_RCAUSE_BOD33_Msk (_UINT8_(0x1) << RSTC_RCAUSE_BOD33_Pos) …
37 #define RSTC_RCAUSE_BOD33(value) (RSTC_RCAUSE_BOD33_Msk & (_UINT8_(value) << RSTC_RCAU…
38 #define RSTC_RCAUSE_NVM_Pos _UINT8_(3) …
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Dtc.h123 #define TC_CTRLBCLR_RESETVALUE _UINT8_(0x00) …
125 #define TC_CTRLBCLR_DIR_Pos _UINT8_(0) …
126 #define TC_CTRLBCLR_DIR_Msk (_UINT8_(0x1) << TC_CTRLBCLR_DIR_Pos) …
127 #define TC_CTRLBCLR_DIR(value) (TC_CTRLBCLR_DIR_Msk & (_UINT8_(value) << TC_CTRLBCLR…
128 #define TC_CTRLBCLR_LUPD_Pos _UINT8_(1) …
129 #define TC_CTRLBCLR_LUPD_Msk (_UINT8_(0x1) << TC_CTRLBCLR_LUPD_Pos) …
130 #define TC_CTRLBCLR_LUPD(value) (TC_CTRLBCLR_LUPD_Msk & (_UINT8_(value) << TC_CTRLBCL…
131 #define TC_CTRLBCLR_ONESHOT_Pos _UINT8_(2) …
132 #define TC_CTRLBCLR_ONESHOT_Msk (_UINT8_(0x1) << TC_CTRLBCLR_ONESHOT_Pos) …
133 #define TC_CTRLBCLR_ONESHOT(value) (TC_CTRLBCLR_ONESHOT_Msk & (_UINT8_(value) << TC_CTRL…
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Dpdec.h105 #define PDEC_CTRLBCLR_RESETVALUE _UINT8_(0x00) …
107 #define PDEC_CTRLBCLR_LUPD_Pos _UINT8_(1) …
108 #define PDEC_CTRLBCLR_LUPD_Msk (_UINT8_(0x1) << PDEC_CTRLBCLR_LUPD_Pos) …
109 #define PDEC_CTRLBCLR_LUPD(value) (PDEC_CTRLBCLR_LUPD_Msk & (_UINT8_(value) << PDEC_CTR…
110 #define PDEC_CTRLBCLR_CMD_Pos _UINT8_(5) …
111 #define PDEC_CTRLBCLR_CMD_Msk (_UINT8_(0x7) << PDEC_CTRLBCLR_CMD_Pos) …
112 #define PDEC_CTRLBCLR_CMD(value) (PDEC_CTRLBCLR_CMD_Msk & (_UINT8_(value) << PDEC_CTRL…
113 #define PDEC_CTRLBCLR_CMD_NONE_Val _UINT8_(0x0) …
114 #define PDEC_CTRLBCLR_CMD_RETRIGGER_Val _UINT8_(0x1) …
115 #define PDEC_CTRLBCLR_CMD_UPDATE_Val _UINT8_(0x2) …
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Dac.h29 #define AC_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define AC_CTRLA_SWRST_Pos _UINT8_(0) …
32 #define AC_CTRLA_SWRST_Msk (_UINT8_(0x1) << AC_CTRLA_SWRST_Pos) …
33 #define AC_CTRLA_SWRST(value) (AC_CTRLA_SWRST_Msk & (_UINT8_(value) << AC_CTRLA_SWR…
34 #define AC_CTRLA_ENABLE_Pos _UINT8_(1) …
35 #define AC_CTRLA_ENABLE_Msk (_UINT8_(0x1) << AC_CTRLA_ENABLE_Pos) …
36 #define AC_CTRLA_ENABLE(value) (AC_CTRLA_ENABLE_Msk & (_UINT8_(value) << AC_CTRLA_EN…
37 #define AC_CTRLA_Msk _UINT8_(0x03) …
41 #define AC_CTRLB_RESETVALUE _UINT8_(0x00) …
43 #define AC_CTRLB_START0_Pos _UINT8_(0) …
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/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg60/component/
Dpm.h29 #define PM_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define PM_CTRLA_IORET_Pos _UINT8_(2) …
32 #define PM_CTRLA_IORET_Msk (_UINT8_(0x1) << PM_CTRLA_IORET_Pos) …
33 #define PM_CTRLA_IORET(value) (PM_CTRLA_IORET_Msk & (_UINT8_(value) << PM_CTRLA_IOR…
34 #define PM_CTRLA_Msk _UINT8_(0x04) …
38 #define PM_SLEEPCFG_RESETVALUE _UINT8_(0x02) …
40 #define PM_SLEEPCFG_SLEEPMODE_Pos _UINT8_(0) …
41 #define PM_SLEEPCFG_SLEEPMODE_Msk (_UINT8_(0x7) << PM_SLEEPCFG_SLEEPMODE_Pos) …
42 #define PM_SLEEPCFG_SLEEPMODE(value) (PM_SLEEPCFG_SLEEPMODE_Msk & (_UINT8_(value) << PM_SL…
43 #define PM_SLEEPCFG_SLEEPMODE_IDLE_Val _UINT8_(0x2) …
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Ddac.h29 #define DAC_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define DAC_CTRLA_SWRST_Pos _UINT8_(0) …
32 #define DAC_CTRLA_SWRST_Msk (_UINT8_(0x1) << DAC_CTRLA_SWRST_Pos) …
33 #define DAC_CTRLA_SWRST(value) (DAC_CTRLA_SWRST_Msk & (_UINT8_(value) << DAC_CTRLA_S…
34 #define DAC_CTRLA_ENABLE_Pos _UINT8_(1) …
35 #define DAC_CTRLA_ENABLE_Msk (_UINT8_(0x1) << DAC_CTRLA_ENABLE_Pos) …
36 #define DAC_CTRLA_ENABLE(value) (DAC_CTRLA_ENABLE_Msk & (_UINT8_(value) << DAC_CTRLA_…
37 #define DAC_CTRLA_Msk _UINT8_(0x03) …
41 #define DAC_CTRLB_RESETVALUE _UINT8_(0x02) …
43 #define DAC_CTRLB_DIFF_Pos _UINT8_(0) …
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Dwdt.h29 #define WDT_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define WDT_CTRLA_ENABLE_Pos _UINT8_(1) …
32 #define WDT_CTRLA_ENABLE_Msk (_UINT8_(0x1) << WDT_CTRLA_ENABLE_Pos) …
33 #define WDT_CTRLA_ENABLE(value) (WDT_CTRLA_ENABLE_Msk & (_UINT8_(value) << WDT_CTRLA_…
34 #define WDT_CTRLA_WEN_Pos _UINT8_(2) …
35 #define WDT_CTRLA_WEN_Msk (_UINT8_(0x1) << WDT_CTRLA_WEN_Pos) …
36 #define WDT_CTRLA_WEN(value) (WDT_CTRLA_WEN_Msk & (_UINT8_(value) << WDT_CTRLA_WEN…
37 #define WDT_CTRLA_ALWAYSON_Pos _UINT8_(7) …
38 #define WDT_CTRLA_ALWAYSON_Msk (_UINT8_(0x1) << WDT_CTRLA_ALWAYSON_Pos) …
39 #define WDT_CTRLA_ALWAYSON(value) (WDT_CTRLA_ALWAYSON_Msk & (_UINT8_(value) << WDT_CTRL…
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Dusb.h62 #define USB_DEVICE_STATUS_BK_CRCERR_Pos _UINT8_(0) …
63 #define USB_DEVICE_STATUS_BK_CRCERR_Msk (_UINT8_(0x1) << USB_DEVICE_STATUS_BK_CRCERR_Pos) …
64 #define USB_DEVICE_STATUS_BK_CRCERR(value) (USB_DEVICE_STATUS_BK_CRCERR_Msk & (_UINT8_(value) <<…
65 #define USB_DEVICE_STATUS_BK_ERRORFLOW_Pos _UINT8_(1) …
66 #define USB_DEVICE_STATUS_BK_ERRORFLOW_Msk (_UINT8_(0x1) << USB_DEVICE_STATUS_BK_ERRORFLOW_Pos) …
67 #define USB_DEVICE_STATUS_BK_ERRORFLOW(value) (USB_DEVICE_STATUS_BK_ERRORFLOW_Msk & (_UINT8_(value)…
68 #define USB_DEVICE_STATUS_BK_Msk _UINT8_(0x03) …
105 #define USB_HOST_STATUS_BK_CRCERR_Pos _UINT8_(0) …
106 #define USB_HOST_STATUS_BK_CRCERR_Msk (_UINT8_(0x1) << USB_HOST_STATUS_BK_CRCERR_Pos) …
107 #define USB_HOST_STATUS_BK_CRCERR(value) (USB_HOST_STATUS_BK_CRCERR_Msk & (_UINT8_(value) << U…
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Drstc.h29 #define RSTC_RCAUSE_POR_Pos _UINT8_(0) …
30 #define RSTC_RCAUSE_POR_Msk (_UINT8_(0x1) << RSTC_RCAUSE_POR_Pos) …
31 #define RSTC_RCAUSE_POR(value) (RSTC_RCAUSE_POR_Msk & (_UINT8_(value) << RSTC_RCAUSE…
32 #define RSTC_RCAUSE_BOD12_Pos _UINT8_(1) …
33 #define RSTC_RCAUSE_BOD12_Msk (_UINT8_(0x1) << RSTC_RCAUSE_BOD12_Pos) …
34 #define RSTC_RCAUSE_BOD12(value) (RSTC_RCAUSE_BOD12_Msk & (_UINT8_(value) << RSTC_RCAU…
35 #define RSTC_RCAUSE_BOD33_Pos _UINT8_(2) …
36 #define RSTC_RCAUSE_BOD33_Msk (_UINT8_(0x1) << RSTC_RCAUSE_BOD33_Pos) …
37 #define RSTC_RCAUSE_BOD33(value) (RSTC_RCAUSE_BOD33_Msk & (_UINT8_(value) << RSTC_RCAU…
38 #define RSTC_RCAUSE_NVM_Pos _UINT8_(3) …
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Dtc.h123 #define TC_CTRLBCLR_RESETVALUE _UINT8_(0x00) …
125 #define TC_CTRLBCLR_DIR_Pos _UINT8_(0) …
126 #define TC_CTRLBCLR_DIR_Msk (_UINT8_(0x1) << TC_CTRLBCLR_DIR_Pos) …
127 #define TC_CTRLBCLR_DIR(value) (TC_CTRLBCLR_DIR_Msk & (_UINT8_(value) << TC_CTRLBCLR…
128 #define TC_CTRLBCLR_LUPD_Pos _UINT8_(1) …
129 #define TC_CTRLBCLR_LUPD_Msk (_UINT8_(0x1) << TC_CTRLBCLR_LUPD_Pos) …
130 #define TC_CTRLBCLR_LUPD(value) (TC_CTRLBCLR_LUPD_Msk & (_UINT8_(value) << TC_CTRLBCL…
131 #define TC_CTRLBCLR_ONESHOT_Pos _UINT8_(2) …
132 #define TC_CTRLBCLR_ONESHOT_Msk (_UINT8_(0x1) << TC_CTRLBCLR_ONESHOT_Pos) …
133 #define TC_CTRLBCLR_ONESHOT(value) (TC_CTRLBCLR_ONESHOT_Msk & (_UINT8_(value) << TC_CTRL…
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Dpdec.h105 #define PDEC_CTRLBCLR_RESETVALUE _UINT8_(0x00) …
107 #define PDEC_CTRLBCLR_LUPD_Pos _UINT8_(1) …
108 #define PDEC_CTRLBCLR_LUPD_Msk (_UINT8_(0x1) << PDEC_CTRLBCLR_LUPD_Pos) …
109 #define PDEC_CTRLBCLR_LUPD(value) (PDEC_CTRLBCLR_LUPD_Msk & (_UINT8_(value) << PDEC_CTR…
110 #define PDEC_CTRLBCLR_CMD_Pos _UINT8_(5) …
111 #define PDEC_CTRLBCLR_CMD_Msk (_UINT8_(0x7) << PDEC_CTRLBCLR_CMD_Pos) …
112 #define PDEC_CTRLBCLR_CMD(value) (PDEC_CTRLBCLR_CMD_Msk & (_UINT8_(value) << PDEC_CTRL…
113 #define PDEC_CTRLBCLR_CMD_NONE_Val _UINT8_(0x0) …
114 #define PDEC_CTRLBCLR_CMD_RETRIGGER_Val _UINT8_(0x1) …
115 #define PDEC_CTRLBCLR_CMD_UPDATE_Val _UINT8_(0x2) …
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Dac.h29 #define AC_CTRLA_RESETVALUE _UINT8_(0x00) …
31 #define AC_CTRLA_SWRST_Pos _UINT8_(0) …
32 #define AC_CTRLA_SWRST_Msk (_UINT8_(0x1) << AC_CTRLA_SWRST_Pos) …
33 #define AC_CTRLA_SWRST(value) (AC_CTRLA_SWRST_Msk & (_UINT8_(value) << AC_CTRLA_SWR…
34 #define AC_CTRLA_ENABLE_Pos _UINT8_(1) …
35 #define AC_CTRLA_ENABLE_Msk (_UINT8_(0x1) << AC_CTRLA_ENABLE_Pos) …
36 #define AC_CTRLA_ENABLE(value) (AC_CTRLA_ENABLE_Msk & (_UINT8_(value) << AC_CTRLA_EN…
37 #define AC_CTRLA_Msk _UINT8_(0x03) …
41 #define AC_CTRLB_RESETVALUE _UINT8_(0x00) …
43 #define AC_CTRLB_START0_Pos _UINT8_(0) …
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