1 /* 2 * Component description for AC 3 * 4 * Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries. 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 * 18 */ 19 20 /* file generated from device description file (ATDF) version 2023-03-17T09:48:59Z */ 21 #ifndef _PIC32CXSG61_AC_COMPONENT_H_ 22 #define _PIC32CXSG61_AC_COMPONENT_H_ 23 24 /* ************************************************************************** */ 25 /* SOFTWARE API DEFINITION FOR AC */ 26 /* ************************************************************************** */ 27 28 /* -------- AC_CTRLA : (AC Offset: 0x00) (R/W 8) Control A -------- */ 29 #define AC_CTRLA_RESETVALUE _UINT8_(0x00) /* (AC_CTRLA) Control A Reset Value */ 30 31 #define AC_CTRLA_SWRST_Pos _UINT8_(0) /* (AC_CTRLA) Software Reset Position */ 32 #define AC_CTRLA_SWRST_Msk (_UINT8_(0x1) << AC_CTRLA_SWRST_Pos) /* (AC_CTRLA) Software Reset Mask */ 33 #define AC_CTRLA_SWRST(value) (AC_CTRLA_SWRST_Msk & (_UINT8_(value) << AC_CTRLA_SWRST_Pos)) /* Assigment of value for SWRST in the AC_CTRLA register */ 34 #define AC_CTRLA_ENABLE_Pos _UINT8_(1) /* (AC_CTRLA) Enable Position */ 35 #define AC_CTRLA_ENABLE_Msk (_UINT8_(0x1) << AC_CTRLA_ENABLE_Pos) /* (AC_CTRLA) Enable Mask */ 36 #define AC_CTRLA_ENABLE(value) (AC_CTRLA_ENABLE_Msk & (_UINT8_(value) << AC_CTRLA_ENABLE_Pos)) /* Assigment of value for ENABLE in the AC_CTRLA register */ 37 #define AC_CTRLA_Msk _UINT8_(0x03) /* (AC_CTRLA) Register Mask */ 38 39 40 /* -------- AC_CTRLB : (AC Offset: 0x01) ( /W 8) Control B -------- */ 41 #define AC_CTRLB_RESETVALUE _UINT8_(0x00) /* (AC_CTRLB) Control B Reset Value */ 42 43 #define AC_CTRLB_START0_Pos _UINT8_(0) /* (AC_CTRLB) Comparator 0 Start Comparison Position */ 44 #define AC_CTRLB_START0_Msk (_UINT8_(0x1) << AC_CTRLB_START0_Pos) /* (AC_CTRLB) Comparator 0 Start Comparison Mask */ 45 #define AC_CTRLB_START0(value) (AC_CTRLB_START0_Msk & (_UINT8_(value) << AC_CTRLB_START0_Pos)) /* Assigment of value for START0 in the AC_CTRLB register */ 46 #define AC_CTRLB_START1_Pos _UINT8_(1) /* (AC_CTRLB) Comparator 1 Start Comparison Position */ 47 #define AC_CTRLB_START1_Msk (_UINT8_(0x1) << AC_CTRLB_START1_Pos) /* (AC_CTRLB) Comparator 1 Start Comparison Mask */ 48 #define AC_CTRLB_START1(value) (AC_CTRLB_START1_Msk & (_UINT8_(value) << AC_CTRLB_START1_Pos)) /* Assigment of value for START1 in the AC_CTRLB register */ 49 #define AC_CTRLB_Msk _UINT8_(0x03) /* (AC_CTRLB) Register Mask */ 50 51 #define AC_CTRLB_START_Pos _UINT8_(0) /* (AC_CTRLB Position) Comparator x Start Comparison */ 52 #define AC_CTRLB_START_Msk (_UINT8_(0x3) << AC_CTRLB_START_Pos) /* (AC_CTRLB Mask) START */ 53 #define AC_CTRLB_START(value) (AC_CTRLB_START_Msk & (_UINT8_(value) << AC_CTRLB_START_Pos)) 54 55 /* -------- AC_EVCTRL : (AC Offset: 0x02) (R/W 16) Event Control -------- */ 56 #define AC_EVCTRL_RESETVALUE _UINT16_(0x00) /* (AC_EVCTRL) Event Control Reset Value */ 57 58 #define AC_EVCTRL_COMPEO0_Pos _UINT16_(0) /* (AC_EVCTRL) Comparator 0 Event Output Enable Position */ 59 #define AC_EVCTRL_COMPEO0_Msk (_UINT16_(0x1) << AC_EVCTRL_COMPEO0_Pos) /* (AC_EVCTRL) Comparator 0 Event Output Enable Mask */ 60 #define AC_EVCTRL_COMPEO0(value) (AC_EVCTRL_COMPEO0_Msk & (_UINT16_(value) << AC_EVCTRL_COMPEO0_Pos)) /* Assigment of value for COMPEO0 in the AC_EVCTRL register */ 61 #define AC_EVCTRL_COMPEO1_Pos _UINT16_(1) /* (AC_EVCTRL) Comparator 1 Event Output Enable Position */ 62 #define AC_EVCTRL_COMPEO1_Msk (_UINT16_(0x1) << AC_EVCTRL_COMPEO1_Pos) /* (AC_EVCTRL) Comparator 1 Event Output Enable Mask */ 63 #define AC_EVCTRL_COMPEO1(value) (AC_EVCTRL_COMPEO1_Msk & (_UINT16_(value) << AC_EVCTRL_COMPEO1_Pos)) /* Assigment of value for COMPEO1 in the AC_EVCTRL register */ 64 #define AC_EVCTRL_WINEO0_Pos _UINT16_(4) /* (AC_EVCTRL) Window 0 Event Output Enable Position */ 65 #define AC_EVCTRL_WINEO0_Msk (_UINT16_(0x1) << AC_EVCTRL_WINEO0_Pos) /* (AC_EVCTRL) Window 0 Event Output Enable Mask */ 66 #define AC_EVCTRL_WINEO0(value) (AC_EVCTRL_WINEO0_Msk & (_UINT16_(value) << AC_EVCTRL_WINEO0_Pos)) /* Assigment of value for WINEO0 in the AC_EVCTRL register */ 67 #define AC_EVCTRL_COMPEI0_Pos _UINT16_(8) /* (AC_EVCTRL) Comparator 0 Event Input Enable Position */ 68 #define AC_EVCTRL_COMPEI0_Msk (_UINT16_(0x1) << AC_EVCTRL_COMPEI0_Pos) /* (AC_EVCTRL) Comparator 0 Event Input Enable Mask */ 69 #define AC_EVCTRL_COMPEI0(value) (AC_EVCTRL_COMPEI0_Msk & (_UINT16_(value) << AC_EVCTRL_COMPEI0_Pos)) /* Assigment of value for COMPEI0 in the AC_EVCTRL register */ 70 #define AC_EVCTRL_COMPEI1_Pos _UINT16_(9) /* (AC_EVCTRL) Comparator 1 Event Input Enable Position */ 71 #define AC_EVCTRL_COMPEI1_Msk (_UINT16_(0x1) << AC_EVCTRL_COMPEI1_Pos) /* (AC_EVCTRL) Comparator 1 Event Input Enable Mask */ 72 #define AC_EVCTRL_COMPEI1(value) (AC_EVCTRL_COMPEI1_Msk & (_UINT16_(value) << AC_EVCTRL_COMPEI1_Pos)) /* Assigment of value for COMPEI1 in the AC_EVCTRL register */ 73 #define AC_EVCTRL_INVEI0_Pos _UINT16_(12) /* (AC_EVCTRL) Comparator 0 Input Event Invert Enable Position */ 74 #define AC_EVCTRL_INVEI0_Msk (_UINT16_(0x1) << AC_EVCTRL_INVEI0_Pos) /* (AC_EVCTRL) Comparator 0 Input Event Invert Enable Mask */ 75 #define AC_EVCTRL_INVEI0(value) (AC_EVCTRL_INVEI0_Msk & (_UINT16_(value) << AC_EVCTRL_INVEI0_Pos)) /* Assigment of value for INVEI0 in the AC_EVCTRL register */ 76 #define AC_EVCTRL_INVEI1_Pos _UINT16_(13) /* (AC_EVCTRL) Comparator 1 Input Event Invert Enable Position */ 77 #define AC_EVCTRL_INVEI1_Msk (_UINT16_(0x1) << AC_EVCTRL_INVEI1_Pos) /* (AC_EVCTRL) Comparator 1 Input Event Invert Enable Mask */ 78 #define AC_EVCTRL_INVEI1(value) (AC_EVCTRL_INVEI1_Msk & (_UINT16_(value) << AC_EVCTRL_INVEI1_Pos)) /* Assigment of value for INVEI1 in the AC_EVCTRL register */ 79 #define AC_EVCTRL_Msk _UINT16_(0x3313) /* (AC_EVCTRL) Register Mask */ 80 81 #define AC_EVCTRL_COMPEO_Pos _UINT16_(0) /* (AC_EVCTRL Position) Comparator x Event Output Enable */ 82 #define AC_EVCTRL_COMPEO_Msk (_UINT16_(0x3) << AC_EVCTRL_COMPEO_Pos) /* (AC_EVCTRL Mask) COMPEO */ 83 #define AC_EVCTRL_COMPEO(value) (AC_EVCTRL_COMPEO_Msk & (_UINT16_(value) << AC_EVCTRL_COMPEO_Pos)) 84 #define AC_EVCTRL_WINEO_Pos _UINT16_(4) /* (AC_EVCTRL Position) Window x Event Output Enable */ 85 #define AC_EVCTRL_WINEO_Msk (_UINT16_(0x1) << AC_EVCTRL_WINEO_Pos) /* (AC_EVCTRL Mask) WINEO */ 86 #define AC_EVCTRL_WINEO(value) (AC_EVCTRL_WINEO_Msk & (_UINT16_(value) << AC_EVCTRL_WINEO_Pos)) 87 #define AC_EVCTRL_COMPEI_Pos _UINT16_(8) /* (AC_EVCTRL Position) Comparator x Event Input Enable */ 88 #define AC_EVCTRL_COMPEI_Msk (_UINT16_(0x3) << AC_EVCTRL_COMPEI_Pos) /* (AC_EVCTRL Mask) COMPEI */ 89 #define AC_EVCTRL_COMPEI(value) (AC_EVCTRL_COMPEI_Msk & (_UINT16_(value) << AC_EVCTRL_COMPEI_Pos)) 90 #define AC_EVCTRL_INVEI_Pos _UINT16_(12) /* (AC_EVCTRL Position) Comparator x Input Event Invert Enable */ 91 #define AC_EVCTRL_INVEI_Msk (_UINT16_(0x3) << AC_EVCTRL_INVEI_Pos) /* (AC_EVCTRL Mask) INVEI */ 92 #define AC_EVCTRL_INVEI(value) (AC_EVCTRL_INVEI_Msk & (_UINT16_(value) << AC_EVCTRL_INVEI_Pos)) 93 94 /* -------- AC_INTENCLR : (AC Offset: 0x04) (R/W 8) Interrupt Enable Clear -------- */ 95 #define AC_INTENCLR_RESETVALUE _UINT8_(0x00) /* (AC_INTENCLR) Interrupt Enable Clear Reset Value */ 96 97 #define AC_INTENCLR_COMP0_Pos _UINT8_(0) /* (AC_INTENCLR) Comparator 0 Interrupt Enable Position */ 98 #define AC_INTENCLR_COMP0_Msk (_UINT8_(0x1) << AC_INTENCLR_COMP0_Pos) /* (AC_INTENCLR) Comparator 0 Interrupt Enable Mask */ 99 #define AC_INTENCLR_COMP0(value) (AC_INTENCLR_COMP0_Msk & (_UINT8_(value) << AC_INTENCLR_COMP0_Pos)) /* Assigment of value for COMP0 in the AC_INTENCLR register */ 100 #define AC_INTENCLR_COMP1_Pos _UINT8_(1) /* (AC_INTENCLR) Comparator 1 Interrupt Enable Position */ 101 #define AC_INTENCLR_COMP1_Msk (_UINT8_(0x1) << AC_INTENCLR_COMP1_Pos) /* (AC_INTENCLR) Comparator 1 Interrupt Enable Mask */ 102 #define AC_INTENCLR_COMP1(value) (AC_INTENCLR_COMP1_Msk & (_UINT8_(value) << AC_INTENCLR_COMP1_Pos)) /* Assigment of value for COMP1 in the AC_INTENCLR register */ 103 #define AC_INTENCLR_WIN0_Pos _UINT8_(4) /* (AC_INTENCLR) Window 0 Interrupt Enable Position */ 104 #define AC_INTENCLR_WIN0_Msk (_UINT8_(0x1) << AC_INTENCLR_WIN0_Pos) /* (AC_INTENCLR) Window 0 Interrupt Enable Mask */ 105 #define AC_INTENCLR_WIN0(value) (AC_INTENCLR_WIN0_Msk & (_UINT8_(value) << AC_INTENCLR_WIN0_Pos)) /* Assigment of value for WIN0 in the AC_INTENCLR register */ 106 #define AC_INTENCLR_Msk _UINT8_(0x13) /* (AC_INTENCLR) Register Mask */ 107 108 #define AC_INTENCLR_COMP_Pos _UINT8_(0) /* (AC_INTENCLR Position) Comparator x Interrupt Enable */ 109 #define AC_INTENCLR_COMP_Msk (_UINT8_(0x3) << AC_INTENCLR_COMP_Pos) /* (AC_INTENCLR Mask) COMP */ 110 #define AC_INTENCLR_COMP(value) (AC_INTENCLR_COMP_Msk & (_UINT8_(value) << AC_INTENCLR_COMP_Pos)) 111 #define AC_INTENCLR_WIN_Pos _UINT8_(4) /* (AC_INTENCLR Position) Window x Interrupt Enable */ 112 #define AC_INTENCLR_WIN_Msk (_UINT8_(0x1) << AC_INTENCLR_WIN_Pos) /* (AC_INTENCLR Mask) WIN */ 113 #define AC_INTENCLR_WIN(value) (AC_INTENCLR_WIN_Msk & (_UINT8_(value) << AC_INTENCLR_WIN_Pos)) 114 115 /* -------- AC_INTENSET : (AC Offset: 0x05) (R/W 8) Interrupt Enable Set -------- */ 116 #define AC_INTENSET_RESETVALUE _UINT8_(0x00) /* (AC_INTENSET) Interrupt Enable Set Reset Value */ 117 118 #define AC_INTENSET_COMP0_Pos _UINT8_(0) /* (AC_INTENSET) Comparator 0 Interrupt Enable Position */ 119 #define AC_INTENSET_COMP0_Msk (_UINT8_(0x1) << AC_INTENSET_COMP0_Pos) /* (AC_INTENSET) Comparator 0 Interrupt Enable Mask */ 120 #define AC_INTENSET_COMP0(value) (AC_INTENSET_COMP0_Msk & (_UINT8_(value) << AC_INTENSET_COMP0_Pos)) /* Assigment of value for COMP0 in the AC_INTENSET register */ 121 #define AC_INTENSET_COMP1_Pos _UINT8_(1) /* (AC_INTENSET) Comparator 1 Interrupt Enable Position */ 122 #define AC_INTENSET_COMP1_Msk (_UINT8_(0x1) << AC_INTENSET_COMP1_Pos) /* (AC_INTENSET) Comparator 1 Interrupt Enable Mask */ 123 #define AC_INTENSET_COMP1(value) (AC_INTENSET_COMP1_Msk & (_UINT8_(value) << AC_INTENSET_COMP1_Pos)) /* Assigment of value for COMP1 in the AC_INTENSET register */ 124 #define AC_INTENSET_WIN0_Pos _UINT8_(4) /* (AC_INTENSET) Window 0 Interrupt Enable Position */ 125 #define AC_INTENSET_WIN0_Msk (_UINT8_(0x1) << AC_INTENSET_WIN0_Pos) /* (AC_INTENSET) Window 0 Interrupt Enable Mask */ 126 #define AC_INTENSET_WIN0(value) (AC_INTENSET_WIN0_Msk & (_UINT8_(value) << AC_INTENSET_WIN0_Pos)) /* Assigment of value for WIN0 in the AC_INTENSET register */ 127 #define AC_INTENSET_Msk _UINT8_(0x13) /* (AC_INTENSET) Register Mask */ 128 129 #define AC_INTENSET_COMP_Pos _UINT8_(0) /* (AC_INTENSET Position) Comparator x Interrupt Enable */ 130 #define AC_INTENSET_COMP_Msk (_UINT8_(0x3) << AC_INTENSET_COMP_Pos) /* (AC_INTENSET Mask) COMP */ 131 #define AC_INTENSET_COMP(value) (AC_INTENSET_COMP_Msk & (_UINT8_(value) << AC_INTENSET_COMP_Pos)) 132 #define AC_INTENSET_WIN_Pos _UINT8_(4) /* (AC_INTENSET Position) Window x Interrupt Enable */ 133 #define AC_INTENSET_WIN_Msk (_UINT8_(0x1) << AC_INTENSET_WIN_Pos) /* (AC_INTENSET Mask) WIN */ 134 #define AC_INTENSET_WIN(value) (AC_INTENSET_WIN_Msk & (_UINT8_(value) << AC_INTENSET_WIN_Pos)) 135 136 /* -------- AC_INTFLAG : (AC Offset: 0x06) (R/W 8) Interrupt Flag Status and Clear -------- */ 137 #define AC_INTFLAG_RESETVALUE _UINT8_(0x00) /* (AC_INTFLAG) Interrupt Flag Status and Clear Reset Value */ 138 139 #define AC_INTFLAG_COMP0_Pos _UINT8_(0) /* (AC_INTFLAG) Comparator 0 Position */ 140 #define AC_INTFLAG_COMP0_Msk (_UINT8_(0x1) << AC_INTFLAG_COMP0_Pos) /* (AC_INTFLAG) Comparator 0 Mask */ 141 #define AC_INTFLAG_COMP0(value) (AC_INTFLAG_COMP0_Msk & (_UINT8_(value) << AC_INTFLAG_COMP0_Pos)) /* Assigment of value for COMP0 in the AC_INTFLAG register */ 142 #define AC_INTFLAG_COMP1_Pos _UINT8_(1) /* (AC_INTFLAG) Comparator 1 Position */ 143 #define AC_INTFLAG_COMP1_Msk (_UINT8_(0x1) << AC_INTFLAG_COMP1_Pos) /* (AC_INTFLAG) Comparator 1 Mask */ 144 #define AC_INTFLAG_COMP1(value) (AC_INTFLAG_COMP1_Msk & (_UINT8_(value) << AC_INTFLAG_COMP1_Pos)) /* Assigment of value for COMP1 in the AC_INTFLAG register */ 145 #define AC_INTFLAG_WIN0_Pos _UINT8_(4) /* (AC_INTFLAG) Window 0 Position */ 146 #define AC_INTFLAG_WIN0_Msk (_UINT8_(0x1) << AC_INTFLAG_WIN0_Pos) /* (AC_INTFLAG) Window 0 Mask */ 147 #define AC_INTFLAG_WIN0(value) (AC_INTFLAG_WIN0_Msk & (_UINT8_(value) << AC_INTFLAG_WIN0_Pos)) /* Assigment of value for WIN0 in the AC_INTFLAG register */ 148 #define AC_INTFLAG_Msk _UINT8_(0x13) /* (AC_INTFLAG) Register Mask */ 149 150 #define AC_INTFLAG_COMP_Pos _UINT8_(0) /* (AC_INTFLAG Position) Comparator x */ 151 #define AC_INTFLAG_COMP_Msk (_UINT8_(0x3) << AC_INTFLAG_COMP_Pos) /* (AC_INTFLAG Mask) COMP */ 152 #define AC_INTFLAG_COMP(value) (AC_INTFLAG_COMP_Msk & (_UINT8_(value) << AC_INTFLAG_COMP_Pos)) 153 #define AC_INTFLAG_WIN_Pos _UINT8_(4) /* (AC_INTFLAG Position) Window x */ 154 #define AC_INTFLAG_WIN_Msk (_UINT8_(0x1) << AC_INTFLAG_WIN_Pos) /* (AC_INTFLAG Mask) WIN */ 155 #define AC_INTFLAG_WIN(value) (AC_INTFLAG_WIN_Msk & (_UINT8_(value) << AC_INTFLAG_WIN_Pos)) 156 157 /* -------- AC_STATUSA : (AC Offset: 0x07) ( R/ 8) Status A -------- */ 158 #define AC_STATUSA_RESETVALUE _UINT8_(0x00) /* (AC_STATUSA) Status A Reset Value */ 159 160 #define AC_STATUSA_STATE0_Pos _UINT8_(0) /* (AC_STATUSA) Comparator 0 Current State Position */ 161 #define AC_STATUSA_STATE0_Msk (_UINT8_(0x1) << AC_STATUSA_STATE0_Pos) /* (AC_STATUSA) Comparator 0 Current State Mask */ 162 #define AC_STATUSA_STATE0(value) (AC_STATUSA_STATE0_Msk & (_UINT8_(value) << AC_STATUSA_STATE0_Pos)) /* Assigment of value for STATE0 in the AC_STATUSA register */ 163 #define AC_STATUSA_STATE1_Pos _UINT8_(1) /* (AC_STATUSA) Comparator 1 Current State Position */ 164 #define AC_STATUSA_STATE1_Msk (_UINT8_(0x1) << AC_STATUSA_STATE1_Pos) /* (AC_STATUSA) Comparator 1 Current State Mask */ 165 #define AC_STATUSA_STATE1(value) (AC_STATUSA_STATE1_Msk & (_UINT8_(value) << AC_STATUSA_STATE1_Pos)) /* Assigment of value for STATE1 in the AC_STATUSA register */ 166 #define AC_STATUSA_WSTATE0_Pos _UINT8_(4) /* (AC_STATUSA) Window 0 Current State Position */ 167 #define AC_STATUSA_WSTATE0_Msk (_UINT8_(0x3) << AC_STATUSA_WSTATE0_Pos) /* (AC_STATUSA) Window 0 Current State Mask */ 168 #define AC_STATUSA_WSTATE0(value) (AC_STATUSA_WSTATE0_Msk & (_UINT8_(value) << AC_STATUSA_WSTATE0_Pos)) /* Assigment of value for WSTATE0 in the AC_STATUSA register */ 169 #define AC_STATUSA_WSTATE0_ABOVE_Val _UINT8_(0x0) /* (AC_STATUSA) Signal is above window */ 170 #define AC_STATUSA_WSTATE0_INSIDE_Val _UINT8_(0x1) /* (AC_STATUSA) Signal is inside window */ 171 #define AC_STATUSA_WSTATE0_BELOW_Val _UINT8_(0x2) /* (AC_STATUSA) Signal is below window */ 172 #define AC_STATUSA_WSTATE0_ABOVE (AC_STATUSA_WSTATE0_ABOVE_Val << AC_STATUSA_WSTATE0_Pos) /* (AC_STATUSA) Signal is above window Position */ 173 #define AC_STATUSA_WSTATE0_INSIDE (AC_STATUSA_WSTATE0_INSIDE_Val << AC_STATUSA_WSTATE0_Pos) /* (AC_STATUSA) Signal is inside window Position */ 174 #define AC_STATUSA_WSTATE0_BELOW (AC_STATUSA_WSTATE0_BELOW_Val << AC_STATUSA_WSTATE0_Pos) /* (AC_STATUSA) Signal is below window Position */ 175 #define AC_STATUSA_Msk _UINT8_(0x33) /* (AC_STATUSA) Register Mask */ 176 177 #define AC_STATUSA_STATE_Pos _UINT8_(0) /* (AC_STATUSA Position) Comparator x Current State */ 178 #define AC_STATUSA_STATE_Msk (_UINT8_(0x3) << AC_STATUSA_STATE_Pos) /* (AC_STATUSA Mask) STATE */ 179 #define AC_STATUSA_STATE(value) (AC_STATUSA_STATE_Msk & (_UINT8_(value) << AC_STATUSA_STATE_Pos)) 180 181 /* -------- AC_STATUSB : (AC Offset: 0x08) ( R/ 8) Status B -------- */ 182 #define AC_STATUSB_RESETVALUE _UINT8_(0x00) /* (AC_STATUSB) Status B Reset Value */ 183 184 #define AC_STATUSB_READY0_Pos _UINT8_(0) /* (AC_STATUSB) Comparator 0 Ready Position */ 185 #define AC_STATUSB_READY0_Msk (_UINT8_(0x1) << AC_STATUSB_READY0_Pos) /* (AC_STATUSB) Comparator 0 Ready Mask */ 186 #define AC_STATUSB_READY0(value) (AC_STATUSB_READY0_Msk & (_UINT8_(value) << AC_STATUSB_READY0_Pos)) /* Assigment of value for READY0 in the AC_STATUSB register */ 187 #define AC_STATUSB_READY1_Pos _UINT8_(1) /* (AC_STATUSB) Comparator 1 Ready Position */ 188 #define AC_STATUSB_READY1_Msk (_UINT8_(0x1) << AC_STATUSB_READY1_Pos) /* (AC_STATUSB) Comparator 1 Ready Mask */ 189 #define AC_STATUSB_READY1(value) (AC_STATUSB_READY1_Msk & (_UINT8_(value) << AC_STATUSB_READY1_Pos)) /* Assigment of value for READY1 in the AC_STATUSB register */ 190 #define AC_STATUSB_Msk _UINT8_(0x03) /* (AC_STATUSB) Register Mask */ 191 192 #define AC_STATUSB_READY_Pos _UINT8_(0) /* (AC_STATUSB Position) Comparator x Ready */ 193 #define AC_STATUSB_READY_Msk (_UINT8_(0x3) << AC_STATUSB_READY_Pos) /* (AC_STATUSB Mask) READY */ 194 #define AC_STATUSB_READY(value) (AC_STATUSB_READY_Msk & (_UINT8_(value) << AC_STATUSB_READY_Pos)) 195 196 /* -------- AC_DBGCTRL : (AC Offset: 0x09) (R/W 8) Debug Control -------- */ 197 #define AC_DBGCTRL_RESETVALUE _UINT8_(0x00) /* (AC_DBGCTRL) Debug Control Reset Value */ 198 199 #define AC_DBGCTRL_DBGRUN_Pos _UINT8_(0) /* (AC_DBGCTRL) Debug Run Position */ 200 #define AC_DBGCTRL_DBGRUN_Msk (_UINT8_(0x1) << AC_DBGCTRL_DBGRUN_Pos) /* (AC_DBGCTRL) Debug Run Mask */ 201 #define AC_DBGCTRL_DBGRUN(value) (AC_DBGCTRL_DBGRUN_Msk & (_UINT8_(value) << AC_DBGCTRL_DBGRUN_Pos)) /* Assigment of value for DBGRUN in the AC_DBGCTRL register */ 202 #define AC_DBGCTRL_Msk _UINT8_(0x01) /* (AC_DBGCTRL) Register Mask */ 203 204 205 /* -------- AC_WINCTRL : (AC Offset: 0x0A) (R/W 8) Window Control -------- */ 206 #define AC_WINCTRL_RESETVALUE _UINT8_(0x00) /* (AC_WINCTRL) Window Control Reset Value */ 207 208 #define AC_WINCTRL_WEN0_Pos _UINT8_(0) /* (AC_WINCTRL) Window 0 Mode Enable Position */ 209 #define AC_WINCTRL_WEN0_Msk (_UINT8_(0x1) << AC_WINCTRL_WEN0_Pos) /* (AC_WINCTRL) Window 0 Mode Enable Mask */ 210 #define AC_WINCTRL_WEN0(value) (AC_WINCTRL_WEN0_Msk & (_UINT8_(value) << AC_WINCTRL_WEN0_Pos)) /* Assigment of value for WEN0 in the AC_WINCTRL register */ 211 #define AC_WINCTRL_WINTSEL0_Pos _UINT8_(1) /* (AC_WINCTRL) Window 0 Interrupt Selection Position */ 212 #define AC_WINCTRL_WINTSEL0_Msk (_UINT8_(0x3) << AC_WINCTRL_WINTSEL0_Pos) /* (AC_WINCTRL) Window 0 Interrupt Selection Mask */ 213 #define AC_WINCTRL_WINTSEL0(value) (AC_WINCTRL_WINTSEL0_Msk & (_UINT8_(value) << AC_WINCTRL_WINTSEL0_Pos)) /* Assigment of value for WINTSEL0 in the AC_WINCTRL register */ 214 #define AC_WINCTRL_WINTSEL0_ABOVE_Val _UINT8_(0x0) /* (AC_WINCTRL) Interrupt on signal above window */ 215 #define AC_WINCTRL_WINTSEL0_INSIDE_Val _UINT8_(0x1) /* (AC_WINCTRL) Interrupt on signal inside window */ 216 #define AC_WINCTRL_WINTSEL0_BELOW_Val _UINT8_(0x2) /* (AC_WINCTRL) Interrupt on signal below window */ 217 #define AC_WINCTRL_WINTSEL0_OUTSIDE_Val _UINT8_(0x3) /* (AC_WINCTRL) Interrupt on signal outside window */ 218 #define AC_WINCTRL_WINTSEL0_ABOVE (AC_WINCTRL_WINTSEL0_ABOVE_Val << AC_WINCTRL_WINTSEL0_Pos) /* (AC_WINCTRL) Interrupt on signal above window Position */ 219 #define AC_WINCTRL_WINTSEL0_INSIDE (AC_WINCTRL_WINTSEL0_INSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) /* (AC_WINCTRL) Interrupt on signal inside window Position */ 220 #define AC_WINCTRL_WINTSEL0_BELOW (AC_WINCTRL_WINTSEL0_BELOW_Val << AC_WINCTRL_WINTSEL0_Pos) /* (AC_WINCTRL) Interrupt on signal below window Position */ 221 #define AC_WINCTRL_WINTSEL0_OUTSIDE (AC_WINCTRL_WINTSEL0_OUTSIDE_Val << AC_WINCTRL_WINTSEL0_Pos) /* (AC_WINCTRL) Interrupt on signal outside window Position */ 222 #define AC_WINCTRL_Msk _UINT8_(0x07) /* (AC_WINCTRL) Register Mask */ 223 224 #define AC_WINCTRL_WEN_Pos _UINT8_(0) /* (AC_WINCTRL Position) Window x Mode Enable */ 225 #define AC_WINCTRL_WEN_Msk (_UINT8_(0x1) << AC_WINCTRL_WEN_Pos) /* (AC_WINCTRL Mask) WEN */ 226 #define AC_WINCTRL_WEN(value) (AC_WINCTRL_WEN_Msk & (_UINT8_(value) << AC_WINCTRL_WEN_Pos)) 227 228 /* -------- AC_SCALER : (AC Offset: 0x0C) (R/W 8) Scaler n -------- */ 229 #define AC_SCALER_RESETVALUE _UINT8_(0x00) /* (AC_SCALER) Scaler n Reset Value */ 230 231 #define AC_SCALER_VALUE_Pos _UINT8_(0) /* (AC_SCALER) Scaler Value Position */ 232 #define AC_SCALER_VALUE_Msk (_UINT8_(0x3F) << AC_SCALER_VALUE_Pos) /* (AC_SCALER) Scaler Value Mask */ 233 #define AC_SCALER_VALUE(value) (AC_SCALER_VALUE_Msk & (_UINT8_(value) << AC_SCALER_VALUE_Pos)) /* Assigment of value for VALUE in the AC_SCALER register */ 234 #define AC_SCALER_Msk _UINT8_(0x3F) /* (AC_SCALER) Register Mask */ 235 236 237 /* -------- AC_COMPCTRL : (AC Offset: 0x10) (R/W 32) Comparator Control n -------- */ 238 #define AC_COMPCTRL_RESETVALUE _UINT32_(0x00) /* (AC_COMPCTRL) Comparator Control n Reset Value */ 239 240 #define AC_COMPCTRL_ENABLE_Pos _UINT32_(1) /* (AC_COMPCTRL) Enable Position */ 241 #define AC_COMPCTRL_ENABLE_Msk (_UINT32_(0x1) << AC_COMPCTRL_ENABLE_Pos) /* (AC_COMPCTRL) Enable Mask */ 242 #define AC_COMPCTRL_ENABLE(value) (AC_COMPCTRL_ENABLE_Msk & (_UINT32_(value) << AC_COMPCTRL_ENABLE_Pos)) /* Assigment of value for ENABLE in the AC_COMPCTRL register */ 243 #define AC_COMPCTRL_SINGLE_Pos _UINT32_(2) /* (AC_COMPCTRL) Single-Shot Mode Position */ 244 #define AC_COMPCTRL_SINGLE_Msk (_UINT32_(0x1) << AC_COMPCTRL_SINGLE_Pos) /* (AC_COMPCTRL) Single-Shot Mode Mask */ 245 #define AC_COMPCTRL_SINGLE(value) (AC_COMPCTRL_SINGLE_Msk & (_UINT32_(value) << AC_COMPCTRL_SINGLE_Pos)) /* Assigment of value for SINGLE in the AC_COMPCTRL register */ 246 #define AC_COMPCTRL_INTSEL_Pos _UINT32_(3) /* (AC_COMPCTRL) Interrupt Selection Position */ 247 #define AC_COMPCTRL_INTSEL_Msk (_UINT32_(0x3) << AC_COMPCTRL_INTSEL_Pos) /* (AC_COMPCTRL) Interrupt Selection Mask */ 248 #define AC_COMPCTRL_INTSEL(value) (AC_COMPCTRL_INTSEL_Msk & (_UINT32_(value) << AC_COMPCTRL_INTSEL_Pos)) /* Assigment of value for INTSEL in the AC_COMPCTRL register */ 249 #define AC_COMPCTRL_INTSEL_TOGGLE_Val _UINT32_(0x0) /* (AC_COMPCTRL) Interrupt on comparator output toggle */ 250 #define AC_COMPCTRL_INTSEL_RISING_Val _UINT32_(0x1) /* (AC_COMPCTRL) Interrupt on comparator output rising */ 251 #define AC_COMPCTRL_INTSEL_FALLING_Val _UINT32_(0x2) /* (AC_COMPCTRL) Interrupt on comparator output falling */ 252 #define AC_COMPCTRL_INTSEL_EOC_Val _UINT32_(0x3) /* (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) */ 253 #define AC_COMPCTRL_INTSEL_TOGGLE (AC_COMPCTRL_INTSEL_TOGGLE_Val << AC_COMPCTRL_INTSEL_Pos) /* (AC_COMPCTRL) Interrupt on comparator output toggle Position */ 254 #define AC_COMPCTRL_INTSEL_RISING (AC_COMPCTRL_INTSEL_RISING_Val << AC_COMPCTRL_INTSEL_Pos) /* (AC_COMPCTRL) Interrupt on comparator output rising Position */ 255 #define AC_COMPCTRL_INTSEL_FALLING (AC_COMPCTRL_INTSEL_FALLING_Val << AC_COMPCTRL_INTSEL_Pos) /* (AC_COMPCTRL) Interrupt on comparator output falling Position */ 256 #define AC_COMPCTRL_INTSEL_EOC (AC_COMPCTRL_INTSEL_EOC_Val << AC_COMPCTRL_INTSEL_Pos) /* (AC_COMPCTRL) Interrupt on end of comparison (single-shot mode only) Position */ 257 #define AC_COMPCTRL_RUNSTDBY_Pos _UINT32_(6) /* (AC_COMPCTRL) Run in Standby Position */ 258 #define AC_COMPCTRL_RUNSTDBY_Msk (_UINT32_(0x1) << AC_COMPCTRL_RUNSTDBY_Pos) /* (AC_COMPCTRL) Run in Standby Mask */ 259 #define AC_COMPCTRL_RUNSTDBY(value) (AC_COMPCTRL_RUNSTDBY_Msk & (_UINT32_(value) << AC_COMPCTRL_RUNSTDBY_Pos)) /* Assigment of value for RUNSTDBY in the AC_COMPCTRL register */ 260 #define AC_COMPCTRL_MUXNEG_Pos _UINT32_(8) /* (AC_COMPCTRL) Negative Input Mux Selection Position */ 261 #define AC_COMPCTRL_MUXNEG_Msk (_UINT32_(0x7) << AC_COMPCTRL_MUXNEG_Pos) /* (AC_COMPCTRL) Negative Input Mux Selection Mask */ 262 #define AC_COMPCTRL_MUXNEG(value) (AC_COMPCTRL_MUXNEG_Msk & (_UINT32_(value) << AC_COMPCTRL_MUXNEG_Pos)) /* Assigment of value for MUXNEG in the AC_COMPCTRL register */ 263 #define AC_COMPCTRL_MUXNEG_PIN0_Val _UINT32_(0x0) /* (AC_COMPCTRL) I/O pin 0 */ 264 #define AC_COMPCTRL_MUXNEG_PIN1_Val _UINT32_(0x1) /* (AC_COMPCTRL) I/O pin 1 */ 265 #define AC_COMPCTRL_MUXNEG_PIN2_Val _UINT32_(0x2) /* (AC_COMPCTRL) I/O pin 2 */ 266 #define AC_COMPCTRL_MUXNEG_PIN3_Val _UINT32_(0x3) /* (AC_COMPCTRL) I/O pin 3 */ 267 #define AC_COMPCTRL_MUXNEG_AVSS_Val _UINT32_(0x4) /* (AC_COMPCTRL) Ground */ 268 #define AC_COMPCTRL_MUXNEG_VSCALE_Val _UINT32_(0x5) /* (AC_COMPCTRL) AVDD scaler */ 269 #define AC_COMPCTRL_MUXNEG_BANDGAP_Val _UINT32_(0x6) /* (AC_COMPCTRL) Internal bandgap voltage */ 270 #define AC_COMPCTRL_MUXNEG_DAC0_Val _UINT32_(0x7) /* (AC_COMPCTRL) DAC0 output */ 271 #define AC_COMPCTRL_MUXNEG_PIN0 (AC_COMPCTRL_MUXNEG_PIN0_Val << AC_COMPCTRL_MUXNEG_Pos) /* (AC_COMPCTRL) I/O pin 0 Position */ 272 #define AC_COMPCTRL_MUXNEG_PIN1 (AC_COMPCTRL_MUXNEG_PIN1_Val << AC_COMPCTRL_MUXNEG_Pos) /* (AC_COMPCTRL) I/O pin 1 Position */ 273 #define AC_COMPCTRL_MUXNEG_PIN2 (AC_COMPCTRL_MUXNEG_PIN2_Val << AC_COMPCTRL_MUXNEG_Pos) /* (AC_COMPCTRL) I/O pin 2 Position */ 274 #define AC_COMPCTRL_MUXNEG_PIN3 (AC_COMPCTRL_MUXNEG_PIN3_Val << AC_COMPCTRL_MUXNEG_Pos) /* (AC_COMPCTRL) I/O pin 3 Position */ 275 #define AC_COMPCTRL_MUXNEG_AVSS (AC_COMPCTRL_MUXNEG_AVSS_Val << AC_COMPCTRL_MUXNEG_Pos) /* (AC_COMPCTRL) Ground Position */ 276 #define AC_COMPCTRL_MUXNEG_VSCALE (AC_COMPCTRL_MUXNEG_VSCALE_Val << AC_COMPCTRL_MUXNEG_Pos) /* (AC_COMPCTRL) AVDD scaler Position */ 277 #define AC_COMPCTRL_MUXNEG_BANDGAP (AC_COMPCTRL_MUXNEG_BANDGAP_Val << AC_COMPCTRL_MUXNEG_Pos) /* (AC_COMPCTRL) Internal bandgap voltage Position */ 278 #define AC_COMPCTRL_MUXNEG_DAC0 (AC_COMPCTRL_MUXNEG_DAC0_Val << AC_COMPCTRL_MUXNEG_Pos) /* (AC_COMPCTRL) DAC0 output Position */ 279 #define AC_COMPCTRL_MUXPOS_Pos _UINT32_(12) /* (AC_COMPCTRL) Positive Input Mux Selection Position */ 280 #define AC_COMPCTRL_MUXPOS_Msk (_UINT32_(0x7) << AC_COMPCTRL_MUXPOS_Pos) /* (AC_COMPCTRL) Positive Input Mux Selection Mask */ 281 #define AC_COMPCTRL_MUXPOS(value) (AC_COMPCTRL_MUXPOS_Msk & (_UINT32_(value) << AC_COMPCTRL_MUXPOS_Pos)) /* Assigment of value for MUXPOS in the AC_COMPCTRL register */ 282 #define AC_COMPCTRL_MUXPOS_PIN0_Val _UINT32_(0x0) /* (AC_COMPCTRL) I/O pin 0 */ 283 #define AC_COMPCTRL_MUXPOS_PIN1_Val _UINT32_(0x1) /* (AC_COMPCTRL) I/O pin 1 */ 284 #define AC_COMPCTRL_MUXPOS_PIN2_Val _UINT32_(0x2) /* (AC_COMPCTRL) I/O pin 2 */ 285 #define AC_COMPCTRL_MUXPOS_PIN3_Val _UINT32_(0x3) /* (AC_COMPCTRL) I/O pin 3 */ 286 #define AC_COMPCTRL_MUXPOS_VSCALE_Val _UINT32_(0x4) /* (AC_COMPCTRL) AVDD scaler */ 287 #define AC_COMPCTRL_MUXPOS_PIN0 (AC_COMPCTRL_MUXPOS_PIN0_Val << AC_COMPCTRL_MUXPOS_Pos) /* (AC_COMPCTRL) I/O pin 0 Position */ 288 #define AC_COMPCTRL_MUXPOS_PIN1 (AC_COMPCTRL_MUXPOS_PIN1_Val << AC_COMPCTRL_MUXPOS_Pos) /* (AC_COMPCTRL) I/O pin 1 Position */ 289 #define AC_COMPCTRL_MUXPOS_PIN2 (AC_COMPCTRL_MUXPOS_PIN2_Val << AC_COMPCTRL_MUXPOS_Pos) /* (AC_COMPCTRL) I/O pin 2 Position */ 290 #define AC_COMPCTRL_MUXPOS_PIN3 (AC_COMPCTRL_MUXPOS_PIN3_Val << AC_COMPCTRL_MUXPOS_Pos) /* (AC_COMPCTRL) I/O pin 3 Position */ 291 #define AC_COMPCTRL_MUXPOS_VSCALE (AC_COMPCTRL_MUXPOS_VSCALE_Val << AC_COMPCTRL_MUXPOS_Pos) /* (AC_COMPCTRL) AVDD scaler Position */ 292 #define AC_COMPCTRL_SWAP_Pos _UINT32_(15) /* (AC_COMPCTRL) Swap Inputs and Invert Position */ 293 #define AC_COMPCTRL_SWAP_Msk (_UINT32_(0x1) << AC_COMPCTRL_SWAP_Pos) /* (AC_COMPCTRL) Swap Inputs and Invert Mask */ 294 #define AC_COMPCTRL_SWAP(value) (AC_COMPCTRL_SWAP_Msk & (_UINT32_(value) << AC_COMPCTRL_SWAP_Pos)) /* Assigment of value for SWAP in the AC_COMPCTRL register */ 295 #define AC_COMPCTRL_SPEED_Pos _UINT32_(16) /* (AC_COMPCTRL) Speed Selection Position */ 296 #define AC_COMPCTRL_SPEED_Msk (_UINT32_(0x3) << AC_COMPCTRL_SPEED_Pos) /* (AC_COMPCTRL) Speed Selection Mask */ 297 #define AC_COMPCTRL_SPEED(value) (AC_COMPCTRL_SPEED_Msk & (_UINT32_(value) << AC_COMPCTRL_SPEED_Pos)) /* Assigment of value for SPEED in the AC_COMPCTRL register */ 298 #define AC_COMPCTRL_SPEED_LOW_Val _UINT32_(0x0) /* (AC_COMPCTRL) Low Power */ 299 #define AC_COMPCTRL_SPEED_HIGH_Val _UINT32_(0x3) /* (AC_COMPCTRL) High speed */ 300 #define AC_COMPCTRL_SPEED_LOW (AC_COMPCTRL_SPEED_LOW_Val << AC_COMPCTRL_SPEED_Pos) /* (AC_COMPCTRL) Low Power Position */ 301 #define AC_COMPCTRL_SPEED_HIGH (AC_COMPCTRL_SPEED_HIGH_Val << AC_COMPCTRL_SPEED_Pos) /* (AC_COMPCTRL) High speed Position */ 302 #define AC_COMPCTRL_HYSTEN_Pos _UINT32_(19) /* (AC_COMPCTRL) Hysteresis Enable Position */ 303 #define AC_COMPCTRL_HYSTEN_Msk (_UINT32_(0x1) << AC_COMPCTRL_HYSTEN_Pos) /* (AC_COMPCTRL) Hysteresis Enable Mask */ 304 #define AC_COMPCTRL_HYSTEN(value) (AC_COMPCTRL_HYSTEN_Msk & (_UINT32_(value) << AC_COMPCTRL_HYSTEN_Pos)) /* Assigment of value for HYSTEN in the AC_COMPCTRL register */ 305 #define AC_COMPCTRL_HYST_Pos _UINT32_(20) /* (AC_COMPCTRL) Hysteresis Level Position */ 306 #define AC_COMPCTRL_HYST_Msk (_UINT32_(0x3) << AC_COMPCTRL_HYST_Pos) /* (AC_COMPCTRL) Hysteresis Level Mask */ 307 #define AC_COMPCTRL_HYST(value) (AC_COMPCTRL_HYST_Msk & (_UINT32_(value) << AC_COMPCTRL_HYST_Pos)) /* Assigment of value for HYST in the AC_COMPCTRL register */ 308 #define AC_COMPCTRL_HYST_HYST25_Val _UINT32_(0x0) /* (AC_COMPCTRL) 25mV */ 309 #define AC_COMPCTRL_HYST_HYST50_Val _UINT32_(0x1) /* (AC_COMPCTRL) 50mV */ 310 #define AC_COMPCTRL_HYST_HYST75_Val _UINT32_(0x2) /* (AC_COMPCTRL) 75mV */ 311 #define AC_COMPCTRL_HYST_HYST100_Val _UINT32_(0x3) /* (AC_COMPCTRL) 100mV */ 312 #define AC_COMPCTRL_HYST_HYST25 (AC_COMPCTRL_HYST_HYST25_Val << AC_COMPCTRL_HYST_Pos) /* (AC_COMPCTRL) 25mV Position */ 313 #define AC_COMPCTRL_HYST_HYST50 (AC_COMPCTRL_HYST_HYST50_Val << AC_COMPCTRL_HYST_Pos) /* (AC_COMPCTRL) 50mV Position */ 314 #define AC_COMPCTRL_HYST_HYST75 (AC_COMPCTRL_HYST_HYST75_Val << AC_COMPCTRL_HYST_Pos) /* (AC_COMPCTRL) 75mV Position */ 315 #define AC_COMPCTRL_HYST_HYST100 (AC_COMPCTRL_HYST_HYST100_Val << AC_COMPCTRL_HYST_Pos) /* (AC_COMPCTRL) 100mV Position */ 316 #define AC_COMPCTRL_FLEN_Pos _UINT32_(24) /* (AC_COMPCTRL) Filter Length Position */ 317 #define AC_COMPCTRL_FLEN_Msk (_UINT32_(0x7) << AC_COMPCTRL_FLEN_Pos) /* (AC_COMPCTRL) Filter Length Mask */ 318 #define AC_COMPCTRL_FLEN(value) (AC_COMPCTRL_FLEN_Msk & (_UINT32_(value) << AC_COMPCTRL_FLEN_Pos)) /* Assigment of value for FLEN in the AC_COMPCTRL register */ 319 #define AC_COMPCTRL_FLEN_OFF_Val _UINT32_(0x0) /* (AC_COMPCTRL) No filtering */ 320 #define AC_COMPCTRL_FLEN_MAJ3_Val _UINT32_(0x1) /* (AC_COMPCTRL) 3-bit majority function (2 of 3) */ 321 #define AC_COMPCTRL_FLEN_MAJ5_Val _UINT32_(0x2) /* (AC_COMPCTRL) 5-bit majority function (3 of 5) */ 322 #define AC_COMPCTRL_FLEN_OFF (AC_COMPCTRL_FLEN_OFF_Val << AC_COMPCTRL_FLEN_Pos) /* (AC_COMPCTRL) No filtering Position */ 323 #define AC_COMPCTRL_FLEN_MAJ3 (AC_COMPCTRL_FLEN_MAJ3_Val << AC_COMPCTRL_FLEN_Pos) /* (AC_COMPCTRL) 3-bit majority function (2 of 3) Position */ 324 #define AC_COMPCTRL_FLEN_MAJ5 (AC_COMPCTRL_FLEN_MAJ5_Val << AC_COMPCTRL_FLEN_Pos) /* (AC_COMPCTRL) 5-bit majority function (3 of 5) Position */ 325 #define AC_COMPCTRL_OUT_Pos _UINT32_(28) /* (AC_COMPCTRL) Output Position */ 326 #define AC_COMPCTRL_OUT_Msk (_UINT32_(0x3) << AC_COMPCTRL_OUT_Pos) /* (AC_COMPCTRL) Output Mask */ 327 #define AC_COMPCTRL_OUT(value) (AC_COMPCTRL_OUT_Msk & (_UINT32_(value) << AC_COMPCTRL_OUT_Pos)) /* Assigment of value for OUT in the AC_COMPCTRL register */ 328 #define AC_COMPCTRL_OUT_OFF_Val _UINT32_(0x0) /* (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port */ 329 #define AC_COMPCTRL_OUT_ASYNC_Val _UINT32_(0x1) /* (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port */ 330 #define AC_COMPCTRL_OUT_SYNC_Val _UINT32_(0x2) /* (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port */ 331 #define AC_COMPCTRL_OUT_OFF (AC_COMPCTRL_OUT_OFF_Val << AC_COMPCTRL_OUT_Pos) /* (AC_COMPCTRL) The output of COMPn is not routed to the COMPn I/O port Position */ 332 #define AC_COMPCTRL_OUT_ASYNC (AC_COMPCTRL_OUT_ASYNC_Val << AC_COMPCTRL_OUT_Pos) /* (AC_COMPCTRL) The asynchronous output of COMPn is routed to the COMPn I/O port Position */ 333 #define AC_COMPCTRL_OUT_SYNC (AC_COMPCTRL_OUT_SYNC_Val << AC_COMPCTRL_OUT_Pos) /* (AC_COMPCTRL) The synchronous output (including filtering) of COMPn is routed to the COMPn I/O port Position */ 334 #define AC_COMPCTRL_Msk _UINT32_(0x373BF75E) /* (AC_COMPCTRL) Register Mask */ 335 336 337 /* -------- AC_SYNCBUSY : (AC Offset: 0x20) ( R/ 32) Synchronization Busy -------- */ 338 #define AC_SYNCBUSY_RESETVALUE _UINT32_(0x00) /* (AC_SYNCBUSY) Synchronization Busy Reset Value */ 339 340 #define AC_SYNCBUSY_SWRST_Pos _UINT32_(0) /* (AC_SYNCBUSY) Software Reset Synchronization Busy Position */ 341 #define AC_SYNCBUSY_SWRST_Msk (_UINT32_(0x1) << AC_SYNCBUSY_SWRST_Pos) /* (AC_SYNCBUSY) Software Reset Synchronization Busy Mask */ 342 #define AC_SYNCBUSY_SWRST(value) (AC_SYNCBUSY_SWRST_Msk & (_UINT32_(value) << AC_SYNCBUSY_SWRST_Pos)) /* Assigment of value for SWRST in the AC_SYNCBUSY register */ 343 #define AC_SYNCBUSY_ENABLE_Pos _UINT32_(1) /* (AC_SYNCBUSY) Enable Synchronization Busy Position */ 344 #define AC_SYNCBUSY_ENABLE_Msk (_UINT32_(0x1) << AC_SYNCBUSY_ENABLE_Pos) /* (AC_SYNCBUSY) Enable Synchronization Busy Mask */ 345 #define AC_SYNCBUSY_ENABLE(value) (AC_SYNCBUSY_ENABLE_Msk & (_UINT32_(value) << AC_SYNCBUSY_ENABLE_Pos)) /* Assigment of value for ENABLE in the AC_SYNCBUSY register */ 346 #define AC_SYNCBUSY_WINCTRL_Pos _UINT32_(2) /* (AC_SYNCBUSY) WINCTRL Synchronization Busy Position */ 347 #define AC_SYNCBUSY_WINCTRL_Msk (_UINT32_(0x1) << AC_SYNCBUSY_WINCTRL_Pos) /* (AC_SYNCBUSY) WINCTRL Synchronization Busy Mask */ 348 #define AC_SYNCBUSY_WINCTRL(value) (AC_SYNCBUSY_WINCTRL_Msk & (_UINT32_(value) << AC_SYNCBUSY_WINCTRL_Pos)) /* Assigment of value for WINCTRL in the AC_SYNCBUSY register */ 349 #define AC_SYNCBUSY_COMPCTRL0_Pos _UINT32_(3) /* (AC_SYNCBUSY) COMPCTRL 0 Synchronization Busy Position */ 350 #define AC_SYNCBUSY_COMPCTRL0_Msk (_UINT32_(0x1) << AC_SYNCBUSY_COMPCTRL0_Pos) /* (AC_SYNCBUSY) COMPCTRL 0 Synchronization Busy Mask */ 351 #define AC_SYNCBUSY_COMPCTRL0(value) (AC_SYNCBUSY_COMPCTRL0_Msk & (_UINT32_(value) << AC_SYNCBUSY_COMPCTRL0_Pos)) /* Assigment of value for COMPCTRL0 in the AC_SYNCBUSY register */ 352 #define AC_SYNCBUSY_COMPCTRL1_Pos _UINT32_(4) /* (AC_SYNCBUSY) COMPCTRL 1 Synchronization Busy Position */ 353 #define AC_SYNCBUSY_COMPCTRL1_Msk (_UINT32_(0x1) << AC_SYNCBUSY_COMPCTRL1_Pos) /* (AC_SYNCBUSY) COMPCTRL 1 Synchronization Busy Mask */ 354 #define AC_SYNCBUSY_COMPCTRL1(value) (AC_SYNCBUSY_COMPCTRL1_Msk & (_UINT32_(value) << AC_SYNCBUSY_COMPCTRL1_Pos)) /* Assigment of value for COMPCTRL1 in the AC_SYNCBUSY register */ 355 #define AC_SYNCBUSY_Msk _UINT32_(0x0000001F) /* (AC_SYNCBUSY) Register Mask */ 356 357 #define AC_SYNCBUSY_COMPCTRL_Pos _UINT32_(3) /* (AC_SYNCBUSY Position) COMPCTRL x Synchronization Busy */ 358 #define AC_SYNCBUSY_COMPCTRL_Msk (_UINT32_(0x3) << AC_SYNCBUSY_COMPCTRL_Pos) /* (AC_SYNCBUSY Mask) COMPCTRL */ 359 #define AC_SYNCBUSY_COMPCTRL(value) (AC_SYNCBUSY_COMPCTRL_Msk & (_UINT32_(value) << AC_SYNCBUSY_COMPCTRL_Pos)) 360 361 /* -------- AC_CALIB : (AC Offset: 0x24) (R/W 16) Calibration -------- */ 362 #define AC_CALIB_RESETVALUE _UINT16_(0x101) /* (AC_CALIB) Calibration Reset Value */ 363 364 #define AC_CALIB_BIAS0_Pos _UINT16_(0) /* (AC_CALIB) COMP0/1 Bias Scaling Position */ 365 #define AC_CALIB_BIAS0_Msk (_UINT16_(0x3) << AC_CALIB_BIAS0_Pos) /* (AC_CALIB) COMP0/1 Bias Scaling Mask */ 366 #define AC_CALIB_BIAS0(value) (AC_CALIB_BIAS0_Msk & (_UINT16_(value) << AC_CALIB_BIAS0_Pos)) /* Assigment of value for BIAS0 in the AC_CALIB register */ 367 #define AC_CALIB_Msk _UINT16_(0x0003) /* (AC_CALIB) Register Mask */ 368 369 370 /** \brief AC register offsets definitions */ 371 #define AC_CTRLA_REG_OFST _UINT32_(0x00) /* (AC_CTRLA) Control A Offset */ 372 #define AC_CTRLB_REG_OFST _UINT32_(0x01) /* (AC_CTRLB) Control B Offset */ 373 #define AC_EVCTRL_REG_OFST _UINT32_(0x02) /* (AC_EVCTRL) Event Control Offset */ 374 #define AC_INTENCLR_REG_OFST _UINT32_(0x04) /* (AC_INTENCLR) Interrupt Enable Clear Offset */ 375 #define AC_INTENSET_REG_OFST _UINT32_(0x05) /* (AC_INTENSET) Interrupt Enable Set Offset */ 376 #define AC_INTFLAG_REG_OFST _UINT32_(0x06) /* (AC_INTFLAG) Interrupt Flag Status and Clear Offset */ 377 #define AC_STATUSA_REG_OFST _UINT32_(0x07) /* (AC_STATUSA) Status A Offset */ 378 #define AC_STATUSB_REG_OFST _UINT32_(0x08) /* (AC_STATUSB) Status B Offset */ 379 #define AC_DBGCTRL_REG_OFST _UINT32_(0x09) /* (AC_DBGCTRL) Debug Control Offset */ 380 #define AC_WINCTRL_REG_OFST _UINT32_(0x0A) /* (AC_WINCTRL) Window Control Offset */ 381 #define AC_SCALER_REG_OFST _UINT32_(0x0C) /* (AC_SCALER) Scaler n Offset */ 382 #define AC_SCALER0_REG_OFST _UINT32_(0x0C) /* (AC_SCALER0) Scaler n Offset */ 383 #define AC_SCALER1_REG_OFST _UINT32_(0x0D) /* (AC_SCALER1) Scaler n Offset */ 384 #define AC_COMPCTRL_REG_OFST _UINT32_(0x10) /* (AC_COMPCTRL) Comparator Control n Offset */ 385 #define AC_COMPCTRL0_REG_OFST _UINT32_(0x10) /* (AC_COMPCTRL0) Comparator Control n Offset */ 386 #define AC_COMPCTRL1_REG_OFST _UINT32_(0x14) /* (AC_COMPCTRL1) Comparator Control n Offset */ 387 #define AC_SYNCBUSY_REG_OFST _UINT32_(0x20) /* (AC_SYNCBUSY) Synchronization Busy Offset */ 388 #define AC_CALIB_REG_OFST _UINT32_(0x24) /* (AC_CALIB) Calibration Offset */ 389 390 #if !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) 391 /** \brief AC register API structure */ 392 typedef struct 393 { /* Analog Comparators */ 394 __IO uint8_t AC_CTRLA; /**< Offset: 0x00 (R/W 8) Control A */ 395 __O uint8_t AC_CTRLB; /**< Offset: 0x01 ( /W 8) Control B */ 396 __IO uint16_t AC_EVCTRL; /**< Offset: 0x02 (R/W 16) Event Control */ 397 __IO uint8_t AC_INTENCLR; /**< Offset: 0x04 (R/W 8) Interrupt Enable Clear */ 398 __IO uint8_t AC_INTENSET; /**< Offset: 0x05 (R/W 8) Interrupt Enable Set */ 399 __IO uint8_t AC_INTFLAG; /**< Offset: 0x06 (R/W 8) Interrupt Flag Status and Clear */ 400 __I uint8_t AC_STATUSA; /**< Offset: 0x07 (R/ 8) Status A */ 401 __I uint8_t AC_STATUSB; /**< Offset: 0x08 (R/ 8) Status B */ 402 __IO uint8_t AC_DBGCTRL; /**< Offset: 0x09 (R/W 8) Debug Control */ 403 __IO uint8_t AC_WINCTRL; /**< Offset: 0x0A (R/W 8) Window Control */ 404 __I uint8_t Reserved1[0x01]; 405 __IO uint8_t AC_SCALER[2]; /**< Offset: 0x0C (R/W 8) Scaler n */ 406 __I uint8_t Reserved2[0x02]; 407 __IO uint32_t AC_COMPCTRL[2]; /**< Offset: 0x10 (R/W 32) Comparator Control n */ 408 __I uint8_t Reserved3[0x08]; 409 __I uint32_t AC_SYNCBUSY; /**< Offset: 0x20 (R/ 32) Synchronization Busy */ 410 __IO uint16_t AC_CALIB; /**< Offset: 0x24 (R/W 16) Calibration */ 411 } ac_registers_t; 412 413 414 #endif /* !(defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */ 415 #endif /* _PIC32CXSG61_AC_COMPONENT_H_ */ 416
