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Searched refs:pllq (Results 1 – 9 of 9) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_common.h25 #define pllq(v) z_pllq(v) macro
Dclock_stm32f2_f4_f7.c112 pllq(STM32_PLL_Q_DIVISOR)); in config_pll_sysclock()
Dclock_stm32_ll_common.c607 MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ, pllq(STM32_PLL_Q_DIVISOR)); in set_up_plls()
/Zephyr-latest/boards/renesas/mck_ra8t1/
Dmck_ra8t1.dts70 pllq {
/Zephyr-latest/dts/arm/renesas/ra/ra8/
Dr7fa8t1xh.dtsi62 pllq: pllq { label
Dr7fa8m1xh.dtsi64 pllq: pllq { label
Dr7fa8d1xh.dtsi94 pllq: pllq { label
/Zephyr-latest/boards/renesas/ek_ra8d1/
Dek_ra8d1.dts105 pllq {
/Zephyr-latest/boards/renesas/ek_ra8m1/
Dek_ra8m1.dts142 pllq {