1/* 2 * Copyright (c) 2024 Renesas Electronics Corporation 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6/dts-v1/; 7 8#include <renesas/ra/ra8/r7fa8m1ahecbd.dtsi> 9#include <dt-bindings/gpio/gpio.h> 10#include <zephyr/dt-bindings/adc/adc.h> 11#include <zephyr/dt-bindings/input/input-event-codes.h> 12#include "ek_ra8m1-pinctrl.dtsi" 13 14/ { 15 model = "Renesas EK-RA8M1"; 16 compatible = "renesas,ra8m1", "renesas,ra8"; 17 18 chosen { 19 zephyr,sram = &sram0; 20 zephyr,flash-controller = &flash1; 21 zephyr,flash = &flash0; 22 zephyr,console = &uart9; 23 zephyr,shell-uart = &uart9; 24 zephyr,entropy = &trng; 25 zephyr,canbus = &canfd0; 26 }; 27 28 leds { 29 compatible = "gpio-leds"; 30 led1: led1 { 31 gpios = <&ioport6 0 GPIO_ACTIVE_HIGH>; 32 label = "LED1"; 33 }; 34 led2: led2 { 35 gpios = <&ioport4 14 GPIO_ACTIVE_HIGH>; 36 label = "LED2"; 37 }; 38 led3: led3 { 39 gpios = <&ioport1 7 GPIO_ACTIVE_HIGH>; 40 label = "LED3"; 41 }; 42 }; 43 44 mikrobus_header: mikrobus-connector { 45 compatible = "mikro-bus"; 46 #gpio-cells = <2>; 47 gpio-map-mask = <0xffffffff 0xffffffc0>; 48 gpio-map-pass-thru = <0 0x3f>; 49 gpio-map = <0 0 &ioport0 4 0>, /* AN */ 50 <1 0 &ioport5 2 0>, /* RST */ 51 <2 0 &ioport4 13 0>, /* CS */ 52 <3 0 &ioport4 12 0>, /* SCK */ 53 <4 0 &ioport4 10 0>, /* MISO */ 54 <5 0 &ioport4 11 0>, /* MOSI */ 55 /* +3.3V */ 56 /* GND */ 57 <6 0 &ioport9 7 0>, /* PWM */ 58 <7 0 &ioport0 10 0>, /* INT */ 59 <8 0 &ioport3 9 0>, /* RX */ 60 <9 0 &ioport3 10 0>, /* TX */ 61 <10 0 &ioport4 0 0>, /* SCL */ 62 <11 0 &ioport4 1 0>; /* SDA */ 63 /* +5V */ 64 /* GND */ 65 }; 66 67 pmod1_header: pmod-connector-1 { 68 compatible = "digilent,pmod"; 69 #gpio-cells = <2>; 70 gpio-map-mask = <0xffffffff 0xffffffc0>; 71 gpio-map-pass-thru = <0 0x3f>; 72 gpio-map = <0 0 &ioport6 12 0>, /* IO1 */ 73 <1 0 &ioport6 9 0>, /* IO2 */ 74 <2 0 &ioport6 10 0>, /* IO3 */ 75 <3 0 &ioport6 11 0>, /* IO4 */ 76 <4 0 &ioport0 6 0>, /* IO5 */ 77 <5 0 &ioporta 8 0>, /* IO6 */ 78 <6 0 &ioport6 14 0>, /* IO7 */ 79 <7 0 &ioport6 15 0>; /* IO8 */ 80 }; 81 82 pmod2_header: pmod-connector-2 { 83 compatible = "digilent,pmod"; 84 #gpio-cells = <2>; 85 gpio-map-mask = <0xffffffff 0xffffffc0>; 86 gpio-map-pass-thru = <0 0x3f>; 87 gpio-map = <0 0 &ioporta 5 0>, /* IO1 */ 88 <1 0 &ioporta 3 0>, /* IO2 */ 89 <2 0 &ioporta 2 0>, /* IO3 */ 90 <3 0 &ioporta 4 0>, /* IO4 */ 91 <4 0 &ioport5 8 0>, /* IO5 */ 92 <5 0 &ioport8 9 0>, /* IO6 */ 93 <6 0 &ioport8 10 0>, /* IO7 */ 94 <7 0 &ioport8 11 0>; /* IO8 */ 95 }; 96 97 buttons { 98 compatible = "gpio-keys"; 99 button0: s1 { 100 gpios = <&ioport0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; 101 label = "Push button switch 1"; 102 zephyr,code = <INPUT_KEY_0>; 103 }; 104 button1: s2 { 105 gpios = <&ioport0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; 106 label = "Push button switch 2"; 107 zephyr,code = <INPUT_KEY_1>; 108 }; 109 }; 110 111 aliases { 112 led0 = &led1; 113 sw0 = &button0; 114 sw1 = &button1; 115 }; 116 117 transceiver0: can-phy0 { 118 compatible = "nxp,tja1040t", "can-transceiver-gpio"; 119 standby-gpios = <&ioport2 7 GPIO_ACTIVE_HIGH>; 120 max-bitrate = <5000000>; 121 #phy-cells = <0>; 122 }; 123}; 124 125&xtal { 126 clock-frequency = <DT_FREQ_M(20)>; 127 mosel = <0>; 128 #clock-cells = <0>; 129 status = "okay"; 130}; 131 132&subclk { 133 status = "okay"; 134}; 135 136&pll { 137 status = "okay"; 138 pllp { 139 status = "okay"; 140 }; 141 142 pllq { 143 status = "okay"; 144 }; 145 146 pllr { 147 status = "okay"; 148 }; 149}; 150 151 152&sciclk { 153 clocks = <&pllp>; 154 div = <4>; 155 status = "okay"; 156}; 157 158&canfdclk { 159 clocks = <&pll>; 160 div = <5>; 161 status = "okay"; 162}; 163 164&ioport0 { 165 status = "okay"; 166}; 167 168&ioport1 { 169 status = "okay"; 170}; 171 172&ioport2 { 173 status = "okay"; 174}; 175 176&ioport3 { 177 status = "okay"; 178}; 179 180&ioport4 { 181 status = "okay"; 182}; 183 184&ioport5 { 185 status = "okay"; 186}; 187 188&ioport6 { 189 status = "okay"; 190}; 191 192&ioport8 { 193 status = "okay"; 194}; 195 196&ioport9 { 197 status = "okay"; 198}; 199 200&ioporta { 201 status = "okay"; 202}; 203 204&sci0 { 205 pinctrl-0 = <&sci0_default>; 206 pinctrl-names = "default"; 207 status = "okay"; 208 uart0: uart { 209 current-speed = <115200>; 210 status = "okay"; 211 }; 212}; 213 214&sci2 { 215 pinctrl-0 = <&sci2_default>; 216 pinctrl-names = "default"; 217 status = "okay"; 218 uart2: uart { 219 current-speed = <115200>; 220 status = "okay"; 221 }; 222}; 223 224&sci3 { 225 pinctrl-0 = <&sci3_default>; 226 pinctrl-names = "default"; 227 status = "okay"; 228 uart3: uart { 229 current-speed = <115200>; 230 status = "okay"; 231 }; 232}; 233 234&sci9 { 235 pinctrl-0 = <&sci9_default>; 236 pinctrl-names = "default"; 237 status = "okay"; 238 uart9: uart { 239 current-speed = <115200>; 240 status = "okay"; 241 }; 242}; 243 244mikrobus_serial: &uart3 {}; 245 246&iic1 { 247 #address-cells = <1>; 248 #size-cells = <0>; 249 clock-frequency = <DT_FREQ_M(1)>; 250 pinctrl-0 = <&iic1_default>; 251 pinctrl-names = "default"; 252}; 253 254&adc0 { 255 status = "okay"; 256 pinctrl-0 = <&adc0_default>; 257 pinctrl-names = "default"; 258 average-count = <4>; 259}; 260 261&trng { 262 status = "okay"; 263}; 264 265&spi1 { 266 pinctrl-0 = <&spi1_default>; 267 pinctrl-names = "default"; 268 status = "okay"; 269}; 270 271&pwm7 { 272 pinctrl-0 = <&pwm7_default>; 273 interrupts = <40 1>, <41 1>; 274 interrupt-names = "gtioca", "overflow"; 275 pinctrl-names = "default"; 276 status = "okay"; 277}; 278 279&flash1 { 280 partitions { 281 compatible = "fixed-partitions"; 282 #address-cells = <1>; 283 #size-cells = <1>; 284 285 storage_partition: partition@0 { 286 label = "storage"; 287 reg = <0X0 DT_SIZE_K(12)>; 288 }; 289 }; 290}; 291 292&canfd_global { 293 status = "okay"; 294 canfd0 { 295 pinctrl-0 = <&canfd0_default>; 296 pinctrl-names = "default"; 297 phys = <&transceiver0>; 298 rx-max-filters = <16>; 299 status = "okay"; 300 }; 301}; 302 303pmod1_serial: &uart0 {}; 304pmod2_serial: &uart2 {}; 305 306pmod_serial: &pmod1_serial {}; 307pmod_header: &pmod1_header {}; 308 309ð { 310 local-mac-address = [74 90 50 B0 6D 5A]; 311 status = "okay"; 312 phy-handle = <&phy>; 313}; 314 315&mdio { 316 pinctrl-0 = <ðer_default>; 317 pinctrl-names = "default"; 318 status = "okay"; 319 320 phy: ethernet-phy@5 { 321 compatible = "ethernet-phy"; 322 reg = <5>; 323 status = "okay"; 324 }; 325}; 326 327&usbhs { 328 pinctrl-0 = <&usbhs_default>; 329 pinctrl-names = "default"; 330 maximum-speed = "high-speed"; 331 status = "okay"; 332 zephyr_udc0: udc { 333 status = "okay"; 334 }; 335}; 336 337&usbhs_phy { 338 phys-clock-src = "xtal"; 339}; 340 341&port_irq12 { 342 interrupts = <88 12>; 343 status = "okay"; 344}; 345 346&port_irq13 { 347 interrupts = <89 12>; 348 status = "okay"; 349}; 350 351pmod_sd_shield: &sdhc0 {}; 352