Searched refs:TG0_WDT_LEVEL_INTR_SOURCE (Results 1 – 12 of 12) sorted by relevance
34 #define TG0_WDT_LEVEL_INTR_SOURCE 24 macro
43 #define TG0_WDT_LEVEL_INTR_SOURCE 33 macro
26 #define TG0_WDT_LEVEL_INTR_SOURCE 16 /* TIMER_GROUP0, WATCHDOG, level */ macro
63 #define TG0_WDT_LEVEL_INTR_SOURCE 53 /* interrupt of TIMER_GROUP0, WATCH DOG, level*/ macro
58 #define TG0_WDT_LEVEL_INTR_SOURCE 52 /* interrupt of TIMER_GROUP0, WATCH DOG, EDGE*/ macro
27 #define TG0_WDT_LEVEL_INTR_SOURCE 17 /* TIMER_GROUP0, WATCHDOG, level */ macro
206 interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
161 interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
282 interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
319 interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
356 interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
444 interrupts = <TG0_WDT_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;