Searched refs:TG0_T0_LEVEL_INTR_SOURCE (Results 1 – 12 of 12) sorted by relevance
33 #define TG0_T0_LEVEL_INTR_SOURCE 23 macro
42 #define TG0_T0_LEVEL_INTR_SOURCE 32 macro
24 #define TG0_T0_LEVEL_INTR_SOURCE 14 /* TIMER_GROUP0, TIMER0, level */ macro
61 #define TG0_T0_LEVEL_INTR_SOURCE 51 /* interrupt of TIMER_GROUP0, TIMER0, level*/ macro
56 #define TG0_T0_LEVEL_INTR_SOURCE 50 /* interrupt of TIMER_GROUP0, TIMER0, EDGE*/ macro
25 #define TG0_T0_LEVEL_INTR_SOURCE 15 /* TIMER_GROUP0, TIMER0, level */ macro
181 interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
106 interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
237 interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
251 interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
408 interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
404 interrupts = <TG0_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
