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/Zephyr-latest/dts/bindings/sensor/
Dmicrochip,tcn75a.yaml2 # SPDX-License-Identifier: Apache-2.0
8 include: [sensor-device.yaml, i2c-device.yaml]
11 alert-gpios:
12 type: phandle-array
22 default: "9-bit"
24 - "9-bit"
25 - "10-bit"
26 - "11-bit"
27 - "12-bit"
30 times. Note: datasheet's claim about the ambient temperature register:
[all …]
Dnxp,mcux-qdec.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,mcux-qdec"
8 include: [pinctrl-device.yaml, sensor-device.yaml]
17 counts-per-revolution:
24 single-phase-mode:
31 filter-count:
39 filter-sample-period:
42 The sampling period (in IPBus clock cycles) of the decoder input signals.
43 Each input is sampled multiple times at the rate specified by the Filter
/Zephyr-latest/dts/bindings/w1/
Dadi,max32-w1.yaml1 # Copyright (c) 2023-2024 Analog Devices, Inc.
2 # SPDX-License-Identifier: Apache-2.0
4 description: ADI MAX32xxx MCUs 1-Wire Master
6 include: [w1-master.yaml, pinctrl-device.yaml]
8 compatible: "adi,max32-w1"
20 pinctrl-0:
23 pinctrl-names:
26 internal-pullup:
32 0 - Internal pullup disabled.
33 1 - Internal pullup enabled.
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/Zephyr-latest/dts/bindings/adc/
Dst,stm32-adc.yaml3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "st,stm32-adc"
9 include: [adc-controller.yaml, pinctrl-device.yaml]
21 "#io-channel-cells":
24 st,adc-clock-source:
28 - "SYNC"
29 - "ASYNC"
32 - "SYNC": derived from the bus clock.
33 - "ASYNC" : independent and asynchronous with the bus clock
38 st,adc-prescaler:
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/Zephyr-latest/doc/hardware/peripherals/sensor/
Dpower_management.rst4 Power management of sensors is often a non-trivial task as sensors may have multiple power states
6 potentially saving quite a bit of power at the cost of noise or sampling speed performance. In very
10 channel states are mutable using :ref:`sensor-attribute`. While total device suspending and resume
15 :ref:`pm-device-runtime` using explicit calls at an application level to :c:func:`pm_device_runtime…
18 In the future, with :ref:`sensor-read-and-decode` its possible that automatic management of device …
19 would be possible in the streaming case as the application informs the driver of usage at all times
/Zephyr-latest/dts/arm/st/g4/
Dstm32g473.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "st,stm32g473", "st,stm32g4", "simple-bus";
14 compatible = "st,stm32-timers";
19 interrupt-names = "global";
24 compatible = "st,stm32-pwm";
26 #pwm-cells = <3>;
31 compatible = "st,stm32-adc";
36 #io-channel-cells = <1>;
41 sampling-times = <3 7 13 25 48 93 248 641>;
42 st,adc-sequencer = "FULLY_CONFIGURABLE";
[all …]
Dstm32g491.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "st,stm32g491", "st,stm32g4", "simple-bus";
14 compatible = "st,stm32-fdcan";
16 reg-names = "m_can", "message_ram";
18 interrupt-names = "int0", "int1";
20 bosch,mram-cfg = <0x350 28 8 3 3 0 3 3>;
25 compatible = "st,stm32-timers";
30 interrupt-names = "brk", "up", "trgcom", "cc";
35 compatible = "st,stm32-pwm";
37 #pwm-cells = <3>;
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/Zephyr-latest/dts/arm/st/u5/
Dstm32u595.dtsi5 * SPDX-License-Identifier: Apache-2.0
13 compatible = "st,stm32u595", "st,stm32u5", "simple-bus";
15 pinctrl: pin-controller@42020000 {
16 compatible = "st,stm32-pinctrl";
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "st,stm32-gpio";
23 gpio-controller;
24 #gpio-cells = <2>;
31 compatible = "st,stm32-usart", "st,stm32-uart";
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/Zephyr-latest/dts/arm/st/f3/
Dstm32f334.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
12 compatible = "st,stm32f334", "st,stm32f3", "simple-bus";
15 compatible = "st,stm32-timers";
20 interrupt-names = "brk", "up", "trgcom", "cc";
25 compatible = "st,stm32-pwm";
27 #pwm-cells = <3>;
32 compatible = "st,stm32-adc";
37 #io-channel-cells = <1>;
42 sampling-times = <2 3 5 8 20 62 182 602>;
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Dstm32f303.dtsi2 * Copyright (c) 2017 I-SENSE group of ICCS
4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
12 compatible = "st,stm32f303", "st,stm32f3", "simple-bus";
20 compatible = "st,stm32-i2c-v2";
21 clock-frequency = <I2C_BITRATE_STANDARD>;
22 #address-cells = <1>;
23 #size-cells = <0>;
31 interrupt-names = "event", "error";
36 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
[all …]
Dstm32f302.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
12 compatible = "st,stm32f302", "st,stm32f3", "simple-bus";
20 compatible = "st,stm32-i2c-v2";
21 clock-frequency = <I2C_BITRATE_STANDARD>;
22 #address-cells = <1>;
23 #size-cells = <0>;
31 interrupt-names = "event", "error";
36 compatible = "st,stm32-i2c-v2";
37 clock-frequency = <I2C_BITRATE_STANDARD>;
[all …]
Dstm32f373.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/adc/stm32f1_adc.h>
12 compatible = "st,stm32f373", "st,stm32f3", "simple-bus";
19 compatible = "st,stm32f1-rcc";
22 pinctrl: pin-controller@48000000 {
24 compatible = "st,stm32-gpio";
25 gpio-controller;
26 #gpio-cells = <2>;
33 compatible = "st,stm32-i2c-v2";
34 clock-frequency = <I2C_BITRATE_STANDARD>;
[all …]
/Zephyr-latest/dts/arm/st/f4/
Dstm32f446.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/clock/stm32f410_clock.h>
9 #include <zephyr/dt-bindings/memory-controller/stm32-fmc-sdram.h>
14 compatible = "st,stm32f411-plli2s-clock";
19 compatible = "st,stm32f446", "st,stm32f4", "simple-bus";
22 compatible = "st,stm32-i2s";
23 #address-cells = <1>;
24 #size-cells = <0>;
30 dma-names = "tx", "rx";
35 compatible = "st,stm32-usart", "st,stm32-uart";
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Dstm32f405.dtsi5 * SPDX-License-Identifier: Apache-2.0
16 compatible = "st,stm32f405", "st,stm32f4", "simple-bus";
18 pinctrl: pin-controller@40020000 {
22 compatible = "st,stm32-gpio";
23 gpio-controller;
24 #gpio-cells = <2>;
30 compatible = "st,stm32-gpio";
31 gpio-controller;
32 #gpio-cells = <2>;
38 compatible = "st,stm32-gpio";
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/Zephyr-latest/tests/drivers/adc/adc_api/src/
Dtest_adc.c5 * SPDX-License-Identifier: Apache-2.0
39 /* Data of ADC io-channels specified in devicetree. */
74 dev->name, err); in init_counter()
165 if (ret == -ENOTSUP) { in test_task_multiple_channels()
242 if (sequence->options->user_data != &my_sequence_identifier) { in sample_with_interval_callback()
243 user_data = sequence->options->user_data; in sample_with_interval_callback()
247 TC_PRINT("%s: sampling %d\n", __func__, sampling_index); in sample_with_interval_callback()
271 if (ret == -ENOTSUP) { in test_task_with_interval()
276 zassert_equal(user_data, sequence.options->user_data, in test_task_with_interval()
278 user_data, sequence.options->user_data); in test_task_with_interval()
[all …]
/Zephyr-latest/tests/drivers/sensor/temp_sensor/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
69 if (rc == -ENOSYS || rc == -ENOTSUP) { in ZTEST()
79 val.val1 -= 5; in ZTEST()
85 val.val1 -= 1; in ZTEST()
90 /* Set sampling frequency to 10 Hz, to expect a trigger after 100 ms. */ in ZTEST()
95 zassert_ok(rc, "Cannot set sampling frequency: %d.", rc); in ZTEST()
123 "Device %s is not ready.", temp_dev->name); in before()
127 * Try several times if it appears to be needing a while for some in before()
132 if (rc != -EAGAIN && rc != -ENOTCONN) { in before()
148 if (rc == -ENOTSUP) { in before()
/Zephyr-latest/drivers/adc/
Dadc_stm32.c9 * SPDX-License-Identifier: Apache-2.0
46 #include <zephyr/dt-bindings/adc/stm32_adc.h>
51 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
56 #include <zephyr/linker/linker-defs.h>
81 * compat st_stm32f1_adc -> STM32F1, F37x (ADC1_V2_5)
82 * compat st_stm32f4_adc -> STM32F2, F4, F7, L1
145 /* Number of different sampling time values */
196 /* Allow ADC to create DMA request and set to one-shot mode as implemented in HAL drivers */ in adc_stm32_enable_dma_support()
213 const struct adc_stm32_cfg *config = dev->config; in adc_stm32_dma_start()
214 ADC_TypeDef *adc = config->base; in adc_stm32_dma_start()
[all …]
/Zephyr-latest/dts/arm/st/g0/
Dstm32g0.dtsi3 * Copyright (c) 2019-2024 STMicroelectronics
6 * Copyright (c) 2021 G-Technologies Sdn. Bhd.
8 * SPDX-License-Identifier: Apache-2.0
11 #include <arm/armv6-m.dtsi>
12 #include <zephyr/dt-bindings/clock/stm32g0_clock.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/adc.h>
[all …]
/Zephyr-latest/dts/arm/st/l0/
Dstm32l0.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32l0_clock.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-latest/dts/arm/st/c0/
Dstm32c0.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/stm32c0_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/dma/stm32_dma.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-latest/dts/arm/st/f0/
Dstm32f0.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv6-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32f0_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
17 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
[all …]
/Zephyr-latest/dts/arm/st/h7/
Dstm32h723.dtsi5 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/display/panel.h>
11 #include <zephyr/dt-bindings/flash_controller/ospi.h>
15 compatible = "st,stm32h723", "st,stm32h7", "simple-bus";
17 flash-controller@52002000 {
19 compatible = "st,stm32-nv-flash", "soc-nv-flash";
20 write-block-size = <32>;
21 erase-block-size = <DT_SIZE_K(128)>;
23 max-erase-time = <4000>;
28 compatible = "st,stm32-uart";
[all …]
Dstm32h7.dtsi7 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv7-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32h7_clock.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32h7_adc.h>
18 #include <zephyr/dt-bindings/reset/stm32h7_reset.h>
[all …]
/Zephyr-latest/dts/arm/st/l4/
Dstm32l4.dtsi6 * SPDX-License-Identifier: Apache-2.0
10 #include <arm/armv7-m.dtsi>
11 #include <zephyr/dt-bindings/clock/stm32l4_clock.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/pwm/pwm.h>
15 #include <zephyr/dt-bindings/adc/adc.h>
16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
17 #include <zephyr/dt-bindings/dma/stm32_dma.h>
18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]
/Zephyr-latest/dts/arm/st/f7/
Dstm32f7.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32f7_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32f4_adc.h>
17 #include <zephyr/dt-bindings/reset/stm32f2_4_7_reset.h>
[all …]

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