| /Zephyr-latest/soc/nxp/imx/imx8ulp/adsp/ |
| D | _soc_inthandlers.h | 4 * SPDX-License-Identifier: Apache-2.0
11 * declared to be associated with a given interrupt level. Each
12 * dispatcher will handle exactly one flagged interrupt, in numerical
13 * order (low bits first) and will return a mask of that bit that can
18 #include <xtensa/config/core-isa.h>
23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
[all …]
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| /Zephyr-latest/soc/espressif/common/include/ |
| D | _soc_inthandlers.h | 4 * SPDX-License-Identifier: Apache-2.0
12 * declared to be associated with a given interrupt level. Each
13 * dispatcher will handle exactly one flagged interrupt, in numerical
14 * order (low bits first) and will return a mask of that bit that can
19 #include <xtensa/config/core-isa.h>
24 #error core-isa.h interrupt level does not match dispatcher!
27 #error core-isa.h interrupt level does not match dispatcher!
30 #error core-isa.h interrupt level does not match dispatcher!
33 #error core-isa.h interrupt level does not match dispatcher!
36 #error core-isa.h interrupt level does not match dispatcher!
[all …]
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| /Zephyr-latest/soc/cdns/sample_controller32/include/ |
| D | _soc_inthandlers.h | 4 * SPDX-License-Identifier: Apache-2.0
12 * declared to be associated with a given interrupt level. Each
13 * dispatcher will handle exactly one flagged interrupt, in numerical
14 * order (low bits first) and will return a mask of that bit that can
19 #include <xtensa/config/core-isa.h>
24 #error core-isa.h interrupt level does not match dispatcher!
27 #error core-isa.h interrupt level does not match dispatcher!
30 #error core-isa.h interrupt level does not match dispatcher!
33 #error core-isa.h interrupt level does not match dispatcher!
36 #error core-isa.h interrupt level does not match dispatcher!
[all …]
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| /Zephyr-latest/soc/intel/intel_adsp/cavs/ |
| D | _soc_inthandlers.h | 3 * SPDX-License-Identifier: Apache-2.0
10 * declared to be associated with a given interrupt level. Each
11 * dispatcher will handle exactly one flagged interrupt, in numerical
12 * order (low bits first) and will return a mask of that bit that can
17 #include <xtensa/config/core-isa.h>
22 #error core-isa.h interrupt level does not match dispatcher!
25 #error core-isa.h interrupt level does not match dispatcher!
28 #error core-isa.h interrupt level does not match dispatcher!
31 #error core-isa.h interrupt level does not match dispatcher!
34 #error core-isa.h interrupt level does not match dispatcher!
[all …]
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| /Zephyr-latest/soc/nxp/imx/imx8x/adsp/ |
| D | _soc_inthandlers.h | 4 * SPDX-License-Identifier: Apache-2.0
11 * declared to be associated with a given interrupt level. Each
12 * dispatcher will handle exactly one flagged interrupt, in numerical
13 * order (low bits first) and will return a mask of that bit that can
18 #include <xtensa/config/core-isa.h>
23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
[all …]
|
| /Zephyr-latest/soc/nxp/imx/imx8/adsp/ |
| D | _soc_inthandlers.h | 4 * SPDX-License-Identifier: Apache-2.0
11 * declared to be associated with a given interrupt level. Each
12 * dispatcher will handle exactly one flagged interrupt, in numerical
13 * order (low bits first) and will return a mask of that bit that can
18 #include <xtensa/config/core-isa.h>
23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
[all …]
|
| /Zephyr-latest/soc/nxp/imx/imx8m/adsp/ |
| D | _soc_inthandlers.h | 4 * SPDX-License-Identifier: Apache-2.0
11 * declared to be associated with a given interrupt level. Each
12 * dispatcher will handle exactly one flagged interrupt, in numerical
13 * order (low bits first) and will return a mask of that bit that can
18 #include <xtensa/config/core-isa.h>
23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
35 #error core-isa.h interrupt level does not match dispatcher!
[all …]
|
| /Zephyr-latest/soc/intel/intel_adsp/ace/ |
| D | _soc_inthandlers.h | 2 * SPDX-License-Identifier: Apache-2.0
9 * declared to be associated with a given interrupt level. Each
10 * dispatcher will handle exactly one flagged interrupt, in numerical
11 * order (low bits first) and will return a mask of that bit that can
16 #include <xtensa/config/core-isa.h>
21 #error core-isa.h interrupt level does not match dispatcher!
24 #error core-isa.h interrupt level does not match dispatcher!
27 #error core-isa.h interrupt level does not match dispatcher!
30 #error core-isa.h interrupt level does not match dispatcher!
33 #error core-isa.h interrupt level does not match dispatcher!
[all …]
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| /Zephyr-latest/soc/nxp/imxrt/imxrt5xx/f1/include/ |
| D | _soc_inthandlers.h | 3 * SPDX-License-Identifier: Apache-2.0
6 #include <xtensa/config/core-isa.h>
11 #error core-isa.h interrupt level does not match dispatcher!
14 #error core-isa.h interrupt level does not match dispatcher!
17 #error core-isa.h interrupt level does not match dispatcher!
20 #error core-isa.h interrupt level does not match dispatcher!
23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
[all …]
|
| /Zephyr-latest/soc/cdns/xtensa_sample_controller/include/ |
| D | _soc_inthandlers.h | 6 * declared to be associated with a given interrupt level. Each
7 * dispatcher will handle exactly one flagged interrupt, in numerical
8 * order (low bits first) and will return a mask of that bit that can
13 #include <xtensa/config/core-isa.h>
17 #error core-isa.h interrupt level does not match dispatcher!
20 #error core-isa.h interrupt level does not match dispatcher!
23 #error core-isa.h interrupt level does not match dispatcher!
26 #error core-isa.h interrupt level does not match dispatcher!
29 #error core-isa.h interrupt level does not match dispatcher!
32 #error core-isa.h interrupt level does not match dispatcher!
[all …]
|
| /Zephyr-latest/drivers/gpio/ |
| D | gpio_grgpio2.c | 4 * SPDX-License-Identifier: Apache-2.0
9 * - iflag determine pending interrupt.
10 * - interrupt map decides interrupt number if implemented.
11 * - logic or/and/xor registers used when possible
28 int interrupt; member
45 const struct cfg *cfg = dev->config; in pin_configure()
46 struct data *data = dev->data; in pin_configure()
47 volatile struct grgpio_regs *regs = cfg->regs; in pin_configure()
48 uint32_t mask = 1 << pin; in pin_configure() local
51 return -ENOTSUP; in pin_configure()
[all …]
|
| D | gpio_grgpio.h | 4 * SPDX-License-Identifier: Apache-2.0
13 uint32_t imask; /* 0x0C Interrupt mask register */
14 uint32_t ipol; /* 0x10 Interrupt polarity register */
15 uint32_t iedge; /* 0x14 Interrupt edge register */
18 uint32_t irqmap[4]; /* 0x20 - 0x2C Interrupt map registers */
23 uint32_t iavail; /* 0x40 Interrupt available register */
24 uint32_t iflag; /* 0x44 Interrupt flag register */
28 uint32_t output_or; /* 0x54 I/O port output register, logical-OR */
29 uint32_t dir_or; /* 0x58 I/O port dir. register, logical-OR */
30 uint32_t imask_or; /* 0x5C Interrupt mask register, logical-OR */
[all …]
|
| D | gpio_sam.c | 5 * SPDX-License-Identifier: Apache-2.0
17 #include <zephyr/dt-bindings/gpio/atmel-sam-gpio.h>
41 static int gpio_sam_port_configure(const struct device *dev, uint32_t mask, in gpio_sam_port_configure() argument
44 const struct gpio_sam_config * const cfg = dev->config; in gpio_sam_port_configure()
45 Pio * const pio = cfg->regs; in gpio_sam_port_configure()
49 /* Enable open-drain drive mode */ in gpio_sam_port_configure()
50 pio->PIO_MDER = mask; in gpio_sam_port_configure()
52 /* Open-drain is the only supported single-ended mode */ in gpio_sam_port_configure()
53 return -ENOTSUP; in gpio_sam_port_configure()
56 /* Disable open-drain drive mode */ in gpio_sam_port_configure()
[all …]
|
| D | gpio_iproc.c | 5 * SPDX-License-Identifier: Apache-2.0
43 #define DEV_CFG(dev) ((const struct gpio_iproc_config *const)(dev)->config)
44 #define DEV_DATA(dev) ((struct gpio_iproc_data *const)(dev)->data)
49 mem_addr_t base = cfg->base; in gpio_iproc_configure()
66 mem_addr_t base = cfg->base; in gpio_iproc_port_get_raw()
73 static int gpio_iproc_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value) in gpio_iproc_port_set_masked_raw() argument
76 mem_addr_t base = cfg->base; in gpio_iproc_port_set_masked_raw()
79 value = (value & (~mask)) | (value & mask); in gpio_iproc_port_set_masked_raw()
85 static int gpio_iproc_port_set_bits_raw(const struct device *dev, uint32_t mask) in gpio_iproc_port_set_bits_raw() argument
88 mem_addr_t base = cfg->base; in gpio_iproc_port_set_bits_raw()
[all …]
|
| /Zephyr-latest/drivers/serial/ |
| D | uart_pl011_registers.h | 6 * SPDX-License-Identifier: Apache-2.0
45 #define PL011_BIT_MASK(x, y) (((2 << x) - 1) << y)
48 #define PL011_FR_CTS BIT(0) /* clear to send - inverted */
49 #define PL011_FR_DSR BIT(1) /* data set ready - inverted */
50 #define PL011_FR_DCD BIT(2) /* data carrier detect - inverted */
56 #define PL011_FR_RI BIT(8) /* ring indicator - inverted */
84 #define PL011_LCRH_WLEN_SIZE(x) (x - 5)
108 /* PL011 Control Register - vendor-specific fields */
118 /* PL011 Interrupt Fifo Level Select Register */
124 /* PL011 Interrupt Mask Set/Clear Register */
[all …]
|
| /Zephyr-latest/drivers/interrupt_controller/ |
| D | wuc_ite_it8xxx2.c | 4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/interrupt-controller/it8xxx2-wuc.h>
32 void it8xxx2_wuc_enable(const struct device *dev, uint8_t mask) in it8xxx2_wuc_enable() argument
34 const struct it8xxx2_wuc_cfg *config = dev->config; in it8xxx2_wuc_enable()
35 volatile uint8_t *reg_wuenr = config->reg_wuenr; in it8xxx2_wuc_enable()
45 /* Enable wakeup interrupt of the pin */ in it8xxx2_wuc_enable()
46 *reg_wuenr |= mask; in it8xxx2_wuc_enable()
49 void it8xxx2_wuc_disable(const struct device *dev, uint8_t mask) in it8xxx2_wuc_disable() argument
51 const struct it8xxx2_wuc_cfg *config = dev->config; in it8xxx2_wuc_disable()
52 volatile uint8_t *reg_wuenr = config->reg_wuenr; in it8xxx2_wuc_disable()
[all …]
|
| D | Kconfig.multilevel | 1 # Multilevel interrupt configuration
5 # SPDX-License-Identifier: Apache-2.0
8 bool "Multi-level interrupt support"
13 levels are used, a second level interrupt aggregator would combine
15 interrupt controller. If three levels are used, a third level
17 second level. The number of interrupt levels is usually determined
18 by the hardware. (The term "aggregator" here means "interrupt
23 int "Total number of first level interrupt bits"
27 The number of bits to use of the 32 bit interrupt mask for first
31 int "Max IRQs per interrupt aggregator"
[all …]
|
| /Zephyr-latest/include/zephyr/arch/xtensa/ |
| D | irq.h | 3 * SPDX-License-Identifier: Apache-2.0
12 #include <xtensa/config/core-isa.h>
23 * mask - Bit mask of interrupts to be enabled.
25 static inline void z_xt_ints_on(unsigned int mask) in z_xt_ints_on() argument
30 val |= mask; in z_xt_ints_on()
38 * mask - Bit mask of interrupts to be disabled.
40 static inline void z_xt_ints_off(unsigned int mask) in z_xt_ints_off() argument
45 val &= ~mask; in z_xt_ints_off()
51 * Call this function to set the specified (s/w) interrupt.
114 * @brief Enable interrupt on Xtensa core.
[all …]
|
| /Zephyr-latest/dts/bindings/interrupt-controller/ |
| D | mediatek,adsp_intc.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: MediaTek MT8xxx Audio DSP Interrupt Controller
8 include: [interrupt-controller.yaml, base.yaml]
17 "#interrupt-cells":
20 status-reg:
21 description: Register address of interrupt-is-signaled bits
25 mask:
26 description: Mask of valid interrupt bits
30 interrupt-cells:
31 - irq
[all …]
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| D | nuvoton,npcx-miwu-int-map.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: NPCX-MIWU group-interrupt mapping child node
6 compatible: "nuvoton,npcx-miwu-int-map"
14 child-binding:
15 description: Child node to present the mapping between MIWU group and interrupt
21 irq-prio:
25 group-mask:
28 description: group bit-mask for miwu interrupts
31 description: groups shared the same interrupt
|
| /Zephyr-latest/soc/atmel/sam/common/ |
| D | soc_gpio.c | 3 * SPDX-License-Identifier: Apache-2.0
24 static void configure_common_attr(Pio *pio, uint32_t mask, uint32_t flags) in configure_common_attr() argument
27 pio->PIO_IDR = mask; in configure_common_attr()
29 /* Configure pull-up(s) */ in configure_common_attr()
31 pio->PIO_PUER = mask; in configure_common_attr()
33 pio->PIO_PUDR = mask; in configure_common_attr()
36 /* Configure pull-down only for MCU series that support it */ in configure_common_attr()
38 /* Configure pull-down(s) */ in configure_common_attr()
40 pio->PIO_PPDER = mask; in configure_common_attr()
42 pio->PIO_PPDDR = mask; in configure_common_attr()
[all …]
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| /Zephyr-latest/dts/bindings/gpio/ |
| D | nxp,pca95xx.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 description: PCA95xx series I2C-based GPIO expander
8 include: [gpio-controller.yaml, i2c-device.yaml]
11 has-pud:
13 description: Supports pull-up/pull-down
15 has-interrupt-mask-reg:
17 description: Has Interrupt mask register (PCAL95xx)
19 interrupt-gpios:
20 type: phandle-array
21 description: Interrupt GPIO pin (active-low open-drain)
[all …]
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| /Zephyr-latest/dts/arm/nuvoton/npcx/npcx9/ |
| D | npcx9-miwus-int-map.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /* Common MIWU group-interrupt mapping configurations in npcx family */
8 #include <nuvoton/npcx/npcx-miwus-int-map.dtsi>
10 /* Specific MIWU group-interrupt mapping configurations in npcx9 series */
13 npcx-miwus-int-map {
14 map_miwu0_groups: map-miwu0-groups {
15 compatible = "nuvoton,npcx-miwu-int-map";
18 group_a0: group-a0-map {
20 irq-prio = <2>;
21 group-mask = <0x01>;
[all …]
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| /Zephyr-latest/include/zephyr/drivers/interrupt_controller/ |
| D | intc_esp32.h | 4 * SPDX-License-Identifier: Apache-2.0
17 * Interrupt allocation flags - These flags can be used to specify
18 * which interrupt qualities the code calling esp_intr_alloc* needs.
30 #define ESP_INTR_FLAG_SHARED (1<<8) /* Interrupt can be shared between ISRs */
31 #define ESP_INTR_FLAG_EDGE (1<<9) /* Edge-triggered interrupt */
33 #define ESP_INTR_FLAG_INTRDISABLED (1<<11) /* Return with this interrupt disabled */
42 /* Mask for all level flags */
48 * Get the interrupt flags from the supplied priority.
54 * Check interrupt flags from input and filter unallowed values.
60 * are routed through the interrupt mux. Apart from these sources, each core also has some internal
[all …]
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| /Zephyr-latest/arch/arc/core/ |
| D | arc_connect.c | 4 * SPDX-License-Identifier: Apache-2.0
20 /* Generate an inter-core interrupt to the target core */
28 /* Acknowledge the inter-core interrupt raised by core */
36 /* Read inter-core interrupt status */
49 /* Check the source of inter-core interrupt */
62 /* Clear the inter-core interrupt */
77 c = find_lsb_set(cpu) - 1; in z_arc_connect_ici_clear()
112 /* Set core mask */
113 void z_arc_connect_debug_mask_set(uint32_t core_mask, uint32_t mask) in z_arc_connect_debug_mask_set() argument
117 mask, core_mask); in z_arc_connect_debug_mask_set()
[all …]
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