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/Zephyr-latest/dts/bindings/pinctrl/
Dnxp,s32k3-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
12 peripheral with the same configuration properties. The 'pinmux' property in
16 For example, to configure the pinmux for UART0, modify the 'pinctrl' from your
20 #include <nxp/s32/S32K344-257BGA-pinctrl.h>
25 pinmux = <PTA3_LPUART0_TX_O>;
26 output-enable;
29 pinmux = <PTA28_LPUART0_RX>;
30 input-enable;
36 of a device. The 'default' state is the active state. Other states for the same
37 device can be specified in separate child nodes of 'pinctrl'.
[all …]
Drenesas,smartbond-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
16 All device pin configurations should be placed in child nodes of the
19 /* You can put this in places like a board-pinctrl.dtsi file in
24 #include <dt-bindings/pinctrl/smartbond-pinctrl.h>
27 /* configuration for uart device, default state */
32 pinmux = <SMARTBOND_PINMUX(UART_TX, 0, 9)>;
36 /* route UART RX to P0.8 and enable pull-up */
37 pinmux = <SMARTBOND_PINMUX(UART_RX, 0, 8)>;
38 bias-pull-up;
44 particular state of a device; in this case, the default (that is, active)
[all …]
Dnuvoton,npcx-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
10 - bias-pull-down: Enable pull-down resistor.
11 - bias-pull-up: Enable pull-up resistor.
12 - drive-open-drain: Output driver is open-drain.
15 - pinmux-locked: Lock pinmux configuration for peripheral device
16 - pinmux-gpio: Inverse pinmux back to gpio
17 - psl-in-mode: Select the assertion detection mode of PSL input
18 - psl-in-pol: Select the assertion detection polarity of PSL input
23 #include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
26 internal 3.3V pull-up if its i2c frequency won't exceed 400kHz.
[all …]
Drenesas,rzg-pinctrl.yaml3 # SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl_rzg3s.h>
10 device-pinmux {
11 pinmux = <RZG_PINMUX(PORT_08, 1, 5)>,
15 drive-strength = <1>;
18 device-spins {
20 input-enable;
22 drive-strength = <2>;
27 compatible: renesas,rzg-pinctrl
34 reg-names:
[all …]
Dtelink,b91-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
7 use this node to route UART0 TX to pin PB2 and enable the pull-up resistor
17 All device pin configurations should be placed in child nodes of the
20 /* You can put this in places like a board-pinctrl.dtsi file in
24 /* include pre-defined pins and functions for the SoC used by the board */
25 #include <dt-bindings/pinctrl/b91-pinctrl.h>
31 pinmux = <B91_PINMUX_SET(B91_PORT_B, B91_PIN_2, B91_FUNC_C)>;
36 pinmux = <B91_PINMUX_SET(B91_PORT_B, B91_PIN_3, B91_FUNC_C)>;
41 for a particular state of a device; in this case, the default
42 (that is, active) state. You would specify the low-power configuration for
[all …]
Dnxp,s32ze-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
12 peripheral with the same configuration properties. The 'pinmux' property in
16 For example, to configure the pinmux for UART0, modify the 'pinctrl' from your
20 #include <nxp/s32/S32Z27-BGA594-pinctrl.h>
25 pinmux = <PB10_LIN_0_TX>;
26 output-enable;
29 pinmux = <PB11_LIN_0_RX>;
30 input-enable;
36 of a device. The 'default' state is the active state. Other states for the same
37 device can be specified in separate child nodes of 'pinctrl'.
[all …]
Datmel,sam-pinctrl.yaml3 # Copyright (c) 2021-2022, Gerson Fernando Budke <nandojve@gmail.com>
4 # SPDX-License-Identifier: Apache-2.0
11 to route USART0 RX to pin PA10 and enable the pull-up resistor on the pin.
20 All device pin configurations should be placed in child nodes of the 'pinctrl'
23 /** You can put this in places like a <board>-pinctrl.dtsi file in
27 /** include pre-defined combinations for the SoC variant used by the board */
28 #include <dt-bindings/pinctrl/sam4sXc-pinctrl.h>
36 pinmux = <PA6A_USART0_TXD0>, <PA8A_USART0_CTS0>;
41 pinmux = <PA5A_USART0_RXD0>, <PA7A_USART0_RTS0>;
42 /* both PA5 and PA7 have pull-up enabled */
[all …]
Dsifive,pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
9 Device pin configuration should be placed in the child nodes of this node.
10 Populate the 'pinmux' field with a pair consisting of a pin number and its IO
12 - SIFIVE_PINMUX_IOF0
13 - SIFIVE_PINMUX_IOF1
17 #include <dt-bindings/pinctrl/sifive-pinctrl.h>
21 pinmux = <16 SIFIVE_PINMUX_IOF0>;
24 pinmux = <17 SIFIVE_PINMUX_IOF0>;
36 child-binding:
42 pinmux:
Dsnps,emsdp-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
7 Device pin configuration should be placed in the child nodes of this node.
8 Populate the 'pinmux' field with a pair consisting of a pin number and its IO
13 #include <zephyr/dt-bindings/pinctrl/emsdp-pinctrl.h>
17 pinmux = <PMOD_A PMOD_SPI>;
21 compatible: "snps,emsdp-pinctrl"
29 child-binding:
35 pinmux:
Datmel,sam0-pinctrl.yaml2 # Copyright (c) 2021-2022, Gerson Fernando Budke
3 # SPDX-License-Identifier: Apache-2.0
10 to route SERCOM0 as UART were RX to pin PAD1 and enable the pull-up resistor
20 All device pin configurations should be placed in child nodes of the 'pinctrl'
23 /** You can put this in places like a <board>-pinctrl.dtsi file in
27 /** include pre-defined combinations for the SoC variant used by the board */
28 #include <dt-bindings/pinctrl/samr21g-pinctrl.h>
36 pinmux = <PA5D_SERCOM0_PAD1>, <PA6D_SERCOM0_PAD2>;
41 pinmux = <PA4D_SERCOM0_PAD0>, <PA7D_SERCOM0_PAD3>;
42 /* both PA5 and PA7 have pull-up enabled */
[all …]
Drenesas,rzt2m-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
16 All device pin configurations should be placed in child nodes of the
19 /* You can put this in places like a board-pinctrl.dtsi file in
23 /* include pre-defined combinations for the SoC variant used by the board */
24 #include <dt-bindings/pinctrl/renesas-rzt2m-pinctrl.h>
29 pinmux = <UART0TX_P16_5>;
32 pinmux = <UART0RX_P16_6>;
33 input-enable;
39 particular state of a device; in this case, the default (that is, active)
43 Each group can specify a list of pin function selections in the 'pinmux'
[all …]
Dgd,gd32-pinctrl-afio.yaml2 # SPDX-License-Identifier: Apache-2.0
7 use this node to route USART0 RX to pin PA10 and enable the pull-up resistor
17 All device pin configurations should be placed in child nodes of the
20 /* You can put this in places like a board-pinctrl.dtsi file in
24 /* include pre-defined combinations for the SoC variant used by the board */
25 #include <dt-bindings/pinctrl/gd32f403z(k-i-g-e-c-b)xx-pinctrl.h>
33 pinmux = <USART0_TX_PA9_NORMP>, <USART0_CTS_PA11_NORMP>;
38 pinmux = <USART0_RX_PA10_NORMP>, <USART0_RTS_PA12_NORMP>;
39 /* both PA10 and PA12 have pull-up enabled */
40 bias-pull-up;
[all …]
Dti,cc32xx-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
7 use this node to route UART0 RX to pin 55 and enable the pull-up resistor
17 All device pin configurations should be placed in child nodes of the
20 /* You can put this in places like a board-pinctrl.dtsi file in
24 /* include pre-defined combinations for the SoC variant used by the board */
25 #include <dt-bindings/pinctrl/gd32f450i(g-i-k)xx-pinctrl.h>
33 pinmux = <UART0_TX_P55>, <UART0_CTS_P61>;
38 pinmux = <UART0_RX_P57>, <UART0_RTS_P62>;
39 /* both pin 57 and 62 have pull-up enabled */
40 bias-pull-up;
[all …]
Dgd,gd32-pinctrl-af.yaml2 # SPDX-License-Identifier: Apache-2.0
7 use this node to route USART0 RX to pin PA10 and enable the pull-up resistor
17 All device pin configurations should be placed in child nodes of the
20 /* You can put this in places like a board-pinctrl.dtsi file in
24 /* include pre-defined combinations for the SoC variant used by the board */
25 #include <dt-bindings/pinctrl/gd32f450i(g-i-k)xx-pinctrl.h>
33 pinmux = <USART0_TX_PA9>, <USART0_CTS_PA11>;
38 pinmux = <USART0_RX_PA10>, <USART0_RTS_PA12>;
39 /* both PA10 and PA12 have pull-up enabled */
40 bias-pull-up;
[all …]
Dquicklogic,eos-s3-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
8 Device pin configuration should be placed in the child nodes of this node.
9 Populate the 'pinmux' field with IO function and pin number.
13 #include <dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h>
17 pinmux = <UART_RX_PAD45>;
18 input-enable;
21 pinmux = <UART_TX_PAD44>;
22 output-enable;
26 compatible: "quicklogic,eos-s3-pinctrl"
34 child-binding:
[all …]
Dnxp,imx-iomuxc.yaml2 # SPDX-License-Identifier: Apache-2.0
5 This compatible binding should be applied to the device's iomuxc DTS node.
6 the DTS node will be populated with all pinmux options for the specific SOC.
7 These options can then be used in a pinctrl node with the "nxp,mcux-rt-pinctrl"
10 The user should not edit the bindings defined within this node to make pinmux
13 compatible: "nxp,imx-iomuxc"
16 - name: base.yaml
22 child-binding:
25 pinmux:
51 pin-pue:
[all …]
Dti,cc13xx-cc26xx-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
7 Device pin configuration should be placed in the child nodes of this node.
8 Populate the 'pinmux' field with a pair consisting of a pin number and its IO
18 All device pin configurations should be placed in child nodes of the
24 - bias-disable: Disable pull-up/down.
25 - bias-pull-down: Enable pull-down resistor.
26 - bias-pull-up: Enable pull-up resistor.
27 - drive-open-drain: Output driver is open-drain.
28 - drive-open-drain: Output driver is open-source.
29 - drive-strength: Minimum current that can be sourced from the pin.
[all …]
Dnuvoton,numaker-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
16 All device pin configurations should be placed in child nodes of the
24 pinmux = <PB12MFP_UART0_RXD>, <PB13MFP_UART0_TXD>;
30 To link pin configurations with a device, use a pinctrl-N property for some
33 #include "board-pinctrl.dtsi"
36 pinctrl-0 = <&uart0_default>;
37 pinctrl-names = "default";
40 compatible: "nuvoton,numaker-pinctrl"
48 child-binding:
50 child-binding:
[all …]
/Zephyr-latest/tests/drivers/pinctrl/gd32/boards/
Dgd32f450i_eval.overlay3 * SPDX-License-Identifier: Apache-2.0
8 compatible = "vnd,pinctrl-device";
9 pinctrl-0 = <&test_device_default>;
10 pinctrl-names = "default";
20 pinmux = <GD32_PINMUX_AF('A', 0, AF0)>,
24 pinmux = <GD32_PINMUX_AF('C', 2, AF2)>;
25 drive-push-pull;
28 pinmux = <GD32_PINMUX_AF('A', 3, AF3)>;
29 drive-open-drain;
32 pinmux = <GD32_PINMUX_AF('B', 4, AF4)>;
[all …]
Dgd32f403z_eval.overlay3 * SPDX-License-Identifier: Apache-2.0
10 compatible = "vnd,pinctrl-device";
11 pinctrl-0 = <&test_device_default>;
12 pinctrl-names = "default";
22 pinmux = <GD32_PINMUX_AFIO('A', 0, ANALOG, NORMP)>,
27 pinmux = <GD32_PINMUX_AFIO('A', 3, GPIO_IN, TEST_DEVICE_RMP)>,
31 pinmux = <GD32_PINMUX_AFIO('C', 5, GPIO_IN, NORMP)>;
32 drive-push-pull;
35 pinmux = <GD32_PINMUX_AFIO('A', 6, GPIO_IN, NORMP)>;
36 drive-open-drain;
[all …]
/Zephyr-latest/soc/nuvoton/npcx/common/
Dpinctrl_soc.h4 * SPDX-License-Identifier: Apache-2.0
25 * @brief Suppoerted peripheral device configuration type in NPCX series
67 * @brief NPCX peripheral device configuration structure
69 * Used to indicate the peripheral device's corresponding register/bit for
70 * pin-muxing, pull-up/down and so on.
73 /** Related register group for peripheral device. */
75 /** Related register bit for peripheral device. */
77 /** The polarity for peripheral device functionality. */
79 /** The type of peripheral device configuration. */
86 * @brief NPCX device control structure
[all …]
/Zephyr-latest/samples/drivers/mspi/mspi_flash/boards/
Dapollo3p_evb.overlay4 * SPDX-License-Identifier: Apache-2.0
23 pinctrl-0 = <&mspi1_default>;
24 pinctrl-1 = <&mspi1_sleep>;
25 pinctrl-2 = <&mspi1_psram>;
26 pinctrl-3 = <&mspi1_flash>;
27 pinctrl-names = "default","sleep","psram","flash";
30 ce-gpios = <&gpio64_95 5 GPIO_ACTIVE_LOW>,
33 cmdq-buffer-location = ".mspi_buff";
34 cmdq-buffer-size = <256>;
37 compatible = "ambiq,mspi-device", "mspi-aps6404l";
[all …]
/Zephyr-latest/tests/drivers/mspi/api/boards/
Dapollo3p_evb.overlay3 * SPDX-License-Identifier: Apache-2.0
18 compatible = "ambiq,mspi-controller";
19 pinctrl-0 = <&mspi1_default>;
20 pinctrl-1 = <&mspi1_sleep>;
21 pinctrl-2 = <&mspi1_emul>;
24 ce-gpios = <&gpio32_63 18 GPIO_ACTIVE_LOW>;
28 compatible = "zephyr,mspi-emul-device";
30 mspi-max-frequency = <48000000>;
39 pinmux = <GPIO_P51>,
56 pinmux = <MSPI1_0_P51>,
[all …]
/Zephyr-latest/dts/arm/nuvoton/npcx/npcx7/
Dnpcx7-pinctrl.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 /* Prebuild nodes for peripheral device's characteristics (Optional) */
9 /omit-if-no-ref/ vhif_lpc_sl: devctl-vhif-3p3v-lpc {
10 dev-ctl = <0x0 2 2 0x01>;
13 /omit-if-no-ref/ vhif_espi_shi_sl: devctl-vhif-1p8v-espi-shi {
14 dev-ctl = <0x0 2 2 0x02>;
17 /omit-if-no-ref/ ext_flash_tris_off: devctl-fiu-ext-tris-off {
18 dev-ctl = <0x0 6 1 0x00>;
21 /omit-if-no-ref/ ext_flash_tris_on: devctl-fiu-ext-tris-on {
22 dev-ctl = <0x0 6 1 0x01>;
[all …]
/Zephyr-latest/dts/arm/nuvoton/npcx/npcx9/
Dnpcx9-pinctrl.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 /* Prebuild nodes for peripheral device's characteristics (Optional) */
10 /omit-if-no-ref/ vhif_lpc_sl: devctl-vhif-3p3v-lpc {
11 dev-ctl = <0x0 2 2 0x01>;
14 /omit-if-no-ref/ vhif_espi_shi_sl: devctl-vhif-1p8v-espi-shi {
15 dev-ctl = <0x0 2 2 0x02>;
18 /omit-if-no-ref/ ext_flash_tris_off: devctl-fiu-ext-tris-off {
19 dev-ctl = <0x0 6 1 0x00>;
22 /omit-if-no-ref/ ext_flash_tris_on: devctl-fiu-ext-tris-on {
23 dev-ctl = <0x0 6 1 0x01>;
[all …]

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