1/*
2 * Copyright (c) 2021 Teslabs Engineering S.L.
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6#define GD32_TEST_DEVICE_RMP GD32_REMAP(0, 0, 0x1U, 1)
7
8/ {
9	test_device: test_device {
10		compatible = "vnd,pinctrl-device";
11		pinctrl-0 = <&test_device_default>;
12		pinctrl-names = "default";
13	};
14};
15
16&pinctrl {
17	test_device_default: test_device_default {
18		/* Note: the groups are just meant for testing if properties and
19		   pins are parsed correctly, but do not necessarily represent a
20		   feasible combination */
21		group1 {
22			pinmux = <GD32_PINMUX_AFIO('A', 0, ANALOG, NORMP)>,
23				 <GD32_PINMUX_AFIO('B', 1, ALTERNATE, NORMP)>,
24				 <GD32_PINMUX_AFIO('C', 2, GPIO_IN, NORMP)>;
25		};
26		group2 {
27			pinmux = <GD32_PINMUX_AFIO('A', 3, GPIO_IN, TEST_DEVICE_RMP)>,
28				 <GD32_PINMUX_AFIO('B', 4, ALTERNATE, TEST_DEVICE_RMP)>;
29		};
30		group3 {
31			pinmux = <GD32_PINMUX_AFIO('C', 5, GPIO_IN, NORMP)>;
32			drive-push-pull;
33		};
34		group4 {
35			pinmux = <GD32_PINMUX_AFIO('A', 6, GPIO_IN, NORMP)>;
36			drive-open-drain;
37		};
38		group5 {
39			pinmux = <GD32_PINMUX_AFIO('B', 7, GPIO_IN, NORMP)>;
40			bias-disable;
41		};
42		group6 {
43			pinmux = <GD32_PINMUX_AFIO('C', 8, GPIO_IN, NORMP)>;
44			bias-pull-up;
45		};
46		group7 {
47			pinmux = <GD32_PINMUX_AFIO('A', 9, GPIO_IN, NORMP)>;
48			bias-pull-down;
49		};
50		group8 {
51			pinmux = <GD32_PINMUX_AFIO('B', 10, ALTERNATE, NORMP)>;
52			slew-rate = "max-speed-2mhz";
53		};
54		group9 {
55			pinmux = <GD32_PINMUX_AFIO('C', 11, ALTERNATE, NORMP)>;
56			slew-rate = "max-speed-10mhz";
57		};
58		group10 {
59			pinmux = <GD32_PINMUX_AFIO('A', 12, ALTERNATE, NORMP)>;
60			slew-rate = "max-speed-50mhz";
61		};
62		group11 {
63			pinmux = <GD32_PINMUX_AFIO('B', 13, ALTERNATE, NORMP)>;
64			slew-rate = "max-speed-highest";
65		};
66	};
67};
68