1# Copyright (c) 2022 Nuvoton Technology Corporation.
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5  The Nuvoton pin controller is a singleton node responsible for controlling
6  pin function selection and pin properties. For example, you can use these
7  nodes to select peripheral pin functions.
8
9  Here is a list of supported standard pin properties:
10    - bias-pull-down: Enable pull-down resistor.
11    - bias-pull-up: Enable pull-up resistor.
12    - drive-open-drain: Output driver is open-drain.
13
14  Custom pin properties for npcx series are available also:
15    - pinmux-locked: Lock pinmux configuration for peripheral device
16    - pinmux-gpio: Inverse pinmux back to gpio
17    - psl-in-mode: Select the assertion detection mode of PSL input
18    - psl-in-pol: Select the assertion detection polarity of PSL input
19
20  An example for NPCX7 family, include the chip level pinctrl DTSI file in the
21  board level DTS:
22
23    #include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
24
25  We want to use the I2C0_0 port of the NPCX7M6FB controller and enable the
26  internal 3.3V pull-up if its i2c frequency won't exceed 400kHz.
27
28  To change a pin's pinctrl default properties, add a reference to the
29  pin in the board's DTS file and set the properties as below:
30
31    &i2c0_0_sda_scl_gpb4_b5 {
32      bias-pull-up; /* Enable internal pull-up for i2c0_0 */
33      pinmux-locked; /* Lock pinmuxing */
34    };
35
36    &i2c0_0 {
37      pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>;
38      pinctrl-names = "default";
39    }
40
41compatible: "nuvoton,npcx-pinctrl"
42
43include: base.yaml
44
45child-binding:
46  description: |
47    NPCX pin controller pin configuration nodes
48
49  include:
50    - name: pincfg-node.yaml
51      property-allowlist:
52        - bias-pull-down
53        - bias-pull-up
54        - drive-open-drain
55
56  properties:
57    pinmux:
58      type: phandle
59      description: Configurations of pinmux selection
60    dev-ctl:
61      type: array
62      description: Configurations of device control such as tri-state, io type and so on.
63    periph-pupd:
64      type: array
65      description: |
66        A map to PUPD_ENn register/bit that enable pull-up/down of NPCX peripheral devices.
67        Please don't overwrite this property in the board-level DT driver.
68    psl-offset:
69      type: int
70      description: |
71        Offset to PSL_CTS register that is used for PSL input's status and detection mode.
72        Please don't overwrite this property in the board-level DT driver.
73    psl-polarity:
74      type: phandle
75      description: |
76        A map to DEVALTn that configures detection polarity of PSL input pads.
77        Please don't overwrite this property in the board-level DT driver.
78    pinmux-locked:
79      type: boolean
80      description: Lock pinmux selection
81    pinmux-gpio:
82      type: boolean
83      description: Inverse pinmux selection to GPIO
84    psl-in-mode:
85      type: string
86      description: |
87        The assertion detection mode of PSL input selection
88        - "level": Select the detection mode to level detection
89        - "edge": Select the detection mode to edge detection
90      enum:
91        - "level"
92        - "edge"
93    psl-in-pol:
94      type: string
95      description: |
96        The assertion detection polarity of PSL input selection
97        - "low-falling": Select the detection polarity to low/falling
98        - "high-rising": Select the detection polarity to high/rising
99      enum:
100        - "low-falling"
101        - "high-rising"
102