1/*
2 * Copyright (c) 2024 Ambiq Micro Inc. <www.ambiq.com>
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6/ {
7	aliases {
8		mspi0 = &mspi1;
9	};
10};
11
12&gpio32_63 {
13	status = "okay";
14};
15
16&mspi1 {
17
18	compatible = "ambiq,mspi-controller";
19	pinctrl-0 = <&mspi1_default>;
20	pinctrl-1 = <&mspi1_sleep>;
21	pinctrl-2 = <&mspi1_emul>;
22	status = "okay";
23
24	ce-gpios = <&gpio32_63 18 GPIO_ACTIVE_LOW>;
25
26	mspi_device: mspi_device@0 {
27		status = "okay";
28		compatible = "zephyr,mspi-emul-device";
29		reg = <0x0>;
30		mspi-max-frequency = <48000000>;
31	};
32
33};
34
35&pinctrl {
36
37	mspi1_sleep: mspi1_sleep{
38		group1 {
39			pinmux = <GPIO_P51>,
40				 <GPIO_P52>,
41				 <GPIO_P53>,
42				 <GPIO_P54>,
43				 <GPIO_P55>,
44				 <GPIO_P56>,
45				 <GPIO_P57>,
46				 <GPIO_P58>,
47				 <GPIO_P59>,
48				 <GPIO_P69>,
49				 <GPIO_P50>;
50		};
51	};
52
53	mspi1_emul: mspi1_emul{
54
55		group1 {
56			pinmux = <MSPI1_0_P51>,
57				 <MSPI1_1_P52>,
58				 <MSPI1_2_P53>,
59				 <MSPI1_3_P54>,
60				 <MSPI1_4_P55>,
61				 <MSPI1_5_P56>,
62				 <MSPI1_6_P57>,
63				 <MSPI1_7_P58>;
64			drive-strength = "0.75";
65			ambiq,iom-mspi = <0>;
66			ambiq,iom-num = <1>;
67		};
68
69		group2 {
70			pinmux = <MSPI1_8_P59>;
71			drive-strength = "0.75";
72			ambiq,iom-mspi = <0>;
73			ambiq,iom-num = <2>;
74		};
75
76		group3 {
77			pinmux = <NCE50_P50>;
78			drive-strength = "1.0";
79			ambiq,iom-mspi = <0>;
80			ambiq,iom-num = <1>;
81		};
82
83		group4 {
84			pinmux = <GPIO_P69>;
85		};
86
87	};
88
89};
90