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/Zephyr-latest/dts/bindings/rtc/
Drtc-device.yaml2 # SPDX-License-Identifier: Apache-2.0
6 description: RTC (real-time clock) device common bindings
9 alarms-count:
13 Number of alarms supported by RTC device. The number of
14 alarms defaults to 0, which indicates that the RTC has
15 no alarms.
Dst,stm32-rtc.yaml3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "st,stm32-rtc"
10 - rtc.yaml
11 - rtc-device.yaml
17 calib-out-freq:
22 - 1
23 - 512
25 alarms-count:
27 Number of alarms supported by STM32 RTC device.
28 Most of STM32 MCU series have 2 RTC alarms, A & B.
[all …]
/Zephyr-latest/boards/shields/adafruit_adalogger_featherwing/
Dadafruit_adalogger_featherwing.overlay2 * Copyright (c) 2024 Philip-Dylan Gleonec <philip-dylan@gleonec.bzh>
4 * SPDX-License-Identifier: Apache-2.0
16 cs-gpios = <&feather_header 17 GPIO_ACTIVE_LOW>; /* D10 */
19 compatible = "zephyr,sdhc-spi-slot";
21 spi-max-frequency = <12000000>;
25 compatible = "zephyr,sdmmc-disk";
37 alarms-count = <1>;
38 battery-switch-over = "standard";
/Zephyr-latest/doc/hardware/peripherals/
Drtc.rst3 Real-Time Clock (RTC)
9 .. list-table:: **Glossary**
11 :header-rows: 1
13 * - Word
14 - Definition
15 * - Real-time clock
16 - Low power device tracking time using broken-down time
17 * - Real-time counter
18 - Low power counter which can be used to track time
19 * - RTC
[all …]
/Zephyr-latest/boards/shields/adafruit_data_logger/
Dadafruit_data_logger.overlay2 * Copyright (c) 2019-2023 Henrik Brix Andersen <henrik@brixandersen.dk>
4 * SPDX-License-Identifier: Apache-2.0
13 compatible = "gpio-leds";
36 cs-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>; /* D10 */
39 compatible = "zephyr,sdhc-spi-slot";
41 spi-max-frequency = <24000000>;
45 compatible = "zephyr,sdmmc-disk";
46 disk-name = "SD";
58 alarms-count = <1>;
59 battery-switch-over = "standard";
[all …]
/Zephyr-latest/tests/drivers/build_all/rtc/
Di2c_devices.overlay3 * SPDX-License-Identifier: Apache-2.0
8 #address-cells = <1>;
9 #size-cells = <1>;
13 gpio-controller;
15 #gpio-cells = <0x2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 clock-frequency = <100000>;
31 am1805-gpios = <&test_gpio 0 0>;
38 alarms-count = <1>;
[all …]
/Zephyr-latest/dts/x86/intel/
Datom.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
12 #address-cells = <1>;
13 #size-cells = <0>;
17 d-cache-line-size = <64>;
25 #address-cells = <1>;
26 #interrupt-cells = <3>;
28 interrupt-controller;
34 interrupt-controller;
35 #interrupt-cells = <3>;
[all …]
Dalder_lake.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/pcie/pcie.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "intel,alder-lake", "intel,x86_64";
22 d-cache-line-size = <64>;
28 compatible = "intel,alder-lake";
[all …]
/Zephyr-latest/drivers/counter/
Dcounter_gecko_rtcc.c4 * SPDX-License-Identifier: Apache-2.0
93 struct counter_gecko_data *const dev_data = dev->data; in counter_gecko_set_top_value()
99 const struct counter_gecko_config *const dev_cfg = dev->config; in counter_gecko_set_top_value()
101 if (dev_cfg->prescaler != 1) { in counter_gecko_set_top_value()
103 return -EINVAL; in counter_gecko_set_top_value()
107 /* Counter top value can only be changed when all alarms are disabled */ in counter_gecko_set_top_value()
109 if (dev_data->alarm[i].callback) { in counter_gecko_set_top_value()
110 return -EBUSY; in counter_gecko_set_top_value()
116 dev_data->top_callback = cfg->callback; in counter_gecko_set_top_value()
117 dev_data->top_user_data = cfg->user_data; in counter_gecko_set_top_value()
[all …]
Dcounter_xlnx_axi_timer.c4 * SPDX-License-Identifier: Apache-2.0
39 /* 1st timer used as main timer in auto-reload, count-down. generate mode */
42 /* 2nd timer (if available) used as alarm timer in count-down, generate mode */
61 const struct xlnx_axi_timer_config *config = dev->config; in xlnx_axi_timer_read32()
63 return sys_read32(config->base + offset); in xlnx_axi_timer_read32()
70 const struct xlnx_axi_timer_config *config = dev->config; in xlnx_axi_timer_write32()
72 sys_write32(value, config->base + offset); in xlnx_axi_timer_write32()
77 const struct xlnx_axi_timer_data *data = dev->data; in xlnx_axi_timer_start()
82 if (data->alarm_callback) { in xlnx_axi_timer_start()
94 const struct xlnx_axi_timer_config *config = dev->config; in xlnx_axi_timer_stop()
[all …]
Dcounter_nxp_mrt.c4 * SPDX-License-Identifier: Apache-2.0
11 * initialization, interrupt handling, and any other module-wide tasks. The current implementation
34 (*(struct nxp_mrt_channel_data *const *const)dev->data)
36 /* Device config->data is an array of data pointers ordered by channel number,
37 * dev->data is a pointer to one of these pointers in that array,
38 * so the value of the dev->data - dev->config->data is the channel index
41 (((struct nxp_mrt_channel_data *const *)dev->data) - \
42 ((const struct nxp_mrt_config *)dev->config)->data)
65 const struct nxp_mrt_config *config = dev->config; in nxp_mrt_stop()
66 MRT_Type *base = config->base; in nxp_mrt_stop()
[all …]
Dcounter_sam0_tc32.c4 * SPDX-License-Identifier: Apache-2.0
51 while ((regs->SYNCBUSY.reg & TC_SYNCBUSY_MASK) != 0) { in wait_synchronization()
55 while ((regs->STATUS.reg & TC_STATUS_SYNCBUSY) != 0) { in wait_synchronization()
65 regs->READREQ.reg = TC_READREQ_RREQ | in read_synchronize_count()
69 regs->CTRLBSET.reg = TC_CTRLBSET_CMD_READSYNC; in read_synchronize_count()
78 const struct counter_sam0_tc32_config *const cfg = dev->config; in counter_sam0_tc32_start()
79 TcCount32 *tc = cfg->regs; in counter_sam0_tc32_start()
85 tc->CTRLBSET.reg = TC_CTRLBSET_CMD_RETRIGGER; in counter_sam0_tc32_start()
92 const struct counter_sam0_tc32_config *const cfg = dev->config; in counter_sam0_tc32_stop()
93 TcCount32 *tc = cfg->regs; in counter_sam0_tc32_stop()
[all …]
/Zephyr-latest/tests/cmake/hwm/board_extend/oot_root/boards/native/native_sim_extend/
Dnative_sim_native_one.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
19 zephyr,shell-uart = &uart0;
20 zephyr,uart-mcumgr = &uart0;
23 zephyr,flash-controller = &flashcontroller0;
26 zephyr,code-partition = &slot0_partition;
30 eeprom-0 = &eeprom0;
[all …]
/Zephyr-latest/boards/native/native_sim/
Dnative_sim.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
19 zephyr,shell-uart = &uart0;
20 zephyr,uart-mcumgr = &uart0;
23 zephyr,flash-controller = &flashcontroller0;
26 zephyr,code-partition = &slot0_partition;
27 zephyr,bt-hci = &bt_hci_userchan;
[all …]
/Zephyr-latest/dts/arm/atmel/
Dsam4s.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
21 zephyr,flash-controller = &eefc;
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
Dsam3x.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/i2c/i2c.h>
9 #include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
17 zephyr,flash-controller = &eefc;
21 #address-cells = <1>;
22 #size-cells = <0>;
26 compatible = "arm,cortex-m3";
33 compatible = "atmel,sam-pmc";
36 #clock-cells = <2>;
[all …]
Dsam4e.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/adc/adc.h>
9 #include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
19 zephyr,flash-controller = &eefc;
23 #address-cells = <1>;
24 #size-cells = <0>;
28 compatible = "arm,cortex-m4f";
[all …]
/Zephyr-latest/tests/drivers/counter/counter_basic_api/src/
Dtest_counter.c5 * SPDX-License-Identifier: Apache-2.0
182 if (err == -ENOTSUP) { in counter_tear_down_instance()
188 zassert_true((err == 0) || (err == -ENOTSUP), in counter_tear_down_instance()
189 "%s: Setting top value to default failed", dev->name); in counter_tear_down_instance()
192 zassert_equal(0, err, "%s: Counter failed to stop", dev->name); in counter_tear_down_instance()
206 TC_PRINT("Testing %s\n", devices[i]->name); in test_all_instances()
209 TC_PRINT("Skipped for %s\n", devices[i]->name); in test_all_instances()
224 .ticks = counter_get_top_value(dev) - 1 in set_top_value_capable()
229 if (err == -ENOTSUP) { in set_top_value_capable()
235 if (err == -ENOTSUP) { in set_top_value_capable()
[all …]
/Zephyr-latest/dts/arm/infineon/cat3/xmc/
Dxmc4xxx.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
11 #include <zephyr/dt-bindings/gpio/infineon-xmc4xxx-gpio.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-m4f";
25 compatible = "infineon,xmc4xxx-flash-controller";
27 #address-cells = <1>;
[all …]
/Zephyr-latest/dts/arm/renesas/smartbond/
Dda1469x.dtsi3 * SPDX-License-Identifier: Apache-2.0
6 #include <arm/armv8-m.dtsi>
9 #include <zephyr/dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/adc/smartbond-adc.h>
11 #include <zephyr/dt-bindings/pinctrl/smartbond-pinctrl.h>
12 #include <zephyr/dt-bindings/dma/dma_smartbond.h>
17 zephyr,flash-controller = &flash_controller;
21 compatible = "zephyr,lvgl-pointer-input";
25 #address-cells = <1>;
26 #size-cells = <0>;
[all …]
/Zephyr-latest/dts/arm/ambiq/
Dambiq_apollo3_blue.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
6 #include <zephyr/dt-bindings/adc/adc.h>
7 #include <zephyr/dt-bindings/i2c/i2c.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 uartclk: apb-pclk {
13 compatible = "fixed-clock";
14 clock-frequency = <DT_FREQ_M(24)>;
15 #clock-cells = <0>;
20 #address-cells = <1>;
[all …]
Dambiq_apollo4p.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
6 #include <zephyr/dt-bindings/adc/adc.h>
7 #include <zephyr/dt-bindings/i2c/i2c.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 uartclk: apb-pclk {
13 compatible = "fixed-clock";
14 clock-frequency = <DT_FREQ_M(24)>;
15 #clock-cells = <0>;
20 #address-cells = <1>;
[all …]
Dambiq_apollo3p_blue.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
6 #include <zephyr/dt-bindings/adc/adc.h>
7 #include <zephyr/dt-bindings/i2c/i2c.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
12 uartclk: apb-pclk {
13 compatible = "fixed-clock";
14 clock-frequency = <DT_FREQ_M(24)>;
15 #clock-cells = <0>;
20 #address-cells = <1>;
[all …]
/Zephyr-latest/dts/arm/infineon/cat1b/cyw20829/
Dcyw20829.dtsi5 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "arm,cortex-m33";
19 cpu-power-states = <&idle &suspend_to_ram>;
22 power-states {
24 compatible = "zephyr,power-state";
25 power-state-name = "suspend-to-idle";
26 min-residency-us = <1000000>;
30 compatible = "zephyr,power-state";
[all …]
/Zephyr-latest/dts/arm/st/l0/
Dstm32l0.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv6-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32l0_clock.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
[all …]

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