1/*
2 * Copyright (c) 2023 Cypress Semiconductor Corporation (an Infineon company) or
3 * an affiliate of Cypress Semiconductor Corporation
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8#include <mem.h>
9
10/ {
11	cpus {
12		#address-cells = <1>;
13		#size-cells = <0>;
14
15		cpu@0 {
16			device_type = "cpu";
17			compatible = "arm,cortex-m33";
18			reg = <0>;
19			cpu-power-states = <&idle &suspend_to_ram>;
20		};
21
22		power-states {
23			idle: idle {
24				compatible = "zephyr,power-state";
25				power-state-name = "suspend-to-idle";
26				min-residency-us = <1000000>;
27			};
28
29			suspend_to_ram: suspend_to_ram {
30				compatible = "zephyr,power-state";
31				power-state-name = "suspend-to-ram";
32				min-residency-us = <2000000>;
33			};
34		};
35	};
36
37	sram0: memory@20000000 {
38		compatible = "mmio-sram";
39		reg = <0x20000000 DT_SIZE_K(244)>;
40	};
41
42	sram_bootstrap: memory@2003D000 {
43		compatible = "zephyr,memory-region", "mmio-sram";
44		zephyr,memory-region = "BOOTSTRAP_RAM";
45		reg = <0x2003D000 DT_SIZE_K(12)>;
46	};
47
48	soc {
49		pinctrl: pinctrl@40400000 {
50			compatible = "infineon,cat1-pinctrl";
51			reg = <0x40400000 0x20000>;
52		};
53
54		hsiom: hsiom@40400000 {
55			compatible = "infineon,cat1-hsiom";
56			reg = <0x40400000 0x4000>;
57			interrupts = <7 4>, <6 4>;
58			status = "disabled";
59		};
60
61		gpio_prt0: gpio@40410000 {
62			compatible = "infineon,cat1-gpio";
63			reg = <0x40410000 0x80>;
64			interrupts = <0 4>;
65			gpio-controller;
66			ngpios = <6>;
67			status = "disabled";
68			#gpio-cells = <2>;
69		};
70		gpio_prt1: gpio@40410080 {
71			compatible = "infineon,cat1-gpio";
72			reg = <0x40410080 0x80>;
73			interrupts = <1 4>;
74			gpio-controller;
75			ngpios = <7>;
76			status = "disabled";
77			#gpio-cells = <2>;
78		};
79		gpio_prt2: gpio@40410100 {
80			compatible = "infineon,cat1-gpio";
81			reg = <0x40410100 0x80>;
82			interrupts = <2 4>;
83			gpio-controller;
84			ngpios = <6>;
85			status = "disabled";
86			#gpio-cells = <2>;
87		};
88		gpio_prt3: gpio@40410180 {
89			compatible = "infineon,cat1-gpio";
90			reg = <0x40410180 0x80>;
91			interrupts = <3 4>;
92			gpio-controller;
93			ngpios = <8>;
94			status = "disabled";
95			#gpio-cells = <2>;
96		};
97		gpio_prt4: gpio@40410200 {
98			compatible = "infineon,cat1-gpio";
99			reg = <0x40410200 0x80>;
100			interrupts = <4 4>;
101			gpio-controller;
102			ngpios = <2>;
103			status = "disabled";
104			#gpio-cells = <2>;
105		};
106		gpio_prt5: gpio@40410280 {
107			compatible = "infineon,cat1-gpio";
108			reg = <0x40410280 0x80>;
109			interrupts = <5 4>;
110			gpio-controller;
111			ngpios = <3>;
112			status = "disabled";
113			#gpio-cells = <2>;
114		};
115
116		ipc0: ipc@401d0000 {
117			compatible = "infineon,cat1-ipc";
118			reg = <0x401d0000 0x10000>;
119			status = "disabled";
120			#ipc-config-cells = <3>;
121		};
122
123		scb0: scb@40590000 {
124			compatible = "infineon,cat1-scb";
125			reg = <0x40590000 0xfd0>;
126			interrupts = <8 4>;
127			status = "disabled";
128		};
129		scb1: scb@405a0000 {
130			compatible = "infineon,cat1-scb";
131			reg = <0x405a0000 0xfd0>;
132			interrupts = <17 4>;
133			status = "disabled";
134		};
135		scb2: scb@405b0000 {
136			compatible = "infineon,cat1-scb";
137			reg = <0x405b0000 0xfd0>;
138			interrupts = <18 4>;
139			status = "disabled";
140		};
141
142		watchdog0: watchdog@4020c000 {
143			compatible = "infineon,cat1-watchdog";
144			reg = <0x4020c000 0x10>;
145			interrupts = <15 4>;
146			status = "disabled";
147		};
148
149		mcwdt0: mcwdt@4020d000 {
150			compatible = "infineon,cat1-lp-timer";
151			reg = <0x4020d000 0x40>;
152			interrupts = <9 4>;
153			status = "disabled";
154		};
155
156		rtc0: rtc@40220000 {
157			compatible = "infineon,cat1-rtc";
158			reg = <0x40220000 0x10000>;
159			interrupts = <10 6>;
160			alarms-count = <2>;
161			status = "disabled";
162		};
163
164		counter0_0: counter@404a0000 {
165			compatible = "infineon,cat1-counter";
166			reg = <0x404a0000 0x80>;
167			interrupts = <42 4>;
168			resolution = <32>;
169			status = "disabled";
170		};
171		counter0_1: counter@404a0080 {
172			compatible = "infineon,cat1-counter";
173			reg = <0x404a0080 0x80>;
174			interrupts = <43 4>;
175			resolution = <32>;
176			status = "disabled";
177		};
178		counter1_0: counter@404a8000 {
179			compatible = "infineon,cat1-counter";
180			reg = <0x404a8000 0x80>;
181			interrupts = <44 4>;
182			resolution = <16>;
183			status = "disabled";
184		};
185		counter1_1: counter@404a8080 {
186			compatible = "infineon,cat1-counter";
187			reg = <0x404a8080 0x80>;
188			interrupts = <45 4>;
189			resolution = <16>;
190			status = "disabled";
191		};
192		counter1_2: counter@404a8100 {
193			compatible = "infineon,cat1-counter";
194			reg = <0x404a8100 0x80>;
195			interrupts = <46 4>;
196			resolution = <16>;
197			status = "disabled";
198		};
199		counter1_3: counter@404a8180 {
200			compatible = "infineon,cat1-counter";
201			reg = <0x404a8180 0x80>;
202			interrupts = <47 4>;
203			resolution = <16>;
204			status = "disabled";
205		};
206		counter1_4: counter@404a8200 {
207			compatible = "infineon,cat1-counter";
208			reg = <0x404a8200 0x80>;
209			interrupts = <48 4>;
210			resolution = <16>;
211			status = "disabled";
212		};
213		counter1_5: counter@404a8280 {
214			compatible = "infineon,cat1-counter";
215			reg = <0x404a8280 0x80>;
216			interrupts = <49 4>;
217			resolution = <16>;
218			status = "disabled";
219		};
220		counter1_6: counter@404a8300 {
221			compatible = "infineon,cat1-counter";
222			reg = <0x404a8300 0x80>;
223			interrupts = <50 4>;
224			resolution = <16>;
225			status = "disabled";
226		};
227
228		pwm0_0: pwm@404a0000 {
229			compatible = "infineon,cat1-pwm";
230			reg = <0x404a0000 0x80>;
231			interrupts = <42 4>;
232			resolution = <32>;
233			status = "disabled";
234			#pwm-cells = <3>;
235		};
236		pwm0_1: pwm@404a0080 {
237			compatible = "infineon,cat1-pwm";
238			reg = <0x404a0080 0x80>;
239			interrupts = <43 4>;
240			resolution = <32>;
241			status = "disabled";
242			#pwm-cells = <3>;
243		};
244		pwm1_0: pwm@404a8000 {
245			compatible = "infineon,cat1-pwm";
246			reg = <0x404a8000 0x80>;
247			interrupts = <44 4>;
248			resolution = <16>;
249			status = "disabled";
250			#pwm-cells = <3>;
251		};
252		pwm1_1: pwm@404a8080 {
253			compatible = "infineon,cat1-pwm";
254			reg = <0x404a8080 0x80>;
255			interrupts = <45 4>;
256			resolution = <16>;
257			status = "disabled";
258			#pwm-cells = <3>;
259		};
260		pwm1_2: pwm@404a8100 {
261			compatible = "infineon,cat1-pwm";
262			reg = <0x404a8100 0x80>;
263			interrupts = <46 4>;
264			resolution = <16>;
265			status = "disabled";
266			#pwm-cells = <3>;
267		};
268		pwm1_3: pwm@404a8180 {
269			compatible = "infineon,cat1-pwm";
270			reg = <0x404a8180 0x80>;
271			interrupts = <47 4>;
272			resolution = <16>;
273			status = "disabled";
274			#pwm-cells = <3>;
275		};
276		pwm1_4: pwm@404a8200 {
277			compatible = "infineon,cat1-pwm";
278			reg = <0x404a8200 0x80>;
279			interrupts = <48 4>;
280			resolution = <16>;
281			status = "disabled";
282			#pwm-cells = <3>;
283		};
284		pwm1_5: pwm@404a8280 {
285			compatible = "infineon,cat1-pwm";
286			reg = <0x404a8280 0x80>;
287			interrupts = <49 4>;
288			resolution = <16>;
289			status = "disabled";
290			#pwm-cells = <3>;
291		};
292		pwm1_6: pwm@404a8300 {
293			compatible = "infineon,cat1-pwm";
294			reg = <0x404a8300 0x80>;
295			interrupts = <50 4>;
296			resolution = <16>;
297			status = "disabled";
298			#pwm-cells = <3>;
299		};
300
301		dma0: dw@40180000 {
302			#dma-cells = <1>;
303			compatible = "infineon,cat1-dma";
304			reg = <0x40180000 0x10000>;
305			dma-channels = <16>;
306			interrupts = <19 4>, /* CH0 */
307					     <20 4>, /* CH1 */
308					     <21 4>, /* CH2 */
309					     <22 4>, /* CH3 */
310					     <23 4>, /* CH4 */
311					     <24 4>, /* CH5 */
312					     <25 4>, /* CH6 */
313					     <26 4>, /* CH7 */
314					     <27 4>, /* CH8 */
315					     <28 4>, /* CH9 */
316					     <29 4>, /* CH10 */
317					     <30 4>, /* CH11 */
318					     <31 4>, /* CH12 */
319					     <32 4>, /* CH13 */
320					     <33 4>, /* CH14 */
321					     <34 4>; /* CH15 */
322			status = "disabled";
323		};
324		bluetooth: btss@42000000 {
325			compatible = "infineon,cyw208xx-hci";
326			reg = <0x42000000 0x6186A0>;
327			interrupts = <16 4>;
328			status = "disabled";
329		};
330
331	};
332};
333