1/*
2 * Copyright (c) 2017 Justin Watson
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv7-m.dtsi>
8#include <zephyr/dt-bindings/i2c/i2c.h>
9#include <zephyr/dt-bindings/clock/atmel_sam_pmc.h>
10
11/ {
12	aliases {
13		watchdog0 = &wdt;
14	};
15
16	chosen {
17		zephyr,flash-controller = &eefc;
18	};
19
20	cpus {
21		#address-cells = <1>;
22		#size-cells = <0>;
23
24		cpu0: cpu@0 {
25			device_type = "cpu";
26			compatible = "arm,cortex-m3";
27			reg = <0>;
28		};
29	};
30
31	soc {
32		pmc: pmc@400e0600 {
33			compatible = "atmel,sam-pmc";
34			reg = <0x400e0600 0x200>;
35			interrupts = <5 0>;
36			#clock-cells = <2>;
37			status = "okay";
38		};
39
40		supc: supc@400e1a10 {
41			compatible = "atmel,sam-supc";
42			reg = <0x400e1a10 0x20>;
43			#wakeup-source-id-cells = <1>;
44			status = "okay";
45		};
46
47		sram0: memory@20070000 {
48			compatible = "mmio-sram";
49			reg = <0x20070000 0x18000>;
50		};
51
52		/* Only used for HWINFO device ID */
53		eefc: flash-controller@400e0a00 {
54			compatible = "atmel,sam-flash-controller";
55			reg = <0x400e0a00 0x200>;
56			interrupts = <6 0>;
57			clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
58
59			#address-cells = <1>;
60			#size-cells = <1>;
61
62			flash0: flash@80000 {
63				compatible = "soc-nv-flash";
64				reg = <0x00080000 0x80000>;
65
66				write-block-size = <16>;
67				erase-block-size = <512>;
68			};
69
70			/*
71			 * SAM3X doesn't support erase pages command and must
72			 * be keeped disabled.
73			 */
74			status = "disabled";
75		};
76
77		wdt: watchdog@400e1a50 {
78			compatible = "atmel,sam-watchdog";
79			reg = <0x400e1a50 0xc>;
80			interrupts = <4 0>;
81			clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
82			status = "disabled";
83		};
84
85		twi0: i2c@4008c000 {
86			compatible = "atmel,sam-i2c-twi";
87			clock-frequency = <I2C_BITRATE_STANDARD>;
88			reg = <0x4008c000 0x128>;
89			interrupts = <22 0>;
90			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
91			status = "disabled";
92			#address-cells = <1>;
93			#size-cells = <0>;
94		};
95
96		twi1: i2c@40090000 {
97			compatible = "atmel,sam-i2c-twi";
98			clock-frequency = <I2C_BITRATE_STANDARD>;
99			reg = <0x40090000 0x128>;
100			interrupts = <23 0>;
101			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
102			status = "disabled";
103			#address-cells = <1>;
104			#size-cells = <0>;
105		};
106
107		uart: uart@400e0800 {
108			compatible = "atmel,sam-uart";
109			reg = <0x400e0800 0x124>;
110			interrupts = <8 1>;
111			clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
112			status = "disabled";
113		};
114
115		usart0: usart@40098000 {
116			compatible = "atmel,sam-usart";
117			reg = <0x40098000 0x130>;
118			interrupts = <17 0>;
119			clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
120			status = "disabled";
121		};
122
123		usart1: usart@4009c000 {
124			compatible = "atmel,sam-usart";
125			reg = <0x4009c000 0x130>;
126			interrupts = <18 0>;
127			clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
128			status = "disabled";
129		};
130
131		usart2: usart@400a0000 {
132			compatible = "atmel,sam-usart";
133			reg = <0x400a0000 0x130>;
134			interrupts = <19 0>;
135			clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
136			status = "disabled";
137		};
138
139		usart3: usart@400a4000 {
140			compatible = "atmel,sam-usart";
141			reg = <0x400a4000 0x130>;
142			interrupts = <20 0>;
143			clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
144			status = "disabled";
145		};
146
147		pinctrl: pinctrl@400e0e00 {
148			compatible = "atmel,sam-pinctrl";
149			#address-cells = <1>;
150			#size-cells = <1>;
151			ranges = <0x400e0e00 0x400e0e00 0xc00>;
152
153			pioa: pio@400e0e00 {
154				compatible = "atmel,sam-gpio";
155				reg = <0x400e0e00 0x190>;
156				interrupts = <11 1>;
157				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
158				gpio-controller;
159				#gpio-cells = <2>;
160				#atmel,pin-cells = <2>;
161			};
162
163			piob: pio@400e1000 {
164				compatible = "atmel,sam-gpio";
165				reg = <0x400e1000 0x190>;
166				interrupts = <12 1>;
167				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
168				gpio-controller;
169				#gpio-cells = <2>;
170				#atmel,pin-cells = <2>;
171			};
172
173			pioc: pio@400e1200 {
174				compatible = "atmel,sam-gpio";
175				reg = <0x400e1200 0x190>;
176				interrupts = <13 1>;
177				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
178				gpio-controller;
179				#gpio-cells = <2>;
180				#atmel,pin-cells = <2>;
181			};
182
183			piod: pio@400e1400 {
184				compatible = "atmel,sam-gpio";
185				reg = <0x400e1400 0x190>;
186				interrupts = <14 1>;
187				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
188				gpio-controller;
189				#gpio-cells = <2>;
190				#atmel,pin-cells = <2>;
191			};
192
193			pioe: pio@400e1600 {
194				compatible = "atmel,sam-gpio";
195				reg = <0x400e1600 0x190>;
196				interrupts = <15 1>;
197				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
198				gpio-controller;
199				#gpio-cells = <2>;
200				#atmel,pin-cells = <2>;
201			};
202		};
203
204		tc0: tc@40080000 {
205			compatible = "atmel,sam-tc";
206			reg = <0x40080000 0x100>;
207			interrupts = <27 0
208				      28 0
209				      29 0>;
210			clocks = <&pmc PMC_TYPE_PERIPHERAL 27>,
211				 <&pmc PMC_TYPE_PERIPHERAL 28>,
212				 <&pmc PMC_TYPE_PERIPHERAL 29>;
213			status = "disabled";
214		};
215
216		tc1: tc@40084000 {
217			compatible = "atmel,sam-tc";
218			reg = <0x40084000 0x100>;
219			interrupts = <30 0
220				      31 0
221				      32 0>;
222			clocks = <&pmc PMC_TYPE_PERIPHERAL 30>,
223				 <&pmc PMC_TYPE_PERIPHERAL 31>,
224				 <&pmc PMC_TYPE_PERIPHERAL 32>;
225			status = "disabled";
226		};
227
228		tc2: tc@40088000 {
229			compatible = "atmel,sam-tc";
230			reg = <0x40088000 0x100>;
231			interrupts = <33 0
232				      34 0
233				      35 0>;
234			clocks = <&pmc PMC_TYPE_PERIPHERAL 33>,
235				 <&pmc PMC_TYPE_PERIPHERAL 34>,
236				 <&pmc PMC_TYPE_PERIPHERAL 35>;
237			status = "disabled";
238		};
239
240		pwm0: pwm@40094000 {
241			compatible = "atmel,sam-pwm";
242			reg = <0x40094000 0x4000>;
243			interrupts = <36 1>;
244			clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
245			prescaler = <10>;
246			divider = <1>;
247			#pwm-cells = <3>;
248			status = "disabled";
249		};
250
251		rstc: rstc@400e1a00 {
252			compatible = "atmel,sam-rstc";
253			reg = <0x400e1a00 0x10>;
254			clocks = <&pmc PMC_TYPE_PERIPHERAL 1>;
255			user-nrst;
256		};
257
258		rtc: rtc@400e1a60 {
259			compatible = "atmel,sam-rtc";
260			reg = <0x400e1a60 0x100>;
261			interrupts = <2 0>;
262			clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
263			alarms-count = <1>;
264			status = "disabled";
265		};
266	};
267};
268
269&nvic {
270	arm,num-irq-priority-bits = <4>;
271};
272