Searched +full:ahb3 +full:- +full:prescaler (Results 1 – 21 of 21) sorted by relevance
/Zephyr-latest/dts/bindings/clock/ |
D | st,stm32wl-rcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 For more description confere st,stm32-rcc.yaml 8 compatible: "st,stm32wl-rcc" 11 - name: st,stm32wb-rcc.yaml 12 property-blocklist: 13 - ahb4-prescaler 14 - cpu2-prescaler 17 cpu2-prescaler: 20 - 1 21 - 2 [all …]
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D | st,stm32wb-rcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 For more description confere st,stm32-rcc.yaml 8 compatible: "st,stm32wb-rcc" 11 - name: st,stm32-rcc.yaml 12 property-blocklist: 13 - ahb-prescaler 16 cpu1-prescaler: 20 - 1 21 - 2 22 - 3 [all …]
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/ |
D | wl_i2c1_sysclk_lptim1_lsi.overlay | 4 * SPDX-License-Identifier: Apache-2.0 13 /delete-property/ hse-bypass; 14 /delete-property/ clock-frequency; 15 /delete-property/ hse-tcxo; 16 /delete-property/ hse-div2; 21 /delete-property/ hsi-div; 26 /delete-property/ msi-range; 30 /delete-property/ div-m; 31 /delete-property/ mul-n; 32 /delete-property/ div-p; [all …]
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D | wl_i2c1_hsi_lptim1_lse_adc1_pllp.overlay | 4 * SPDX-License-Identifier: Apache-2.0 13 /delete-property/ hse-bypass; 14 /delete-property/ clock-frequency; 15 /delete-property/ hse-tcxo; 16 /delete-property/ hse-div2; 21 /delete-property/ hsi-div; 26 /delete-property/ msi-range; 30 /delete-property/ div-m; 31 /delete-property/ mul-n; 32 /delete-property/ div-p; [all …]
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/Zephyr-latest/boards/seeed/lora_e5_mini/ |
D | lora_e5_mini.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 8 #include <seeed_studio/lora-e5.dtsi> 9 #include <zephyr/dt-bindings/input/input-event-codes.h> 12 model = "Seeed Studio LoRa-E5 mini"; 13 compatible = "seeed,lora-e5-mini"; 17 zephyr,shell-uart = &usart1; 20 zephyr,code-partition = &slot0_partition; 24 compatible = "gpio-leds"; 32 compatible = "gpio-keys"; [all …]
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/Zephyr-latest/boards/olimex/lora_stm32wl_devkit/ |
D | olimex_lora_stm32wl_devkit.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 8 #include <olimex/bb-stm32wl.dtsi> 9 #include <zephyr/dt-bindings/input/input-event-codes.h> 13 compatible = "olimex,lora-stm32wl-devkit"; 17 zephyr,shell-uart = &usart1; 20 zephyr,code-partition = &slot0_partition; 24 compatible = "gpio-leds"; 32 compatible = "gpio-keys"; 59 div-m = <1>; [all …]
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/Zephyr-latest/boards/st/nucleo_wl55jc/ |
D | nucleo_wl55jc.dts | 2 * Copyright (c) 2020-2024 STMicroelectronics 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 9 #include <st/wl/stm32wl55jcix-pinctrl.dtsi> 12 #include <zephyr/dt-bindings/input/input-event-codes.h> 15 model = "STMicroelectronics STM32WL55JC-NUCLEO board"; 16 compatible = "st,stm32wl55-nucleo"; 20 zephyr,shell-uart = &lpuart1; 23 zephyr,code-partition = &slot0_partition; 27 compatible = "gpio-leds"; [all …]
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/Zephyr-latest/boards/seeed/lora_e5_dev_board/ |
D | lora_e5_dev_board.dts | 4 * SPDX-License-Identifier: Apache-2.0 7 /dts-v1/; 8 #include <seeed_studio/lora-e5.dtsi> 9 #include <zephyr/dt-bindings/input/input-event-codes.h> 12 model = "Seeed Studio LoRa-E5 Dev Board"; 13 compatible = "seeed,lora-e5-dev-board"; 17 zephyr,shell-uart = &usart1; 20 zephyr,code-partition = &slot0_partition; 24 compatible = "gpio-leds"; 33 compatible = "gpio-keys"; [all …]
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/Zephyr-latest/dts/arm/st/h7/ |
D | stm32h723.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 10 #include <zephyr/dt-bindings/display/panel.h> 11 #include <zephyr/dt-bindings/flash_controller/ospi.h> 15 compatible = "st,stm32h723", "st,stm32h7", "simple-bus"; 17 flash-controller@52002000 { 19 compatible = "st,stm32-nv-flash", "soc-nv-flash"; 20 write-block-size = <32>; 21 erase-block-size = <DT_SIZE_K(128)>; 23 max-erase-time = <4000>; 28 compatible = "st,stm32-uart"; [all …]
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D | stm32h7.dtsi | 7 * SPDX-License-Identifier: Apache-2.0 10 #include <arm/armv7-m.dtsi> 11 #include <zephyr/dt-bindings/clock/stm32h7_clock.h> 12 #include <zephyr/dt-bindings/gpio/gpio.h> 13 #include <zephyr/dt-bindings/i2c/i2c.h> 14 #include <zephyr/dt-bindings/pwm/pwm.h> 15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 16 #include <zephyr/dt-bindings/dma/stm32_dma.h> 17 #include <zephyr/dt-bindings/adc/stm32h7_adc.h> 18 #include <zephyr/dt-bindings/reset/stm32h7_reset.h> [all …]
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/Zephyr-latest/dts/arm/st/wb/ |
D | stm32wb.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 9 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/clock/stm32wb_clock.h> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/i2c/i2c.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/adc/adc.h> 15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 16 #include <zephyr/dt-bindings/dma/stm32_dma.h> 17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> [all …]
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/Zephyr-latest/dts/arm/st/l4/ |
D | stm32l4p5.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 9 #include <zephyr/dt-bindings/flash_controller/ospi.h> 11 /delete-node/ &quadspi; 26 clk_hsi48: clk-hsi48 { 27 #clock-cells = <0>; 28 compatible = "fixed-clock"; 29 clock-frequency = <DT_FREQ_M(48)>; 35 compatible = "st,stm32l4p5", "st,stm32l4", "simple-bus"; 38 flash-controller@40022000 { 40 erase-block-size = <4096>; [all …]
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D | stm32l4.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 10 #include <arm/armv7-m.dtsi> 11 #include <zephyr/dt-bindings/clock/stm32l4_clock.h> 12 #include <zephyr/dt-bindings/i2c/i2c.h> 13 #include <zephyr/dt-bindings/gpio/gpio.h> 14 #include <zephyr/dt-bindings/pwm/pwm.h> 15 #include <zephyr/dt-bindings/adc/adc.h> 16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 17 #include <zephyr/dt-bindings/dma/stm32_dma.h> 18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> [all …]
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/Zephyr-latest/dts/arm/st/f4/ |
D | stm32f412.dtsi | 2 * Copyright (c) 2017 Florian Vaussard, HEIG-VD 4 * SPDX-License-Identifier: Apache-2.0 9 /delete-node/ &dac1; 10 /delete-node/ &rng; 15 #clock-cells = <0>; 16 compatible = "st,stm32f411-plli2s-clock"; 21 #clock-cells = <0>; 22 compatible = "st,stm32-clock-mux"; 29 compatible = "st,stm32f412", "st,stm32f4", "simple-bus"; 31 pinctrl: pin-controller@40020000 { [all …]
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/Zephyr-latest/dts/arm/st/wl/ |
D | stm32wl.dtsi | 2 * Copyright (c) 2020-2024 STMicroelectronics 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 8 #include <zephyr/dt-bindings/clock/stm32wl_clock.h> 9 #include <zephyr/dt-bindings/gpio/gpio.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 11 #include <zephyr/dt-bindings/lora/sx126x.h> 12 #include <zephyr/dt-bindings/pwm/pwm.h> 13 #include <zephyr/dt-bindings/adc/adc.h> 14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> [all …]
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/Zephyr-latest/dts/arm/st/f7/ |
D | stm32f7.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 9 #include <arm/armv7-m.dtsi> 10 #include <zephyr/dt-bindings/clock/stm32f7_clock.h> 11 #include <zephyr/dt-bindings/i2c/i2c.h> 12 #include <zephyr/dt-bindings/gpio/gpio.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 15 #include <zephyr/dt-bindings/dma/stm32_dma.h> 16 #include <zephyr/dt-bindings/adc/stm32f4_adc.h> 17 #include <zephyr/dt-bindings/reset/stm32f2_4_7_reset.h> [all …]
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/Zephyr-latest/dts/arm/st/h7rs/ |
D | stm32h7rs.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv7-m.dtsi> 8 #include <zephyr/dt-bindings/clock/stm32h7rs_clock.h> 9 #include <zephyr/dt-bindings/gpio/gpio.h> 10 #include <zephyr/dt-bindings/i2c/i2c.h> 11 #include <zephyr/dt-bindings/pwm/pwm.h> 12 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 13 #include <zephyr/dt-bindings/reset/stm32h7rs_reset.h> 14 #include <zephyr/dt-bindings/adc/stm32h7_adc.h> 15 #include <zephyr/dt-bindings/adc/adc.h> [all …]
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/Zephyr-latest/drivers/clock_control/ |
D | clock_stm32_ll_common.c | 2 * Copyright (c) 2017-2022 Linaro Limited. 5 * SPDX-License-Identifier: Apache-2.0 22 /* Macros to fill up prescaler values */ 76 #define RCC_PLLP_ENABLE() SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN) 81 #define RCC_PLLQ_ENABLE() SET_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) 100 static uint32_t get_bus_clock(uint32_t clock, uint32_t prescaler) in get_bus_clock() argument 102 return clock / prescaler; in get_bus_clock() 136 r = -ENOTSUP; in enabled_clock() 150 r = -ENOTSUP; in enabled_clock() 157 r = -ENOTSUP; in enabled_clock() [all …]
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/Zephyr-latest/dts/arm/st/l5/ |
D | stm32l5.dtsi | 6 * SPDX-License-Identifier: Apache-2.0 10 #include <arm/armv8-m.dtsi> 11 #include <zephyr/dt-bindings/clock/stm32l4_clock.h> 12 #include <zephyr/dt-bindings/gpio/gpio.h> 13 #include <zephyr/dt-bindings/i2c/i2c.h> 14 #include <zephyr/dt-bindings/pwm/pwm.h> 15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 16 #include <zephyr/dt-bindings/dma/stm32_dma.h> 17 #include <zephyr/dt-bindings/adc/stm32l4_adc.h> 18 #include <zephyr/dt-bindings/reset/stm32g4_l4_5_reset.h> [all …]
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/Zephyr-latest/dts/arm/st/mp1/ |
D | stm32mp157.dtsi | 5 * SPDX-License-Identifier: Apache-2.0 10 #include <arm/armv7-m.dtsi> 11 #include <zephyr/dt-bindings/gpio/gpio.h> 12 #include <zephyr/dt-bindings/clock/stm32_common_clocks.h> 13 #include <zephyr/dt-bindings/clock/stm32_clock.h> 14 #include <zephyr/dt-bindings/i2c/i2c.h> 15 #include <zephyr/dt-bindings/pwm/pwm.h> 16 #include <zephyr/dt-bindings/pwm/stm32_pwm.h> 17 #include <zephyr/dt-bindings/dma/stm32_dma.h> 18 #include <zephyr/dt-bindings/reset/stm32mp1_reset.h> [all …]
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/Zephyr-latest/dts/arm/st/u5/ |
D | stm32u5.dtsi | 7 * SPDX-License-Identifier: Apache-2.0 11 #include <arm/armv8-m.dtsi> 12 #include <zephyr/dt-bindings/adc/adc.h> 13 #include <zephyr/dt-bindings/pwm/pwm.h> 14 #include <zephyr/dt-bindings/clock/stm32u5_clock.h> 15 #include <zephyr/dt-bindings/gpio/gpio.h> 16 #include <zephyr/dt-bindings/i2c/i2c.h> 17 #include <zephyr/dt-bindings/flash_controller/ospi.h> 18 #include <zephyr/dt-bindings/reset/stm32u5_reset.h> 19 #include <zephyr/dt-bindings/dma/stm32_dma.h> [all …]
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