| /Linux-v5.10/Documentation/devicetree/bindings/phy/ |
| D | ti,phy-j721e-wiz.yaml | 47 assigned-clocks:
51 assigned-clock-parents:
55 assigned-clock-rates:
90 assigned-clocks:
93 assigned-clock-parents:
99 - assigned-clocks
100 - assigned-clock-parents
136 assigned-clocks:
139 assigned-clock-parents:
145 - assigned-clocks
[all …]
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| D | phy-rockchip-typec.txt | 11 - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or
13 - assigned-clock-rates : the phy core clk frequency, shall be: 50000000
46 assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
47 assigned-clock-rates = <50000000>;
70 assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;
71 assigned-clock-rates = <50000000>;
|
| /Linux-v5.10/Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra210-ahub.yaml | 42 assigned-clocks:
45 assigned-clock-parents:
48 assigned-clock-rates:
64 - assigned-clocks
65 - assigned-clock-parents
82 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
83 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
119 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
120 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
121 assigned-clock-rates = <1536000>;
[all …]
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| D | brcm,cygnus-audio.txt | 13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
|
| D | nvidia,tegra186-dspk.yaml | 40 assigned-clocks:
43 assigned-clock-parents:
46 assigned-clock-rates:
63 - assigned-clocks
64 - assigned-clock-parents
78 assigned-clocks = <&bpmp TEGRA186_CLK_DSPK1>;
79 assigned-clock-parents = <&bpmp TEGRA186_CLK_PLL_A_OUT0>;
80 assigned-clock-rates = <12288000>;
|
| D | nvidia,tegra210-dmic.yaml | 41 assigned-clocks:
44 assigned-clock-parents:
47 assigned-clock-rates:
64 - assigned-clocks
65 - assigned-clock-parents
78 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
79 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
80 assigned-clock-rates = <3072000>;
|
| D | nvidia,tegra210-i2s.yaml | 56 assigned-clocks:
60 assigned-clock-parents:
64 assigned-clock-rates:
82 - assigned-clocks
83 - assigned-clock-parents
96 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
97 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
98 assigned-clock-rates = <1536000>;
|
| D | mt2701-afe-pcm.txt | 47 - assigned-clocks: list of input clocks and dividers for the audio system.
49 - assigned-clocks-parents: parent of input clocks of assigned clocks.
50 - assigned-clock-rates: list of clock frequencies of assigned clocks.
138 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
142 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
144 assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
|
| /Linux-v5.10/include/media/ |
| D | v4l2-mem2mem.h | 147 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
157 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
181 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
200 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
230 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
243 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
260 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
272 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
288 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
301 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
[all …]
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | imx7ulp.dtsi | 154 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>;
155 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
156 assigned-clock-rates = <24000000>;
166 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>;
167 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
168 assigned-clock-rates = <48000000>;
175 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
176 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
261 assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
262 assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
[all …]
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| D | exynos4412-odroid-common.dtsi | 125 assigned-clocks = <&clock CLK_FOUT_EPLL>;
126 assigned-clock-rates = <45158401>;
130 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
136 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
139 assigned-clock-rates = <0>, <0>,
207 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
209 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
210 assigned-clock-rates = <0>, <176000000>;
215 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
217 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
[all …]
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| D | imx7d-zii-rpu2.dts | 189 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
190 assigned-clock-rates = <884736000>;
211 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
213 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
214 assigned-clock-rates = <0>, <100000000>;
294 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
296 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
297 assigned-clock-rates = <0>, <100000000>;
457 assigned-clocks = <&cs2000>;
458 assigned-clock-rates = <24000000>;
[all …]
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| D | imx7d-pico.dtsi | 105 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
107 assigned-clock-parents = <&clks IMX7D_CKIL>;
108 assigned-clock-rates = <0>, <32768>;
121 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
123 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
124 assigned-clock-rates = <0>, <100000000>;
278 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
280 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
281 assigned-clock-rates = <0>, <24576000>;
313 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
[all …]
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| D | imx7d-sdb.dts | 215 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
217 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
218 assigned-clock-rates = <0>, <100000000>;
242 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
244 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
245 assigned-clock-rates = <0>, <100000000>;
386 assigned-clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_SRC>,
389 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
390 assigned-clock-rates = <0>, <884736000>, <12288000>;
422 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
[all …]
|
| D | imx7s-warp.dts | 84 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
85 assigned-clock-rates = <884736000>;
268 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
270 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
271 assigned-clock-rates = <0>, <36864000>;
278 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
279 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
286 assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
287 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
295 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
[all …]
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| D | imx7d-cl-som-imx7.dts | 47 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
49 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
50 assigned-clock-rates = <0>, <100000000>;
75 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
77 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
78 assigned-clock-rates = <0>, <100000000>;
197 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
198 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
212 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
213 assigned-clock-rates = <400000000>;
|
| D | imx7d-nitrogen7.dts | 114 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
116 assigned-clock-parents = <&clks IMX7D_CKIL>;
117 assigned-clock-rates = <0>, <32768>;
131 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
133 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
134 assigned-clock-rates = <0>, <100000000>;
322 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
323 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
330 assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
331 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/display/msm/ |
| D | dpu.txt | 38 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
39 - assigned-clock-rates: list of clock frequencies sorted in the same order as
40 the assigned-clocks property.
70 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
71 - assigned-clock-rates: list of clock frequencies sorted in the same order as
72 the assigned-clocks property.
87 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>;
88 assigned-clock-rates = <300000000>;
116 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>,
118 assigned-clock-rates = <0 0 300000000 19200000>;
|
| /Linux-v5.10/drivers/clk/ |
| D | clk-conf.c | 20 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
27 rc = of_parse_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
46 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_parents()
57 pr_warn("clk: couldn't get assigned clock %d for %pOF\n", in __set_clk_parents()
85 of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) { in __set_clk_rates()
87 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_rates()
120 * of_clk_set_defaults() - parse and set assigned clocks configuration
124 * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
127 * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
|
| /Linux-v5.10/Documentation/devicetree/bindings/clock/ |
| D | clock-bindings.txt | 135 ==Assigned clock parents and rates==
139 node through assigned-clocks, assigned-clock-parents and assigned-clock-rates
140 properties. The assigned-clock-parents property should contain a list of parent
142 assigned-clock-rates property should contain a list of frequencies in Hz. Both
143 these properties should correspond to the clocks listed in the assigned-clocks
156 assigned-clocks = <&clkcon 0>, <&pll 2>;
157 assigned-clock-parents = <&pll 2>;
158 assigned-clock-rates = <0>, <460800>;
162 the <&pll 2> clock is assigned a frequency value of 460800 Hz.
|
| /Linux-v5.10/arch/mips/boot/dts/img/ |
| D | pistachio.dtsi | 51 assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
53 assigned-clock-rates = <100000000>, <33333334>;
69 assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
71 assigned-clock-rates = <100000000>, <33333334>;
87 assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>,
89 assigned-clock-rates = <100000000>, <33333334>;
105 assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>,
107 assigned-clock-rates = <100000000>, <33333334>;
141 assigned-clocks = <&clk_core CLK_I2S_DIV>;
142 assigned-clock-rates = <12288000>;
[all …]
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| /Linux-v5.10/tools/perf/pmu-events/arch/x86/amdzen1/ |
| D | floating-point.json | 5 "BriefDescription": "Total number multi-pipe uOps assigned to all pipes.",
6 …ions it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to all pipes.",
12 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 3.",
13 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 3.",
19 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 2.",
20 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 2.",
26 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 1.",
27 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 1.",
33 "BriefDescription": "Total number multi-pipe uOps assigned to pipe 0.",
34 …rations it is not suitable for measuring MFLOPS. Total number multi-pipe uOps assigned to pipe 0.",
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/ufs/ |
| D | ti,j721e-ufs.yaml | 28 assigned-clocks:
31 assigned-clock-parents:
72 assigned-clocks = <&k3_clks 277 1>;
73 assigned-clock-parents = <&k3_clks 277 4>;
86 assigned-clocks = <&k3_clks 277 1>;
87 assigned-clock-parents = <&k3_clks 277 4>;
|
| /Linux-v5.10/Documentation/s390/ |
| D | vfio-ap.rst | 10 The AP devices provide cryptographic functions to all CPUs assigned to a
27 functions. There can be from 0 to 256 adapters assigned to an LPAR. Adapters
28 assigned to the LPAR in which a linux host is running will be available to
34 The AP adapter cards are assigned to a given LPAR via the system's Activation
36 in the LPAR, the AP bus detects the AP adapter cards assigned to the LPAR and
37 creates a sysfs device for each assigned adapter. For example, if AP adapters
38 4 and 10 (0x0a) are assigned to the LPAR, the AP bus will create the following
68 The AP usage and control domains are assigned to a given LPAR via the system's
71 domains assigned to the LPAR. The domain number of each usage domain and
91 domains 6 and 71 (0x47) are assigned to the LPAR, the AP bus will create the
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/watchdog/ |
| D | ti,rti-wdt.yaml | 37 assigned-clocks:
40 assigned-clocks-parents:
54 * RTI WDT in main domain on J721e SoC. Assigned clocks are used to
65 assigned-clocks = <&k3_clks 252 1>;
66 assigned-clock-parents = <&k3_clks 252 5>;
|
