Lines Matching full:assigned

84 	assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
85 	assigned-clock-rates = <884736000>;
268 	assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
270 	assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
271 	assigned-clock-rates = <0>, <36864000>;
278 	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
279 	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
286 	assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
287 	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
295 	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
296 	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
322 	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
323 	assigned-clock-rates = <400000000>;