Lines Matching full:assigned
105 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
107 assigned-clock-parents = <&clks IMX7D_CKIL>;
108 assigned-clock-rates = <0>, <32768>;
121 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
123 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
124 assigned-clock-rates = <0>, <100000000>;
278 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
280 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
281 assigned-clock-rates = <0>, <24576000>;
313 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
314 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
321 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
322 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
330 assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
331 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
379 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
380 assigned-clock-rates = <400000000>;