Lines Matching full:assigned
114 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
116 assigned-clock-parents = <&clks IMX7D_CKIL>;
117 assigned-clock-rates = <0>, <32768>;
131 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
133 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
134 assigned-clock-rates = <0>, <100000000>;
322 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
323 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
330 assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
331 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
338 assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
339 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
346 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
347 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
404 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
405 assigned-clock-rates = <400000000>;