Lines Matching full:assigned

42   assigned-clocks:
45   assigned-clock-parents:
48   assigned-clock-rates:
64   - assigned-clocks
65   - assigned-clock-parents
82         assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
83         assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
119             assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
120             assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
121             assigned-clock-rates = <1536000>;
130             assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
131             assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
132             assigned-clock-rates = <3072000>;