| /Linux-v5.10/drivers/ptp/ |
| D | ptp_clockmatrix.c | 1 // SPDX-License-Identifier: GPL-2.0+
23 MODULE_AUTHOR("IDT support-1588 <IDT-support-1588@lm.renesas.com>");
29 * over-rides any automatic selection
38 struct idtcm_channel *channel = in set_write_phase_ready() local
41 channel->write_phase_ready = 1; in set_write_phase_ready()
57 /* Sub-nanoseconds are in buf[0]. */ in char_array_to_timespec()
60 nsec <<= 8; in char_array_to_timespec()
61 nsec |= buf[3 - i]; in char_array_to_timespec()
66 sec <<= 8; in char_array_to_timespec()
67 sec |= buf[9 - i]; in char_array_to_timespec()
[all …]
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| /Linux-v5.10/sound/core/oss/ |
| D | linear.c | 2 * Linear conversion Plug-In
4 * Abramo Bagnara <abramo@alsa-project.org>
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
48 memcpy(p + data->copy_ofs, src + data->src_ofs, data->copy_bytes); in do_convert()
49 if (data->cvt_endian) in do_convert()
51 tmp ^= data->flip; in do_convert()
52 memcpy(dst, p + data->dst_ofs, data->dst_bytes); in do_convert()
60 struct linear_priv *data = (struct linear_priv *)plugin->extra_data; in convert()
61 int channel; in convert() local
62 int nchannels = plugin->src_format.channels; in convert()
[all …]
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| D | mulaw.c | 2 * Mu-Law conversion Plug-In Interface
4 * Uros Bizjak <uros@kss-loka.si>
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #define SIGN_BIT (0x80) /* Sign bit for a u-law byte. */
31 #define NSEGS (8) /* Number of u-law segments. */
55 * linear2ulaw() - Convert a linear PCM value to u-law
58 * is biased by adding 33 which shifts the encoding range from (0 - 8158) to
59 * (33 - 8191). The result can be seen in the following encoding table:
62 * ------------------------ ---------------
75 * four bits wxyz. * The trailing bits (a - h) are ignored.
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| D | rate.c | 2 * Rate conversion Plug-In
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #define R_MASK (BITS-1)
55 unsigned int channel; in rate_init() local
56 struct rate_priv *data = (struct rate_priv *)plugin->extra_data; in rate_init()
57 data->pos = 0; in rate_init()
58 for (channel = 0; channel < plugin->src_format.channels; channel++) { in rate_init()
59 data->channels[channel].last_S1 = 0; in rate_init()
60 data->channels[channel].last_S2 = 0; in rate_init()
73 unsigned int channel; in resample_expand() local
[all …]
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| /Linux-v5.10/drivers/clk/bcm/ |
| D | clk-ns2.c | 16 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/bcm-ns2.h>
22 #include "clk-iproc.h"
59 .channel = BCM_NS2_GENPLL_SCR_SCR_CLK,
62 .mdiv = REG_VAL(0x18, 0, 8),
65 .channel = BCM_NS2_GENPLL_SCR_FS_CLK,
68 .mdiv = REG_VAL(0x18, 8, 8),
71 .channel = BCM_NS2_GENPLL_SCR_AUDIO_CLK,
74 .mdiv = REG_VAL(0x14, 0, 8),
77 .channel = BCM_NS2_GENPLL_SCR_CH3_UNUSED,
[all …]
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| D | clk-cygnus.c | 16 #include <linux/clk-provider.h>
23 #include <dt-bindings/clock/bcm-cygnus.h>
24 #include "clk-iproc.h"
55 CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
73 .channel = BCM_CYGNUS_GENPLL_AXI21_CLK,
76 .mdiv = REG_VAL(0x20, 0, 8),
79 .channel = BCM_CYGNUS_GENPLL_250MHZ_CLK,
82 .mdiv = REG_VAL(0x20, 10, 8),
85 .channel = BCM_CYGNUS_GENPLL_IHOST_SYS_CLK,
87 .enable = ENABLE_VAL(0x4, 8, 2, 14),
[all …]
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| D | clk-nsp.c | 16 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/bcm-nsp.h>
22 #include "clk-iproc.h"
43 CLK_OF_DECLARE(nsp_armpll, "brcm,nsp-armpll", nsp_armpll_init);
58 .channel = BCM_NSP_GENPLL_PHY_CLK,
61 .mdiv = REG_VAL(0x18, 16, 8),
64 .channel = BCM_NSP_GENPLL_ENET_SW_CLK,
67 .mdiv = REG_VAL(0x18, 8, 8),
70 .channel = BCM_NSP_GENPLL_USB_PHY_REF_CLK,
72 .enable = ENABLE_VAL(0x4, 14, 8, 20),
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | dma.txt | 4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
[all …]
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| /Linux-v5.10/sound/soc/sprd/ |
| D | sprd-mcdt.c | 1 // SPDX-License-Identifier: GPL-2.0
14 #include "sprd-mcdt.h"
57 /* Channel water mark definition */
60 #define MCDT_CH_FIFO_AF_MASK GENMASK(8, 0)
62 /* DMA channel select definition */
67 #define MCDT_DMA_CH2_SEL_MASK GENMASK(11, 8)
68 #define MCDT_DMA_CH2_SEL_SHIFT 8
75 /* DMA channel ACK select definition */
78 /* Channel FIFO definition */
121 u32 orig = readl_relaxed(mcdt->base + reg); in sprd_mcdt_update()
[all …]
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| /Linux-v5.10/drivers/hsi/controllers/ |
| D | omap_ssi_regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
32 #define SSI_MPU_ENABLE_REG(port, irq) (0x80c + ((port) * 0x10) + ((irq) * 8))
33 # define SSI_DATAACCEPT(channel) (1 << (channel)) argument
34 # define SSI_DATAAVAILABLE(channel) (1 << ((channel) + 8)) argument
35 # define SSI_DATAOVERRUN(channel) (1 << ((channel) + 16)) argument
40 # define SSI_GDD_LCH(channel) (1 << (channel)) argument
44 # define SSI_WAKE(channel) (1 << (channel)) argument
57 #define SSI_SST_FRAMESIZE_REG 8
62 # define SSI_FULL(channel) (1 << (channel)) argument
71 #define SSI_SST_BUFFER_CH_REG(channel) (0x80 + ((channel) * 4)) argument
[all …]
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| /Linux-v5.10/Documentation/ABI/testing/ |
| D | configfs-most | 2 Date: March 8, 2019
9 # mount -t configfs none /sys/kernel/config/
13 Date: March 8, 2019
19 configure the buffer size for this channel
22 configure the sub-buffer size for this channel
28 channel
32 this channel
51 channel
52 name of the channel the link is to be attached to
60 configuration, the creation is post-poned until
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| /Linux-v5.10/drivers/net/wireless/mediatek/mt76/mt76x2/ |
| D | eeprom.c | 1 // SPDX-License-Identifier: ISC
17 void *src = dev->mt76.eeprom.data + MT_EE_MAC_ADDR; in mt76x2_eeprom_get_macaddr()
19 memcpy(dev->mt76.macaddr, src, ETH_ALEN); in mt76x2_eeprom_get_macaddr()
80 struct device_node *np = dev->mt76.dev->of_node; in mt76x2_apply_cal_free_data()
81 u8 *eeprom = dev->mt76.eeprom.data; in mt76x2_apply_cal_free_data()
91 if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp")) in mt76x2_apply_cal_free_data()
116 eeprom[MT_EE_BT_VCDL_CALIBRATION + 1] = val >> 8; in mt76x2_apply_cal_free_data()
125 u16 val = get_unaligned_le16(dev->mt76.eeprom.data); in mt76x2_check_eeprom()
128 val = get_unaligned_le16(dev->mt76.eeprom.data + MT_EE_PCI_ID); in mt76x2_check_eeprom()
135 dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n", val); in mt76x2_check_eeprom()
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/sound/ |
| D | st,sta32x.txt | 7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
26 - st,output-conf: number, Selects the output configuration:
[all …]
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| D | st,sta350.txt | 7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
[all …]
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| /Linux-v5.10/drivers/net/wireless/broadcom/brcm80211/include/ |
| D | brcmu_d11.h | 1 // SPDX-License-Identifier: ISC
13 /* A chanspec (channel specification) holds the channel number, band,
20 /* bit 0~7 channel number
21 * for 80+80 channels: bit 0~3 low channel id, bit 4~7 high channel id
30 /* bit 8~16 for dot 11n IO types
31 * bit 8~9 sideband
37 #define BRCMU_CHSPEC_D11N_SB_SHIFT 8
51 /* bit 8~16 for dot 11ac IO types
52 * bit 8~10 sideband
57 #define BRCMU_CHSPEC_D11AC_SB_SHIFT 8
[all …]
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| /Linux-v5.10/drivers/iio/adc/ |
| D | ad7476.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Analog Devices AD7466/7/8 AD7476/5/7/8 (A) SPI ADC driver
4 * TI ADC081S/ADC101S/ADC121S 8/10/12-bit SPI ADC driver
31 struct iio_chan_spec channel[2]; member
74 if (!st->convst_gpio) in ad7091_convst()
77 gpiod_set_value(st->convst_gpio, 0); in ad7091_convst()
79 gpiod_set_value(st->convst_gpio, 1); in ad7091_convst()
86 struct iio_dev *indio_dev = pf->indio_dev; in ad7476_trigger_handler()
92 b_sent = spi_sync(st->spi, &st->msg); in ad7476_trigger_handler()
96 iio_push_to_buffers_with_timestamp(indio_dev, st->data, in ad7476_trigger_handler()
[all …]
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| /Linux-v5.10/sound/pci/emu10k1/ |
| D | p16v.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
8 * Output fixed at S32_LE, 2 channel to hw:0,0
15 * Use 2 channel output streams instead of 8 channel.
16 * (8 channel output streams might be good for ASIO type output)
17 * Corrected speaker output, so Front -> Front etc.
36 * Merging with snd-emu10k1 driver.
38 * One stereo channel at 24bit now works.
42 * Integrated with snd-emu10k1 driver.
50 * setting HD Capture channel to 0 captures from CDROM digital input.
[all …]
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| /Linux-v5.10/sound/usb/caiaq/ |
| D | control.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
24 struct snd_usb_caiaqdev *cdev = caiaqdev(chip->card); in control_info()
25 int pos = kcontrol->private_value; in control_info()
29 uinfo->count = 1; in control_info()
32 switch (cdev->chip.usb_id) { in control_info()
37 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in control_info()
38 uinfo->value.integer.min = 0; in control_info()
39 uinfo->value.integer.max = 2; in control_info()
54 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in control_info()
55 uinfo->value.integer.min = 0; in control_info()
[all …]
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| /Linux-v5.10/arch/mips/include/asm/ |
| D | jazzdma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Helpfile for jazzdma.c -- Mips Jazz R4030 DMA controller support
17 extern void vdma_enable(int channel);
18 extern void vdma_disable(int channel);
19 extern void vdma_set_mode(int channel, int mode);
20 extern void vdma_set_addr(int channel, long addr);
21 extern void vdma_set_count(int channel, int count);
22 extern int vdma_get_residue(int channel);
23 extern int vdma_get_enable(int channel);
38 #define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1))
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| /Linux-v5.10/Documentation/leds/ |
| D | leds-lp5523.rst | 9 Contact: Samu Onkalo (samu.p.onkalo-at-nokia.com)
12 -----------
15 The name of each channel is configurable in the platform data - name and label.
16 There are three options to make the channel name.
20 To make specific channel name, then use 'name' platform data.
22 - /sys/class/leds/R1 (name: 'R1')
23 - /sys/class/leds/B1 (name: 'B1')
27 For one device name with channel number, then use 'label'.
28 - /sys/class/leds/RGB:channelN (label: 'RGB', N: 0 ~ 8)
33 - /sys/class/leds/lp5523:channelN (N: 0 ~ 8)
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| /Linux-v5.10/drivers/net/ethernet/microchip/ |
| D | lan743x_main.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
26 #define FPGA_REV_GET_MINOR_(fpga_rev) (((fpga_rev) >> 8) & 0x000000FF)
89 #define FCT_RX_CTL_EN_(channel) BIT(28 + (channel)) argument
90 #define FCT_RX_CTL_DIS_(channel) BIT(24 + (channel)) argument
91 #define FCT_RX_CTL_RESET_(channel) BIT(20 + (channel)) argument
94 #define FCT_TX_CTL_EN_(channel) BIT(28 + (channel)) argument
95 #define FCT_TX_CTL_DIS_(channel) BIT(24 + (channel)) argument
96 #define FCT_TX_CTL_RESET_(channel) BIT(20 + (channel)) argument
101 ((value << 8) & FCT_FLOW_CTL_OFF_THRESHOLD_)
182 /* offset 0x400 - 0x500, x may range from 0 to 32, for a total of 33 entries */
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| /Linux-v5.10/sound/pci/ca0106/ |
| D | ca0106.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
12 * Removed noise from Center/LFE channel when in Analog mode.
18 * 0.0.8
34 * playback periods_min=2, periods_max=8
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@st.com>
11 - Olivier Moysan <olivier.moysan@st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
20 It features up to 8 serial digital interfaces (SPI or Manchester) and
[all …]
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| /Linux-v5.10/drivers/tty/serial/ |
| D | ip22zilog.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
47 #define R8 8
98 #define Rx8 0xc0 /* Rx 8 Bits/Character */
111 #define MONSYNC 0 /* 8 Bit Sync character */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
132 #define Tx8 0x60 /* Tx 8 bits/character */
136 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
138 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
140 /* Write Register 8 (transmit buffer) */
[all …]
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| /Linux-v5.10/sound/soc/codecs/ |
| D | tas5086.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * - implement DAPM and input muxing
9 * - implement modulation limit
10 * - implement non-default PWM start
13 * because the registers are of unequal size, and multi-byte registers
18 * it doesn't matter because the entire map can be accessed as 8-bit
21 * routines have to be open-coded.
71 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
89 * Default TAS5086 power-up configuration
173 size = tas5086_register_size(&client->dev, reg); in tas5086_reg_write()
[all …]
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