Lines Matching +full:8 +full:- +full:channel
1 // SPDX-License-Identifier: ISC
17 void *src = dev->mt76.eeprom.data + MT_EE_MAC_ADDR; in mt76x2_eeprom_get_macaddr()
19 memcpy(dev->mt76.macaddr, src, ETH_ALEN); in mt76x2_eeprom_get_macaddr()
80 struct device_node *np = dev->mt76.dev->of_node; in mt76x2_apply_cal_free_data()
81 u8 *eeprom = dev->mt76.eeprom.data; in mt76x2_apply_cal_free_data()
91 if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp")) in mt76x2_apply_cal_free_data()
116 eeprom[MT_EE_BT_VCDL_CALIBRATION + 1] = val >> 8; in mt76x2_apply_cal_free_data()
125 u16 val = get_unaligned_le16(dev->mt76.eeprom.data); in mt76x2_check_eeprom()
128 val = get_unaligned_le16(dev->mt76.eeprom.data + MT_EE_PCI_ID); in mt76x2_check_eeprom()
135 dev_err(dev->mt76.dev, "EEPROM data check failed: %04x\n", val); in mt76x2_check_eeprom()
136 return -EINVAL; in mt76x2_check_eeprom()
147 ret = mt76_eeprom_init(&dev->mt76, MT7662_EEPROM_SIZE); in mt76x2_eeprom_load()
155 dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, MT7662_EEPROM_SIZE, in mt76x2_eeprom_load()
157 dev->mt76.otp.size = MT7662_EEPROM_SIZE; in mt76x2_eeprom_load()
158 if (!dev->mt76.otp.data) in mt76x2_eeprom_load()
159 return -ENOMEM; in mt76x2_eeprom_load()
161 efuse = dev->mt76.otp.data; in mt76x2_eeprom_load()
172 memcpy(dev->mt76.eeprom.data, efuse, MT7662_EEPROM_SIZE); in mt76x2_eeprom_load()
177 return -ENOENT; in mt76x2_eeprom_load()
185 s8 *dest = dev->cal.rx.high_gain; in mt76x2_set_rx_gain_group()
200 s8 *dest = dev->cal.rx.rssi_offset; in mt76x2_set_rssi_offset()
211 mt76x2_get_cal_channel_group(int channel) in mt76x2_get_cal_channel_group() argument
213 if (channel >= 184 && channel <= 196) in mt76x2_get_cal_channel_group()
215 if (channel <= 48) in mt76x2_get_cal_channel_group()
217 if (channel <= 64) in mt76x2_get_cal_channel_group()
219 if (channel <= 114) in mt76x2_get_cal_channel_group()
221 if (channel <= 144) in mt76x2_get_cal_channel_group()
227 mt76x2_get_5g_rx_gain(struct mt76x02_dev *dev, u8 channel) in mt76x2_get_5g_rx_gain() argument
231 group = mt76x2_get_cal_channel_group(channel); in mt76x2_get_5g_rx_gain()
238 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN) >> 8; in mt76x2_get_5g_rx_gain()
244 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN) >> 8; in mt76x2_get_5g_rx_gain()
250 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN) >> 8; in mt76x2_get_5g_rx_gain()
256 struct ieee80211_channel *chan = dev->mphy.chandef.chan; in mt76x2_read_rx_gain()
257 int channel = chan->hw_value; in mt76x2_read_rx_gain() local
262 if (chan->band == NL80211_BAND_2GHZ) in mt76x2_read_rx_gain()
263 val = mt76x02_eeprom_get(dev, MT_EE_RF_2G_RX_HIGH_GAIN) >> 8; in mt76x2_read_rx_gain()
265 val = mt76x2_get_5g_rx_gain(dev, channel); in mt76x2_read_rx_gain()
269 mt76x02_get_rx_gain(dev, chan->band, &val, &lna_2g, lna_5g); in mt76x2_read_rx_gain()
271 mt76x2_set_rssi_offset(dev, 1, val >> 8); in mt76x2_read_rx_gain()
273 dev->cal.rx.mcu_gain = (lna_2g & 0xff); in mt76x2_read_rx_gain()
274 dev->cal.rx.mcu_gain |= (lna_5g[0] & 0xff) << 8; in mt76x2_read_rx_gain()
275 dev->cal.rx.mcu_gain |= (lna_5g[1] & 0xff) << 16; in mt76x2_read_rx_gain()
276 dev->cal.rx.mcu_gain |= (lna_5g[2] & 0xff) << 24; in mt76x2_read_rx_gain()
279 dev->cal.rx.lna_gain = mt76x02_sign_extend(lna, 8); in mt76x2_read_rx_gain()
289 is_5ghz = chan->band == NL80211_BAND_5GHZ; in mt76x2_get_rate_power()
294 t->cck[0] = t->cck[1] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power()
295 t->cck[2] = t->cck[3] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
301 t->ofdm[0] = t->ofdm[1] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power()
302 t->ofdm[2] = t->ofdm[3] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
308 t->ofdm[4] = t->ofdm[5] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power()
309 t->ofdm[6] = t->ofdm[7] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
312 t->ht[0] = t->ht[1] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power()
313 t->ht[2] = t->ht[3] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
316 t->ht[4] = t->ht[5] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power()
317 t->ht[6] = t->ht[7] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
320 t->ht[8] = t->ht[9] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power()
321 t->ht[10] = t->ht[11] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
324 t->ht[12] = t->ht[13] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power()
325 t->ht[14] = t->ht[15] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
328 t->vht[0] = t->vht[1] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power()
329 t->vht[2] = t->vht[3] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
332 t->vht[4] = t->vht[5] = mt76x02_rate_power_val(val); in mt76x2_get_rate_power()
333 t->vht[6] = t->vht[7] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
337 val >>= 8; in mt76x2_get_rate_power()
338 t->vht[8] = t->vht[9] = mt76x02_rate_power_val(val >> 8); in mt76x2_get_rate_power()
340 memcpy(t->stbc, t->ht, sizeof(t->stbc[0]) * 8); in mt76x2_get_rate_power()
341 t->stbc[8] = t->vht[8]; in mt76x2_get_rate_power()
342 t->stbc[9] = t->vht[9]; in mt76x2_get_rate_power()
352 int channel = chan->hw_value; in mt76x2_get_power_info_2g() local
357 if (channel < 6) in mt76x2_get_power_info_2g()
359 else if (channel < 11) in mt76x2_get_power_info_2g()
366 t->chain[chain].tssi_slope = data[0]; in mt76x2_get_power_info_2g()
367 t->chain[chain].tssi_offset = data[1]; in mt76x2_get_power_info_2g()
368 t->chain[chain].target_power = data[2]; in mt76x2_get_power_info_2g()
369 t->chain[chain].delta = in mt76x2_get_power_info_2g()
373 t->target_power = val >> 8; in mt76x2_get_power_info_2g()
382 int channel = chan->hw_value; in mt76x2_get_power_info_5g() local
388 group = mt76x2_get_cal_channel_group(channel); in mt76x2_get_power_info_5g()
391 if (channel >= 192) in mt76x2_get_power_info_5g()
393 else if (channel >= 184) in mt76x2_get_power_info_5g()
395 else if (channel < 44) in mt76x2_get_power_info_5g()
397 else if (channel < 52) in mt76x2_get_power_info_5g()
399 else if (channel < 58) in mt76x2_get_power_info_5g()
401 else if (channel < 98) in mt76x2_get_power_info_5g()
403 else if (channel < 106) in mt76x2_get_power_info_5g()
405 else if (channel < 116) in mt76x2_get_power_info_5g()
407 else if (channel < 130) in mt76x2_get_power_info_5g()
409 else if (channel < 149) in mt76x2_get_power_info_5g()
411 else if (channel < 157) in mt76x2_get_power_info_5g()
418 t->chain[chain].tssi_slope = data[0]; in mt76x2_get_power_info_5g()
419 t->chain[chain].tssi_offset = data[1]; in mt76x2_get_power_info_5g()
420 t->chain[chain].target_power = data[2]; in mt76x2_get_power_info_5g()
421 t->chain[chain].delta = in mt76x2_get_power_info_5g()
425 t->target_power = val & 0xff; in mt76x2_get_power_info_5g()
439 if (chan->band == NL80211_BAND_5GHZ) { in mt76x2_get_power_info()
440 bw40 >>= 8; in mt76x2_get_power_info()
453 !mt76x02_field_valid(t->target_power)) in mt76x2_get_power_info()
454 t->target_power = t->chain[0].target_power; in mt76x2_get_power_info()
456 t->delta_bw40 = mt76x02_rate_power_val(bw40); in mt76x2_get_power_info()
457 t->delta_bw80 = mt76x02_rate_power_val(bw80); in mt76x2_get_power_info()
463 enum nl80211_band band = dev->mphy.chandef.chan->band; in mt76x2_get_temp_comp()
470 return -EINVAL; in mt76x2_get_temp_comp()
473 return -EINVAL; in mt76x2_get_temp_comp()
475 val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G) >> 8; in mt76x2_get_temp_comp()
476 t->temp_25_ref = val & 0x7f; in mt76x2_get_temp_comp()
483 MT_EE_TX_POWER_DELTA_BW80) >> 8; in mt76x2_get_temp_comp()
486 t->high_slope = slope & 0xff; in mt76x2_get_temp_comp()
487 t->low_slope = slope >> 8; in mt76x2_get_temp_comp()
488 t->lower_bound = 0 - (bounds & 0xf); in mt76x2_get_temp_comp()
489 t->upper_bound = (bounds >> 4) & 0xf; in mt76x2_get_temp_comp()
505 mt76_eeprom_override(&dev->mt76); in mt76x2_eeprom_init()
506 dev->mt76.macaddr[0] &= ~BIT(1); in mt76x2_eeprom_init()