Lines Matching +full:8 +full:- +full:channel
16 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/bcm-ns2.h>
22 #include "clk-iproc.h"
59 .channel = BCM_NS2_GENPLL_SCR_SCR_CLK,
62 .mdiv = REG_VAL(0x18, 0, 8),
65 .channel = BCM_NS2_GENPLL_SCR_FS_CLK,
68 .mdiv = REG_VAL(0x18, 8, 8),
71 .channel = BCM_NS2_GENPLL_SCR_AUDIO_CLK,
74 .mdiv = REG_VAL(0x14, 0, 8),
77 .channel = BCM_NS2_GENPLL_SCR_CH3_UNUSED,
80 .mdiv = REG_VAL(0x14, 8, 8),
83 .channel = BCM_NS2_GENPLL_SCR_CH4_UNUSED,
86 .mdiv = REG_VAL(0x14, 16, 8),
89 .channel = BCM_NS2_GENPLL_SCR_CH5_UNUSED,
92 .mdiv = REG_VAL(0x14, 24, 8),
101 CLK_OF_DECLARE(ns2_genpll_src_clk, "brcm,ns2-genpll-scr",
121 .channel = BCM_NS2_GENPLL_SW_RPE_CLK,
124 .mdiv = REG_VAL(0x18, 0, 8),
127 .channel = BCM_NS2_GENPLL_SW_250_CLK,
130 .mdiv = REG_VAL(0x18, 8, 8),
133 .channel = BCM_NS2_GENPLL_SW_NIC_CLK,
136 .mdiv = REG_VAL(0x14, 0, 8),
139 .channel = BCM_NS2_GENPLL_SW_CHIMP_CLK,
142 .mdiv = REG_VAL(0x14, 8, 8),
145 .channel = BCM_NS2_GENPLL_SW_PORT_CLK,
148 .mdiv = REG_VAL(0x14, 16, 8),
151 .channel = BCM_NS2_GENPLL_SW_SDIO_CLK,
154 .mdiv = REG_VAL(0x14, 24, 8),
163 CLK_OF_DECLARE(ns2_genpll_sw_clk, "brcm,ns2-genpll-sw",
183 .channel = BCM_NS2_LCPLL_DDR_PCIE_SATA_USB_CLK,
186 .mdiv = REG_VAL(0x14, 0, 8),
189 .channel = BCM_NS2_LCPLL_DDR_DDR_CLK,
192 .mdiv = REG_VAL(0x14, 8, 8),
195 .channel = BCM_NS2_LCPLL_DDR_CH2_UNUSED,
198 .mdiv = REG_VAL(0x10, 0, 8),
201 .channel = BCM_NS2_LCPLL_DDR_CH3_UNUSED,
204 .mdiv = REG_VAL(0x10, 8, 8),
207 .channel = BCM_NS2_LCPLL_DDR_CH4_UNUSED,
210 .mdiv = REG_VAL(0x10, 16, 8),
213 .channel = BCM_NS2_LCPLL_DDR_CH5_UNUSED,
216 .mdiv = REG_VAL(0x10, 24, 8),
225 CLK_OF_DECLARE(ns2_lcpll_ddr_clk, "brcm,ns2-lcpll-ddr",
245 .channel = BCM_NS2_LCPLL_PORTS_WAN_CLK,
248 .mdiv = REG_VAL(0x14, 0, 8),
251 .channel = BCM_NS2_LCPLL_PORTS_RGMII_CLK,
254 .mdiv = REG_VAL(0x14, 8, 8),
257 .channel = BCM_NS2_LCPLL_PORTS_CH2_UNUSED,
260 .mdiv = REG_VAL(0x10, 0, 8),
263 .channel = BCM_NS2_LCPLL_PORTS_CH3_UNUSED,
266 .mdiv = REG_VAL(0x10, 8, 8),
269 .channel = BCM_NS2_LCPLL_PORTS_CH4_UNUSED,
272 .mdiv = REG_VAL(0x10, 16, 8),
275 .channel = BCM_NS2_LCPLL_PORTS_CH5_UNUSED,
278 .mdiv = REG_VAL(0x10, 24, 8),
287 CLK_OF_DECLARE(ns2_lcpll_ports_clk, "brcm,ns2-lcpll-ports",