1 /* SPDX-License-Identifier: GPL-2.0-only */
32 #define SSI_MPU_ENABLE_REG(port, irq)  (0x80c + ((port) * 0x10) + ((irq) * 8))
33 #  define SSI_DATAACCEPT(channel)    (1 << (channel))  argument
34 #  define SSI_DATAAVAILABLE(channel)  (1 << ((channel) + 8))  argument
35 #  define SSI_DATAOVERRUN(channel)    (1 << ((channel) + 16))  argument
40 #  define SSI_GDD_LCH(channel)  (1 << (channel))  argument
44 #  define SSI_WAKE(channel)  (1 << (channel))  argument
57 #define SSI_SST_FRAMESIZE_REG    8
62 #  define  SSI_FULL(channel)  (1 << (channel))  argument
71 #define SSI_SST_BUFFER_CH_REG(channel)  (0x80 + ((channel) * 4))  argument
72 #define SSI_SST_SWAPBUF_CH_REG(channel)  (0xc0 + ((channel) * 4))  argument
79 #define SSI_SSR_FRAMESIZE_REG    8
82 #  define SSI_NOTEMPTY(channel)  (1 << (channel))  argument
91 #define SSI_SSR_BUFFER_CH_REG(channel)  (0x80 + ((channel) * 4))  argument
92 #define SSI_SSR_SWAPBUF_CH_REG(channel)  (0xc0 + ((channel) * 4))  argument
111 #define SSI_GDD_CSDP_REG(channel)  (0x800 + ((channel) * 0x40))  argument
118 #  define SSI_DST_MEMORY_PORT  (8 << 9)
126 #  define SSI_SRC_MEMORY_PORT  (8 << 2)
130 #define SSI_GDD_CCR_REG(channel)  (0x802 + ((channel) * 0x40))  argument
139 #define SSI_GDD_CICR_REG(channel)  (0x804 + ((channel) * 0x40))  argument
143 #define SSI_GDD_CSR_REG(channel)  (0x806 + ((channel) * 0x40))  argument
148 #define SSI_GDD_CSSA_REG(channel)  (0x808 + ((channel) * 0x40))  argument
149 #define SSI_GDD_CDSA_REG(channel)  (0x80c + ((channel) * 0x40))  argument
150 #define SSI_GDD_CEN_REG(channel)  (0x810 + ((channel) * 0x40))  argument
151 #define SSI_GDD_CSAC_REG(channel)  (0x818 + ((channel) * 0x40))  argument
152 #define SSI_GDD_CDAC_REG(channel)  (0x81a + ((channel) * 0x40))  argument
153 #define SSI_GDD_CLNK_CTRL_REG(channel)  (0x828 + ((channel) * 0x40))  argument