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Searched refs:COMP_CSR_COMPxINSEL_Pos (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h1203 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
1204 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
1206 #define COMP_CSR_COMPxINSEL_0 (0x1UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000010 */
1207 #define COMP_CSR_COMPxINSEL_1 (0x2UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000020 */
1208 #define COMP_CSR_COMPxINSEL_2 (0x4UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000040 */
Dstm32f051x8.h1204 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
1205 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
1207 #define COMP_CSR_COMPxINSEL_0 (0x1UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000010 */
1208 #define COMP_CSR_COMPxINSEL_1 (0x2UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000020 */
1209 #define COMP_CSR_COMPxINSEL_2 (0x4UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000040 */
Dstm32f071xb.h1238 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
1239 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
1241 #define COMP_CSR_COMPxINSEL_0 (0x1UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000010 */
1242 #define COMP_CSR_COMPxINSEL_1 (0x2UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000020 */
1243 #define COMP_CSR_COMPxINSEL_2 (0x4UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000040 */
Dstm32f072xb.h4997 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
4998 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
5000 #define COMP_CSR_COMPxINSEL_0 (0x1UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000010 */
5001 #define COMP_CSR_COMPxINSEL_1 (0x2UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000020 */
5002 #define COMP_CSR_COMPxINSEL_2 (0x4UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000040 */
Dstm32f091xc.h4979 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
4980 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
4982 #define COMP_CSR_COMPxINSEL_0 (0x1UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000010 */
4983 #define COMP_CSR_COMPxINSEL_1 (0x2UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000020 */
4984 #define COMP_CSR_COMPxINSEL_2 (0x4UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000040 */
Dstm32f098xx.h4979 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
4980 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
4982 #define COMP_CSR_COMPxINSEL_0 (0x1UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000010 */
4983 #define COMP_CSR_COMPxINSEL_1 (0x2UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000020 */
4984 #define COMP_CSR_COMPxINSEL_2 (0x4UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000040 */
Dstm32f078xx.h4997 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
4998 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
5000 #define COMP_CSR_COMPxINSEL_0 (0x1UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000010 */
5001 #define COMP_CSR_COMPxINSEL_1 (0x2UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000020 */
5002 #define COMP_CSR_COMPxINSEL_2 (0x4UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f378xx.h1439 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
1440 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
1442 #define COMP_CSR_COMPxINSEL_0 (0x1UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000010 */
1443 #define COMP_CSR_COMPxINSEL_1 (0x2UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000020 */
1444 #define COMP_CSR_COMPxINSEL_2 (0x4UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000040 */
Dstm32f373xc.h1480 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
1481 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
1483 #define COMP_CSR_COMPxINSEL_0 (0x1UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000010 */
1484 #define COMP_CSR_COMPxINSEL_1 (0x2UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000020 */
1485 #define COMP_CSR_COMPxINSEL_2 (0x4UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000040 */
Dstm32f301x8.h2156 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2157 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
Dstm32f318xx.h2157 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2158 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
Dstm32f302x8.h2265 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2266 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
Dstm32f328xx.h2208 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2209 #define COMP_CSR_COMPxINSEL_Msk (0x40007UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00400070 */
Dstm32f302xc.h2387 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2388 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
Dstm32f303x8.h2209 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2210 #define COMP_CSR_COMPxINSEL_Msk (0x40007UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00400070 */
Dstm32f358xx.h2673 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2674 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
Dstm32f303xc.h2715 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2716 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
Dstm32f302xe.h2421 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2422 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
Dstm32f303xe.h2724 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2725 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
Dstm32f398xx.h2680 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2681 #define COMP_CSR_COMPxINSEL_Msk (0x7UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00000070 */
Dstm32f334x8.h2394 #define COMP_CSR_COMPxINSEL_Pos (4U) macro
2395 #define COMP_CSR_COMPxINSEL_Msk (0x40007UL << COMP_CSR_COMPxINSEL_Pos) /*!< 0x00400070 */