Searched refs:timer (Results 676 – 700 of 737) sorted by relevance
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61 - High-resolution timer (2.1 ns)
85 - 2x SysTick timer
154 A watchdog timer is enabled by default. To disable it call Cy_WDT_Unlock() and
229 oscillator on the board will be used as a source for the GPT timer to
182 oscillator on the board will be used as a source for the GPT timer to
405 * gd32e103v_eval: Added prescaler to timer557 * STM32: Enabled complementary output for timer channel. A PWM consumer can now use602 * Ported timer drivers to use pinctrl603 * LiteX: Ported the timer driver to use the HAL1234 - :github:`45315` - drivers: timer: nrf_rtc_timer: NRF boards take a long time to boot application …1353 * :github:`45750` - tests-ci : kernel: timer: tickless test_sleep_abs Failed1420 * :github:`45316` - drivers: timer: nrf_rtc_timer: SYS_CLOCK_TICKS_PER_SEC too high for when CONFIG…1776 * :github:`42953` - it8xxx2_evb: Test in tests/kernel/timer/timer_api fail.1996 * :github:`8536` - imxrt1050: Replace systick with gpt or other system timer
452 * mimxrt11xx: Added support for GPT timer as OS timer483 * stm32: Added timer based counter driver (stm32f4 only for now).578 to parent timer node.1019 * :github:`41509` - OpenThread's timer processing enters infinite loop in 49th day of system uptime
302 * ``ZEP-1415`` - drivers/timer/* code comments still refer to micro/nano kernel433 * ``ZEP-1763`` - Nordic RTC timer driver not correct with tickless idle
260 under ``dts/bindings/timer``.
194 timer with 5% tolerance).
89 - 2x SysTick timer
99 - 2x SysTick timer
101 - 2x SysTick timer
96 - 2x SysTick timer
28 - 1 Watchdog timer peripheral
93 | TIMER | on-chip | timer |
26 zephyr,cortex-m-idle-timer = &rtc;
68 | WWDT | on-chip | windowed watchdog timer |
1188 you will need to enable timer debug separately to see1189 timer activity going on during out of order packets1196 Enable this to monitor timer activity of the
498 compatible = "nxp,os-timer";
300 oscillator on the board will be used as a source for the GPT timer to
283 oscillator on the board will be used as a source for the GPT timer to
19 - 12-bit 1 Msps ADC, 16-bit eMIOS timer
966 static void eth_dwc_xgmac_irq_poll(struct k_timer *timer) in eth_dwc_xgmac_irq_poll() argument969 timer, struct eth_dwc_xgmac_dev_data, isr_polling_timer); in eth_dwc_xgmac_irq_poll()
197 TRIGGER_DATA_ENTRY(SENSOR_TRIG_TIMER, timer, NULL),
