1.. zephyr:board:: stm32l562e_dk
2
3Overview
4********
5
6The STM32L562E-DK Discovery kit is designed as a complete demonstration and
7development platform for STMicroelectronics Arm |reg| Cortex |reg|-M33 core-based
8STM32L562QEI6QU microcontroller with TrustZone |reg|. Here are some highlights of
9the STM32L562E-DK Discovery board:
10
11
12- STM32L562QEI6QU microcontroller featuring 512 Kbytes of Flash memory and 256 Kbytes of SRAM in BGA132 package
13- 1.54" 240 x 240 pixel-262K color TFT LCD module with parallel interface and touch-control panel
14- USB Type-C |trade| Sink device FS
15- On-board energy meter: 300 nA to 150 mA measurement range with a dedicated USB interface
16- SAI Audio CODEC
17- MEMS digital microphones
18- 512-Mbit Octal-SPI Flash memory
19- Bluetooth |reg| V4.1 Low Energy module
20- iNEMO 3D accelerometer and 3D gyroscope
21- Board connectors
22
23  - STMod+ expansion connector with fan-out expansion board for Wi‑Fi |reg|, Grove and mikroBUS |trade| compatible connectors
24  - Pmod |trade| expansion connector
25  - Audio MEMS daughterboard expansion connector
26  - ARDUINO |reg| Uno V3 expansion connector
27
28- Flexible power-supply options
29
30  - ST-LINK
31  - USB VBUS
32  - external sources
33
34- On-board STLINK-V3E debugger/programmer with USB re-enumeration capability:
35
36  - mass storage
37  - Virtual COM port
38  - debug port
39
40- 2 user LEDs
41- User and reset push-buttons
42
43More information about the board can be found at the `STM32L562E-DK Discovery website`_.
44
45Hardware
46********
47
48The STM32L562xx devices are an ultra-low-power microcontrollers family (STM32L5
49Series) based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit RISC core.
50They operate at a frequency of up to 110 MHz.
51
52- Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 62 uA/MHz run mode)
53- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
54- Performance benchmark:
55
56  - 1.5 DMPIS/MHz (Drystone 2.1)
57  - 442 CoreMark |reg| (4.02 CoreMark |reg| /MHZ)
58
59- Security
60
61  - Arm |reg| TrustZone |reg| and securable I/Os memories and peripherals
62  - Flexible life cycle scheme with RDP (readout protection)
63  - Root of trust thanks to unique boot entry and hide protection area (HDP)
64  - Secure Firmware Installation thanks to embedded Root Secure Services
65  - Secure Firmware Update support with TF-M
66  - AES coprocessor
67  - Public key accelerator
68  - On-the-fly decryption of Octo-SPI external memories
69  - HASH hardware accelerator
70  - Active tamper and protection temperature, voltage and frequency attacks
71  - True Random Number Generator NIST SP800-90B compliant
72  - 96-bit unique ID
73  - 512-byte One-Time Programmable for user data
74
75- Clock management:
76
77  - 4 to 48 MHz crystal oscillator
78  - 32 kHz crystal oscillator for RTC (LSE)
79  - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
80  - Internal low-power 32 kHz RC ( |plusminus| 5%)
81  - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
82    LSE (better than  |plusminus| 0.25 % accuracy)
83  - 3 PLLs for system clock, USB, audio, ADC
84
85- Power management
86
87  - Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
88  - Embedded SMPS step-down converter
89  - External SMPS support
90
91- RTC with HW calendar, alarms and calibration
92- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
93- Up to 22 capacitive sensing channels: support touchkey, linear and rotary touch sensors
94- Up to 16 timers and 2 watchdogs
95
96  - 2x 16-bit advanced motor-control
97  - 2x 32-bit and 5x 16-bit general purpose
98  - 2x 16-bit basic
99  - 3x low-power 16-bit timers (available in Stop mode)
100  - 2x watchdogs
101  - 2x SysTick timer
102
103- Memories
104
105  - Up to 512 MB Flash, 2 banks read-while-write
106  - 512 KB of SRAM including 64 KB with hardware parity check
107  - External memory interface for static memories supporting SRAM, PSRAM, NOR, NAND and FRAM memories
108  - OCTOSPI memory interface
109
110- Rich analog peripherals (independent supply)
111
112  - 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
113  - 2x 12-bit DAC, low-power sample and hold
114  - 2x operational amplifiers with built-in PGA
115  - 2x ultra-low-power comparators
116  - 4x digital filters for sigma delta modulator
117
118- 19x communication interfaces
119
120  - USB Type-C / USB power delivery controller
121  - 2.0 full-speed crystal less solution, LPM and BCD
122  - 2x SAIs (serial audio interface)
123  - 4x I2C FM+(1 Mbit/s), SMBus/PMBus
124  - 6x USARTs (ISO 7816, LIN, IrDA, modem)
125  - 3x SPIs (7x SPIs with USART and OCTOSPI in SPI mode)
126  - 1xFDCAN
127  - 1xSDMMC interface
128  - 2x 14 channel DMA controllers
129
130- CRC calculation unit
131- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
132
133
134More information about STM32L562QE can be found here:
135
136- `STM32L562QE on www.st.com`_
137- `STM32L562 reference manual`_
138
139Supported Features
140==================
141
142The Zephyr stm32l562e_dk board configuration supports the following
143hardware features:
144
145+-----------+------------+-------------------------------------+
146| Interface | Controller | Driver/Component                    |
147+===========+============+=====================================+
148| ADC       | on-chip    | ADC Controller                      |
149+-----------+------------+-------------------------------------+
150| AES       | on-chip    | crypto                              |
151+-----------+------------+-------------------------------------+
152| CLOCK     | on-chip    | reset and clock control             |
153+-----------+------------+-------------------------------------+
154| DAC       | on-chip    | DAC Controller                      |
155+-----------+------------+-------------------------------------+
156| DMA       | on-chip    | Direct Memory Access                |
157+-----------+------------+-------------------------------------+
158| GPIO      | on-chip    | gpio                                |
159+-----------+------------+-------------------------------------+
160| I2C       | on-chip    | i2c                                 |
161+-----------+------------+-------------------------------------+
162| NVIC      | on-chip    | nested vector interrupt controller  |
163+-----------+------------+-------------------------------------+
164| PINMUX    | on-chip    | pinmux                              |
165+-----------+------------+-------------------------------------+
166| PWM       | on-chip    | PWM                                 |
167+-----------+------------+-------------------------------------+
168| RNG       | on-chip    | entropy                             |
169+-----------+------------+-------------------------------------+
170| SDMMC     | on-chip    | sd/mmc                              |
171+-----------+------------+-------------------------------------+
172| SPI       | on-chip    | spi                                 |
173+-----------+------------+-------------------------------------+
174| TrustZone | on-chip    | Trusted Firmware-M                  |
175+-----------+------------+-------------------------------------+
176| UART      | on-chip    | serial port-polling;                |
177|           |            | serial port-interrupt               |
178+-----------+------------+-------------------------------------+
179| WATCHDOG  | on-chip    | independent watchdog                |
180+-----------+------------+-------------------------------------+
181| USB       | on-chip    | usb                                 |
182+-----------+------------+-------------------------------------+
183
184Other hardware features are not yet supported on this Zephyr port.
185
186The default configuration can be found in the defconfig and dts files:
187
188- Common:
189
190  - :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk_common.dtsi`
191
192- Secure target:
193
194  - :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk_defconfig`
195  - :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk.dts`
196
197- Non-Secure target:
198
199  - :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk_stm32l562xx_ns_defconfig`
200  - :zephyr_file:`boards/st/stm32l562e_dk/stm32l562e_dk_stm32l562xx_ns.dts`
201
202Zephyr board options
203====================
204
205The STM32L562e is an SoC with Cortex-M33 architecture. Zephyr provides support
206for building for both Secure and Non-Secure firmware.
207
208The BOARD options are summarized below:
209
210+------------------------------+-------------------------------------------+
211| BOARD                        | Description                               |
212+==============================+===========================================+
213| stm32l562e_dk                | For building Trust Zone Disabled firmware |
214+------------------------------+-------------------------------------------+
215| stm32l562e_dk/stm32l562xx/ns | For building Non-Secure firmware          |
216+------------------------------+-------------------------------------------+
217
218Here are the instructions to build Zephyr with a non-secure configuration,
219using :zephyr:code-sample:`tfm_ipc` sample:
220
221   .. code-block:: bash
222
223      $ west build -b stm32l562e_dk/stm32l562xx/ns samples/tfm_integration/tfm_ipc/
224
225Once done, before flashing, you need to first run a generated script that
226will set platform option bytes config and erase platform (among others,
227option bit TZEN will be set).
228
229   .. code-block:: bash
230
231      $ ./build/tfm/api_ns/regression.sh
232      $ west flash
233
234Please note that, after having run a TFM sample on the board, you will need to
235run ``./build/tfm/api_ns/regression.sh`` once more to clean up the board from secure
236options and get back the platform back to a "normal" state and be able to run
237usual, non-TFM, binaries.
238Also note that, even then, TZEN will remain set, and you will need to use
239STM32CubeProgrammer_ to disable it fully, if required.
240
241Connections and IOs
242===================
243
244STM32L562E-DK Discovery Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
245input/output, pull-up, etc.
246
247For more details please refer to `STM32L562E-DK Discovery board User Manual`_.
248
249Default Zephyr Peripheral Mapping:
250----------------------------------
251
252- USART_1 TX/RX : PA9/PA10
253- USART_3 TX/RX : PC10/PC11
254- I2C_1 SCL/SDA : PB6/PB7
255- SPI_1 SCK/MISO/MOSI : PG2/PG3/PG4 (BT SPI bus)
256- SPI_3 NSS/SCK/MISO/MOSI : PE0/PG9/PB4/PB5 (Arduino SPI)
257- USER_PB : PC13
258- LD10 : PG12
259- PWM_2_CH1 : PA0
260- DAC1 : PA4
261- ADC1 : PC4
262
263System Clock
264------------
265
266STM32L562E-DK System Clock could be driven by internal or external oscillator,
267as well as main PLL clock. By default System clock is driven by PLL clock at
268110MHz, driven by 4MHz medium speed internal oscillator.
269
270Serial Port
271-----------
272
273STM32L562E-DK Discovery board has 6 U(S)ARTs. The Zephyr console output is
274assigned to USART1. Default settings are 115200 8N1.
275
276
277Programming and Debugging
278*************************
279
280STM32L562E-DK Discovery board includes an ST-LINK/V3E embedded debug tool interface.
281
282Applications for the ``stm32l562e_dk`` board configuration can be built and
283flashed in the usual way (see :ref:`build_an_application` and
284:ref:`application_run` for more details).
285
286Flashing
287========
288
289The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
290so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
291
292Alternatively, OpenOCD can also be used to flash the board using
293the ``--runner`` (or ``-r``) option:
294
295.. code-block:: console
296
297   $ west flash --runner openocd
298
299Support can also be enabled for pyOCD by adding "pack" support with the
300following pyOCD commands:
301
302.. code-block:: console
303
304   $ pyocd pack --update
305   $ pyocd pack --install stm32l562qe
306
307Flashing an application to STM32L562E-DK Discovery
308--------------------------------------------------
309
310Connect the STM32L562E-DK Discovery to your host computer using the USB port.
311Then build and flash an application. Here is an example for the
312:zephyr:code-sample:`hello_world` application.
313
314Run a serial host program to connect with your Nucleo board:
315
316.. code-block:: console
317
318   $ minicom -D /dev/ttyACM0
319
320Then build and flash the application.
321
322.. zephyr-app-commands::
323   :zephyr-app: samples/hello_world
324   :board: stm32l562e_dk
325   :goals: build flash
326
327You should see the following message on the console:
328
329.. code-block:: console
330
331   Hello World! stm32l562e_dk
332
333Debugging
334=========
335
336You can debug an application in the usual way.  Here is an example for the
337:zephyr:code-sample:`hello_world` application.
338
339.. zephyr-app-commands::
340   :zephyr-app: samples/hello_world
341   :board: stm32l562e_dk
342   :maybe-skip-config:
343   :goals: debug
344
345.. _STM32L562E-DK Discovery website:
346   https://www.st.com/en/evaluation-tools/stm32l562e-dk.html
347
348.. _STM32L562E-DK Discovery board User Manual:
349   https://www.st.com/resource/en/user_manual/dm00635554.pdf
350
351.. _STM32L562QE on www.st.com:
352   https://www.st.com/en/microcontrollers/stm32l562qe.html
353
354.. _STM32L562 reference manual:
355   https://www.st.com/resource/en/reference_manual/DM00346336.pdf
356
357.. _STM32CubeProgrammer:
358   https://www.st.com/en/development-tools/stm32cubeprog.html
359