1.. zephyr:board:: nucleo_l552ze_q
2
3Overview
4********
5
6The Nucleo L552ZE Q board, featuring an ARM Cortex-M33 based STM32L552ZE MCU,
7provides an affordable and flexible way for users to try out new concepts and
8build prototypes by choosing from the various combinations of performance and
9power consumption features. Here are some highlights of the Nucleo L552ZE Q
10board:
11
12
13- STM32L552ZE microcontroller in LQFP144 package
14- Two types of extension resources:
15
16  - Arduino Uno V3 connectivity
17  - ST morpho extension pin headers for full access to all STM32 I/Os
18
19- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
20- Flexible board power supply:
21
22   - USB VBUS or external source(3.3V, 5V, 7 - 12V)
23   - ST-Link
24
25- Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3)
26- Two push-buttons: USER and RESET
27- External or internal SMPS to generate Vcore logic supply
28- USB OTG full speed or device only
29
30More information about the board can be found at the `Nucleo L552ZE Q website`_.
31
32Hardware
33********
34
35The STM32L552xx devices are an ultra-low-power microcontrollers family (STM32L5
36Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core.
37They operate at a frequency of up to 110 MHz.
38
39- Ultra-low-power with FlexPowerControl (down to 108 nA Standby mode and 62 uA/MHz run mode)
40- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
41- Performance benchmark:
42
43  - 1.5 DMPIS/MHz (Drystone 2.1)
44  - 442 CoreMark |reg| (4.02 CoreMark |reg| /MHZ)
45
46- Security
47
48  - Arm |reg|  TrustZone |reg| and securable I/Os memories and peripherals
49  - Flexible life cycle scheme with RDP (readout protection)
50  - Root of trust thanks to unique boot entry and hide protection area (HDP)
51  - Secure Firmware Installation thanks to embedded Root Secure Services
52  - Secure Firmware Update support with TF-M
53  - HASH hardware accelerator
54  - Active tamper and protection temperature, voltage and frequency attacks
55  - True Random Number Generator NIST SP800-90B compliant
56  - 96-bit unique ID
57  - 512-byte One-Time Programmable for user data
58
59- Clock management:
60
61  - 4 to 48 MHz crystal oscillator
62  - 32 kHz crystal oscillator for RTC (LSE)
63  - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
64  - Internal low-power 32 kHz RC ( |plusminus| 5%)
65  - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by
66    LSE (better than  |plusminus| 0.25 % accuracy)
67  - 3 PLLs for system clock, USB, audio, ADC
68
69- Power management
70
71  - Embedded regulator (LDO) with three configurable range output to supply the digital circuitry
72  - Embedded SMPS step-down converter
73  - External SMPS support
74
75- RTC with HW calendar, alarms and calibration
76- Up to 114 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
77- Up to 22 capacitive sensing channels: support touchkey, linear and rotary touch sensors
78- Up to 16 timers and 2 watchdogs
79
80  - 2x 16-bit advanced motor-control
81  - 2x 32-bit and 5x 16-bit general purpose
82  - 2x 16-bit basic
83  - 3x low-power 16-bit timers (available in Stop mode)
84  - 2x watchdogs
85  - 2x SysTick timer
86
87- Memories
88
89  - Up to 512 MB Flash, 2 banks read-while-write
90  - 512 KB of SRAM including 64 KB with hardware parity check
91  - External memory interface for static memories supporting SRAM, PSRAM, NOR, NAND and FRAM memories
92  - OCTOSPI memory interface
93
94- Rich analog peripherals (independent supply)
95
96  - 3x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 uA/MSPS
97  - 2x 12-bit DAC, low-power sample and hold
98  - 2x operational amplifiers with built-in PGA
99  - 2x ultra-low-power comparators
100  - 4x digital filters for sigma delta modulator
101
102- 19x communication interfaces
103
104  - USB Type-C / USB power delivery controller
105  - 2.0 full-speed crystal less solution, LPM and BCD
106  - 2x SAIs (serial audio interface)
107  - 4x I2C FM+(1 Mbit/s), SMBus/PMBus
108  - 6x USARTs (ISO 7816, LIN, IrDA, modem)
109  - 3x SPIs (7x SPIs with USART and OCTOSPI in SPI mode)
110  - 1xFDCAN
111  - 1xSDMMC interface
112  - 2x 14 channel DMA controllers
113
114- CRC calculation unit
115- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
116
117
118More information about STM32L552ZE can be found here:
119
120- `STM32L552ZE on www.st.com`_
121- `STM32L552 reference manual`_
122
123Supported Features
124==================
125
126The Zephyr nucleo_l552ze_q board configuration supports the following
127hardware features:
128
129+-----------+------------+-------------------------------------+
130| Interface | Controller | Driver/Component                    |
131+===========+============+=====================================+
132| ADC       | on-chip    | ADC Controller                      |
133+-----------+------------+-------------------------------------+
134| CLOCK     | on-chip    | reset and clock control             |
135+-----------+------------+-------------------------------------+
136| DAC       | on-chip    | DAC Controller                      |
137+-----------+------------+-------------------------------------+
138| DMA       | on-chip    | Direct Memory Access                |
139+-----------+------------+-------------------------------------+
140| GPIO      | on-chip    | gpio                                |
141+-----------+------------+-------------------------------------+
142| I2C       | on-chip    | i2c                                 |
143+-----------+------------+-------------------------------------+
144| NVIC      | on-chip    | nested vector interrupt controller  |
145+-----------+------------+-------------------------------------+
146| PINMUX    | on-chip    | pinmux                              |
147+-----------+------------+-------------------------------------+
148| RNG       | on-chip    | entropy                             |
149+-----------+------------+-------------------------------------+
150| SPI       | on-chip    | spi                                 |
151+-----------+------------+-------------------------------------+
152| TrustZone | on-chip    | Trusted Firmware-M                  |
153+-----------+------------+-------------------------------------+
154| UART      | on-chip    | serial port-polling;                |
155|           |            | serial port-interrupt               |
156+-----------+------------+-------------------------------------+
157| die-temp  | on-chip    | die temperature sensor              |
158+-----------+------------+-------------------------------------+
159
160The default configuration can be found in the defconfig and dts files:
161
162- Common:
163
164  - :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q-common.dtsi`
165
166- Secure target:
167
168  - :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q_defconfig`
169  - :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q.dts`
170
171- Non-Secure target:
172
173  - :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q_stm32l552xx_ns_defconfig`
174  - :zephyr_file:`boards/st/nucleo_l552ze_q/nucleo_l552ze_q_stm32l552xx_ns.dts`
175
176Zephyr board options
177====================
178
179The STM32L552e is an SoC with Cortex-M33 architecture. Zephyr provides support
180for building for both Secure and Non-Secure firmware.
181
182The BOARD options are summarized below:
183
184+--------------------------------+-------------------------------------------+
185| BOARD                          | Description                               |
186+================================+===========================================+
187| nucleo_l552ze_q                | For building Trust Zone Disabled firmware |
188+--------------------------------+-------------------------------------------+
189| nucleo_l552ze_q/stm32l552xx/ns | For building Non-Secure firmware          |
190+--------------------------------+-------------------------------------------+
191
192Here are the instructions to build Zephyr with a non-secure configuration,
193using :zephyr:code-sample:`tfm_ipc` sample:
194
195   .. code-block:: console
196
197      $ west build -b nucleo_l552ze_q/stm32l552xx/ns samples/tfm_integration/tfm_ipc/
198
199Once done, before flashing, you need to first run a generated script that
200will set platform option bytes config and erase platform (among others,
201option bit TZEN will be set).
202
203   .. code-block:: bash
204
205      $ ./build/tfm/api_ns/regression.sh
206      $ west flash
207
208Please note that, after having run a TFM sample on the board, you will need to
209run ``./build/tfm/api_ns/regression.sh`` once more to clean up the board from secure
210options and get back the platform back to a "normal" state and be able to run
211usual, non-TFM, binaries.
212Also note that, even then, TZEN will remain set, and you will need to use
213STM32CubeProgrammer_ to disable it fully, if required.
214
215Connections and IOs
216===================
217
218Nucleo L552ZE Q Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
219input/output, pull-up, etc.
220
221Available pins:
222---------------
223.. image:: img/nucleo_l552ze_q_zio_left_2020_2_11.jpg
224   :align: center
225   :alt: Nucleo L552ZE Q Zio left connector
226.. image:: img/nucleo_l552ze_q_zio_right_2020_2_11.jpg
227   :align: center
228   :alt: Nucleo L552ZE Q Zio right connector
229
230For more details please refer to `STM32 Nucleo-144 board User Manual`_.
231
232Default Zephyr Peripheral Mapping:
233----------------------------------
234
235- UART_1_TX : PA9
236- UART_1_RX : PA10
237- UART_2_TX : PA2
238- UART_2_RX : PA3
239- UART_3_TX : PD8
240- UART_3_RX : PD9
241- I2C_1_SCL : PB6
242- I2C_1_SDA : PB7
243- SPI_1_NSS : PA4
244- SPI_1_SCK : PA5
245- SPI_1_MISO : PA6
246- SPI_1_MOSI : PA7
247- SPI_2_NSS : PB12
248- SPI_2_SCK : PB13
249- SPI_2_MISO : PB14
250- SPI_2_MOSI : PB15
251- SPI_3_NSS : PB12
252- SPI_3_SCK : PC10
253- SPI_3_MISO : PC11
254- SPI_3_MOSI : PC12
255- PWM_2_CH1 : PA0
256- USER_PB : PC13
257- LD2 : PB7
258- DAC1 : PA4
259- ADC1 : PC0
260
261System Clock
262------------
263
264Nucleo L552ZE Q System Clock could be driven by internal or external oscillator,
265as well as main PLL clock. By default System clock is driven by PLL clock at
266110MHz, driven by 4MHz medium speed internal oscillator.
267
268Serial Port
269-----------
270
271Nucleo L552ZE Q board has 6 U(S)ARTs. The Zephyr console output is assigned to
272UART2. Default settings are 115200 8N1.
273
274
275Programming and Debugging
276*************************
277
278Nucleo L552ZE Q board includes an ST-LINK/V2-1 embedded debug tool interface.
279
280Applications for the ``nucleo_l552ze_q`` board configuration can be built and
281flashed in the usual way (see :ref:`build_an_application` and
282:ref:`application_run` for more details).
283
284Flashing
285========
286
287The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
288so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
289
290Alternatively, OpenOCD or pyOCD can also be used to flash the board using
291the ``--runner`` (or ``-r``) option:
292
293.. code-block:: console
294
295   $ west flash --runner openocd
296   $ west flash --runner pyocd
297
298Support can be enabled for pyOCD by adding "pack" support with the
299following pyOCD commands:
300
301.. code-block:: console
302
303   $ pyocd pack --update
304   $ pyocd pack --install stm32l552ze
305
306Flashing an application to Nucleo L552ZE Q
307------------------------------------------
308
309Connect the Nucleo L552ZE Q to your host computer using the USB port.
310Then build and flash an application. Here is an example for the
311:zephyr:code-sample:`hello_world` application.
312
313Run a serial host program to connect with your Nucleo board:
314
315.. code-block:: console
316
317   $ minicom -D /dev/ttyACM0
318
319Then build and flash the application.
320
321.. zephyr-app-commands::
322   :zephyr-app: samples/hello_world
323   :board: nucleo_l552ze_q
324   :goals: build flash
325
326You should see the following message on the console:
327
328.. code-block:: console
329
330   Hello World! arm
331
332Debugging
333=========
334
335You can debug an application in the usual way.  Here is an example for the
336:zephyr:code-sample:`hello_world` application.
337
338.. zephyr-app-commands::
339   :zephyr-app: samples/hello_world
340   :board: nucleo_l552ze_q
341   :maybe-skip-config:
342   :goals: debug
343
344.. _Nucleo L552ZE Q website:
345   https://www.st.com/en/evaluation-tools/nucleo-l552ze-q.html
346
347.. _STM32 Nucleo-144 board User Manual:
348   https://www.st.com/resource/en/user_manual/dm00615305.pdf
349
350.. _STM32L552ZE on www.st.com:
351   https://www.st.com/en/microcontrollers/stm32l552ze.html
352
353.. _STM32L552 reference manual:
354   https://www.st.com/resource/en/reference_manual/DM00346336.pdf
355
356.. _STM32CubeProgrammer:
357   https://www.st.com/en/development-tools/stm32cubeprog.html
358