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/Zephyr-latest/dts/bindings/serial/
Dst,stm32-uart-base.yaml2 # SPDX-License-Identifier: Apache-2.0
5 description: STM32 UART-BASE
8 - name: uart-controller.yaml
9 property-blocklist:
10 - clock-frequency
11 - name: pinctrl-device.yaml
12 - name: reset-device.yaml
13 - name: uart-controller-pin-inversion.yaml
28 single-wire:
31 Enable the single wire half-duplex communication.
[all …]
/Zephyr-latest/dts/bindings/ethernet/
Dxlnx,gem.yaml3 # SPDX-License-Identifier: Apache-2.0
10 include: ethernet-controller.yaml
19 clock-frequency:
23 Specifies the base clock frequency from which the GEM's TX clock
25 clock control register in the CRL_APB. The GEM's TX clock frequency
27 which it will be adjusted at run-time. Therefore, the value of this
29 respective GEM's TX clock - by default, this is the IO PLL.
31 mdc-divider:
42 init-mdio-phy:
45 Activates the management of a PHY associated with the controller in-
[all …]
/Zephyr-latest/dts/bindings/mipi-dbi/
Dnxp,lcdic.yaml2 # SPDX-License-Identifier: Apache-2.0
5 NXP LCDIC Controller. This controller implements 8080 and SPI mode MIPI-DBI
9 include: ["mipi-dbi-controller.yaml", "pinctrl-device.yaml"]
21 nxp,swap-bytes:
24 Swap bytes while transferring on LCDIC. When set, the LCDIC will send
27 reset-gpios:
28 type: phandle-array
34 nxp,write-inactive-cycles:
42 nxp,write-active-cycles:
50 nxp,timer0-ratio:
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/Zephyr-latest/boards/nxp/mimxrt1170_evk/
Dmimxrt1170_evk_mimxrt1176_cm4_B.overlay4 * SPDX-License-Identifier: Apache-2.0
9 /delete-property/ zephyr,flash-controller;
10 /delete-property/ zephyr,code-partition;
14 /delete-property/ magn0;
15 /delete-property/ accel0;
21 /delete-node/ is25wp128@0;
25 compatible = "nxp,imx-flexspi-nor";
28 spi-max-frequency = <133000000>;
30 jedec-id = [ef 60 20];
31 erase-block-size = <4096>;
[all …]
/Zephyr-latest/drivers/ethernet/
Deth_ivshmem_queue.c4 * SPDX-License-Identifier: Apache-2.0
44 q->desc_max_len = vring_desc_len; in eth_ivshmem_queue_init()
45 q->vring_data_max_len = shmem_section_size - vring_header_size; in eth_ivshmem_queue_init()
46 q->vring_header_size = vring_header_size; in eth_ivshmem_queue_init()
47 q->tx.shmem = (void *)tx_shmem; in eth_ivshmem_queue_init()
48 q->rx.shmem = (void *)rx_shmem; in eth_ivshmem_queue_init()
51 vring_init(&q->tx.vring, vring_desc_len, q->tx.shmem, ETH_IVSHMEM_VRING_ALIGNMENT); in eth_ivshmem_queue_init()
52 vring_init(&q->rx.vring, vring_desc_len, q->rx.shmem, ETH_IVSHMEM_VRING_ALIGNMENT); in eth_ivshmem_queue_init()
54 /* Swap "used" pointers. in eth_ivshmem_queue_init()
58 struct vring_used *tmp_used = q->tx.vring.used; in eth_ivshmem_queue_init()
[all …]
Deth_xlnx_gem.c5 * SPDX-License-Identifier: Apache-2.0
8 * - Only supports 32-bit addresses in buffer descriptors, therefore
9 * the ZynqMP APU (Cortex-A53 cores) may not be fully supported.
10 * - Hardware timestamps not considered.
11 * - VLAN tags not considered.
12 * - Wake-on-LAN interrupt not supported.
13 * - Send function is not SMP-capable (due to single TX done semaphore).
14 * - Interrupt-driven PHY management not supported - polling only.
15 * - No explicit placement of the DMA memory area(s) in either a
18 * with the Cortex-R5 QEMU target or an actual R5 running without the
[all …]
/Zephyr-latest/drivers/serial/
Duart_stm32.h2 * Copyright (c) 2016 Open-RnD Sp. z o.o.
4 * SPDX-License-Identifier: Apache-2.0
38 /* enable tx/rx pin swap */
40 /* enable rx pin inversion */
42 /* enable tx pin inversion */
61 /* Device defined as wake-up source */
Duart_nrfx_uarte.c2 * Copyright (c) 2018-2021 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
136 * RX timeout is divided into time slabs, this define tells how many divisions
137 * should be made. More divisions - higher timeout accuracy and processor usage.
141 /* Size of hardware fifo in RX path. */
183 /* Flag to ensure that RX timeout won't be executed during ENDRX ISR */
194 struct uarte_async_rx rx; member
195 struct uarte_async_tx tx; member
283 (_config->flags & UARTE_CFG_FLAG_LOW_POWER))
296 ((dev->pm_base->flags & BIT(PM_DEVICE_FLAG_ISR_SAFE))), \
[all …]
/Zephyr-latest/boards/nxp/frdm_ke17z/
Dfrdm_ke17z.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "frdm_ke17z-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
16 compatible = "nxp,frdm-ke17z", "nxp,ke17z", "nxp,mke17z7";
25 pwm-led0 = &red_pwm_led;
26 pwm-led1 = &green_pwm_led;
27 pwm-led2 = &blue_pwm_led;
28 mcuboot-button0 = &user_button_0;
[all …]
/Zephyr-latest/boards/nxp/frdm_ke17z512/
Dfrdm_ke17z512.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "frdm_ke17z512-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
21 zephyr,code-partition = &slot0_partition;
22 zephyr,uart-mcumgr = &lpuart2;
24 zephyr,shell-uart = &lpuart2;
34 pwm-led0 = &red_pwm_led;
35 pwm-led1 = &green_pwm_led;
[all …]
/Zephyr-latest/doc/services/ipc/ipc_service/backends/
Dipc_service_icmsg.rst27 * If at least one of the cores uses data cache on shared memory, set the ``dcache-alignment`` value.
28 …This must be the largest value of the invalidation or the write-back size for both sides of the co…
30 * Define two memory regions and assign them to ``tx-region`` and ``rx-region``
40 Make sure that you set correct value of the ``dcache-alignment``.
46 .. code-block:: devicetree
48 reserved-memory {
49 tx: memory@20070000 {
53 rx: memory@20078000 {
60 compatible = "zephyr,ipc-icmsg";
61 dcache-alignment = <32>;
[all …]
Dipc_service_icbmsg.rst11 …ming some common problems with other backends (mostly related to multithread access and zero-copy).
18 One is reserved for the ICMsg and the other contains equal-sized blocks.
26 For the zero-copy case, this is done by the caller, otherwise, it is copied automatically.
43 * If at least one of the cores uses data cache on shared memory, set the ``dcache-alignment`` value.
44 …This must be the largest value of the invalidation or the write-back size for both sides of the co…
46 * Define two memory regions and assign them to ``tx-region`` and ``rx-region`` of an instance.
48 * Define the number of allocable blocks for each region with ``tx-blocks`` and ``rx-blocks``.
54 Make sure that you set correct value of the ``dcache-alignment``.
60 .. code-block:: devicetree
62 reserved-memory {
[all …]
/Zephyr-latest/dts/bindings/gpio/
Dsparkfun,micromod-gpio.yaml2 # SPDX-License-Identifier: Apache-2.0
8 swap between a myriad of supported boards and carriers.
12 * An 6-pin Power Supply header. No pins on this header are exposed
16 RX and TX pins. Neither of them are exposed by this binding.
24 * 12 General purpose pins (G0 - G11).
29 - 00 -> A0 PIN 34
30 - 01 -> A1 PIN 38
31 - 02 -> D0 PIN 10
32 - 03 -> D1/CAM_TRIG PIN 18
33 - 04 -> I2C_INT# PIN 16
[all …]
/Zephyr-latest/boards/nxp/mimxrt1015_evk/
Dmimxrt1015_evk.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "mimxrt1015_evk-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "NXP MIMXRT1015-EVK board";
20 mcuboot-button0 = &user_button;
28 zephyr,shell-uart = &lpuart1;
30 zephyr,flash-controller = &at25sf128a;
31 zephyr,code-partition = &slot0_partition;
32 zephyr,uart-mcumgr = &lpuart1;
[all …]
/Zephyr-latest/drivers/i2s/
Di2s_mcux_sai.c2 * Copyright 2021,2023-2024 NXP Semiconductor INC.
5 * SPDX-License-Identifier: Apache-2.0
22 #include <zephyr/dt-bindings/clock/imx_ccm.h>
52 * This indicates the Tx/Rx stream.
106 struct stream tx; member
109 struct stream rx; member
124 while (k_msgq_get(&strm->in_queue, &buffer, K_NO_WAIT) == 0) { in i2s_purge_stream_buffers()
130 while (k_msgq_get(&strm->out_queue, &buffer, K_NO_WAIT) == 0) { in i2s_purge_stream_buffers()
138 struct i2s_dev_data *dev_data = dev->data; in i2s_tx_stream_disable()
139 struct stream *strm = &dev_data->tx; in i2s_tx_stream_disable()
[all …]
/Zephyr-latest/boards/nxp/mimxrt1010_evk/
Dmimxrt1010_evk.dts3 * Copyright 2019,2023-2024 NXP
5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
11 #include "mimxrt1010_evk-pinctrl.dtsi"
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 model = "NXP MIMXRT1010-EVK board";
21 mcuboot-button0 = &user_button;
29 zephyr,shell-uart = &lpuart1;
31 zephyr,flash-controller = &at25sf128a;
32 zephyr,code-partition = &slot0_partition;
[all …]
/Zephyr-latest/boards/nxp/mimxrt1064_evk/
Dmimxrt1064_evk.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "mimxrt1064_evk-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "NXP MIMXRT1064-EVK board";
19 pwm-led0 = &green_pwm_led;
23 mcuboot-button0 = &user_button;
27 zephyr,flash-controller = &is25wp064;
29 zephyr,code-partition = &slot0_partition;
30 zephyr,uart-mcumgr = &lpuart1;
[all …]
/Zephyr-latest/boards/nxp/mimxrt685_evk/
Dmimxrt685_evk_mimxrt685s_cm33.dts2 * Copyright 2020-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/pwm/pwm.h>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 #include "mimxrt685_evk-pinctrl.dtsi"
16 model = "NXP MIMXRT685-EVK board";
25 usart-0 = &flexcomm0;
27 pwm-0 = &sc_timer;
28 pwm-led0 = &green_pwm_led;
[all …]
/Zephyr-latest/boards/nxp/mimxrt1020_evk/
Dmimxrt1020_evk.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "mimxrt1020_evk-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "NXP MIMXRT1020-EVK board";
21 mcuboot-button0 = &user_button;
25 zephyr,flash-controller = &is25lp064;
27 zephyr,code-partition = &slot0_partition;
28 zephyr,uart-mcumgr = &lpuart1;
33 zephyr,shell-uart = &lpuart1;
[all …]
/Zephyr-latest/boards/nxp/mimxrt1024_evk/
Dmimxrt1024_evk.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "mimxrt1024_evk-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "NXP MIMXRT1024-EVK board";
24 mcuboot-button0 = &user_button;
28 zephyr,flash-controller = &w25q32jvwj0;
30 zephyr,code-partition = &slot0_partition;
31 zephyr,uart-mcumgr = &lpuart1;
36 zephyr,shell-uart = &lpuart1;
[all …]
/Zephyr-latest/boards/nxp/mimxrt595_evk/
Dmimxrt595_evk_mimxrt595s_cm33.dts2 * Copyright 2022-2023, NXP
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include "mimxrt595_evk_mimxrt595s_cm33-pinctrl.dtsi"
16 model = "NXP MIMXRT595-EVK board";
25 usart-0 = &flexcomm0;
30 pwm-0 = &sc_timer;
31 dmic-dev = &dmic0;
32 mcuboot-button0 = &user_button_1;
[all …]
/Zephyr-latest/boards/nxp/mimxrt1040_evk/
Dmimxrt1040_evk.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "mimxrt1040_evk-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "NXP MIMXRT1040-EVK board";
20 pwm-0 = &flexpwm1_pwm3;
22 mcuboot-button0 = &user_button;
30 zephyr,shell-uart = &lpuart1;
32 zephyr,flash-controller = &w25q64jvssiq;
33 zephyr,code-partition = &slot0_partition;
[all …]
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/lll/
Dlll_conn.c2 * Copyright (c) 2018-2020 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
94 force_md_cnt--; \
103 (trx_cnt >= ((CONFIG_BT_BUF_ACL_TX_COUNT) - 1))) { \
167 if (lll->forced) { in lll_conn_central_is_abort_cb()
175 return -EBUSY; in lll_conn_central_is_abort_cb()
178 return -ECANCELED; in lll_conn_central_is_abort_cb()
189 if (lll->forced) { in lll_conn_peripheral_is_abort_cb()
197 return -EBUSY; in lll_conn_peripheral_is_abort_cb()
200 return -ECANCELED; in lll_conn_peripheral_is_abort_cb()
[all …]
/Zephyr-latest/subsys/net/ip/
Dnet_core.c5 * from IP stack and passing that data to applications (Rx thread).
11 * SPDX-License-Identifier: Apache-2.0
88 if (!pkt->frags) { in process_data()
89 NET_DBG("Corrupted packet (frags %p)", pkt->frags); in process_data()
111 * to re-initialize the cursor rather than updating it. in process_data()
137 uint8_t vtc_vhl = NET_IPV6_HDR(pkt)->vtc & 0xf0; in process_data()
145 NET_DBG("Unknown IP family packet (0x%x)", NET_IPV6_HDR(pkt)->vtc & 0xf0); in process_data()
183 /* Things to setup after we are able to RX and TX */
220 if (NET_IPV6_HDR(pkt)->hop_limit == 0) { in check_ip()
222 ret = -ENOMSG; /* silently drop the pkt, not an error */ in check_ip()
[all …]
/Zephyr-latest/boards/nxp/twr_ke18f/
Dtwr_ke18f.dts2 * Copyright (c) 2019-2021 Vestas Wind Systems A/S
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/clock/kinetis_scg.h>
11 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include "twr_ke18f-pinctrl.dtsi"
13 #include <zephyr/dt-bindings/input/input-event-codes.h>
27 pwm-led0 = &orange_pwm_led;
28 pwm-led1 = &yellow_pwm_led;
29 pwm-led2 = &green_pwm_led;
[all …]

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