1/*
2 * Copyright (c) 2018, NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nxp/nxp_rt1020.dtsi>
10#include "mimxrt1020_evk-pinctrl.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "NXP MIMXRT1020-EVK board";
15	compatible = "nxp,mimxrt1021";
16
17	aliases {
18		led0 = &green_led;
19		sw0 = &user_button;
20		sdhc0 = &usdhc1;
21		mcuboot-button0 = &user_button;
22	};
23
24	chosen {
25		zephyr,flash-controller = &is25lp064;
26		zephyr,flash = &is25lp064;
27		zephyr,code-partition = &slot0_partition;
28		zephyr,uart-mcumgr = &lpuart1;
29		zephyr,sram = &sdram0;
30		zephyr,itcm = &itcm;
31		zephyr,dtcm = &dtcm;
32		zephyr,console = &lpuart1;
33		zephyr,shell-uart = &lpuart1;
34	};
35
36	sdram0: memory@80000000 {
37		/* ISSI IS42S16160J-6TLI */
38		device_type = "memory";
39		reg = <0x80000000 DT_SIZE_M(32)>;
40	};
41
42	leds {
43		compatible = "gpio-leds";
44		green_led: led-1 {
45			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
46			label = "User LD1";
47		};
48	};
49
50	gpio_keys {
51		compatible = "gpio-keys";
52		user_button: button-1 {
53			label = "User SW4";
54			gpios = <&gpio5 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
55			zephyr,code = <INPUT_KEY_0>;
56		};
57	};
58
59	arduino_header: connector {
60		compatible = "arduino-header-r3";
61		#gpio-cells = <2>;
62		gpio-map-mask = <0xffffffff 0xffffffc0>;
63		gpio-map-pass-thru = <0 0x3f>;
64		gpio-map = <0 0 &gpio1 26 0>,	/* A0 */
65			   <1 0 &gpio1 27 0>,	/* A1 */
66			   <2 0 &gpio1 28 0>,	/* A2 */
67			   <3 0 &gpio1 29 0>,	/* A3 */
68			   <4 0 &gpio1 31 0>,	/* A4 */
69			   <5 0 &gpio1 30 0>,	/* A5 */
70			   <6 0 &gpio1 25 0>,	/* D0 */
71			   <7 0 &gpio1 24 0>,	/* D1 */
72			   <8 0 &gpio1 9 0>,	/* D2 */
73			   <9 0 &gpio1 7 0>,	/* D3 */
74			   <10 0 &gpio1 5 0>,	/* D4 */
75			   <11 0 &gpio1 6 0>,	/* D5 */
76			   <12 0 &gpio1 14 0>,	/* D6 */
77			   <13 0 &gpio1 22 0>,	/* D7 */
78			   <14 0 &gpio1 23 0>,	/* D8 */
79			   <15 0 &gpio1 15 0>,	/* D9 */
80			   <16 0 &gpio1 11 0>,	/* D10 */
81			   <17 0 &gpio1 12 0>,	/* D11 */
82			   <18 0 &gpio1 13 0>,	/* D12 */
83			   <19 0 &gpio1 10 0>,	/* D13 */
84			   <20 0 &gpio3 23 0>,	/* D14 */
85			   <21 0 &gpio3 22 0>;	/* D15 */
86	};
87};
88
89arduino_serial: &lpuart2 {
90	pinctrl-0 = <&pinmux_lpuart2>;
91	pinctrl-1 = <&pinmux_lpuart2_sleep>;
92	pinctrl-names = "default", "sleep";
93};
94
95&flexspi {
96	status = "okay";
97	reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(8)>;
98	is25lp064: is25lp064@0 {
99		compatible = "nxp,imx-flexspi-nor";
100		size = <67108864>;
101		reg = <0>;
102		spi-max-frequency = <104000000>;
103		status = "okay";
104		jedec-id = [9d 70 17];
105		erase-block-size = <4096>;
106		write-block-size = <1>;
107
108		partitions {
109			compatible = "fixed-partitions";
110			#address-cells = <1>;
111			#size-cells = <1>;
112			boot_partition: partition@0 {
113				label = "mcuboot";
114				reg = <0x00000000 DT_SIZE_K(128)>;
115			};
116			/* The MCUBoot swap-move algorithm uses the last 2 sectors
117			 * of the primary slot0 for swap status and move.
118			 */
119			slot0_partition: partition@20000 {
120				label = "image-0";
121				reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(8))>;
122			};
123			slot1_partition: partition@322000 {
124				label = "image-1";
125				reg = <0x00322000 DT_SIZE_M(3)>;
126			};
127			storage_partition: partition@622000 {
128				label = "storage";
129				reg = <0x00622000 (DT_SIZE_M(2) - DT_SIZE_K(136))>;
130			};
131		};
132	};
133};
134
135&enet_mac {
136	status = "okay";
137	pinctrl-0 = <&pinmux_enet>;
138	pinctrl-names = "default";
139	phy-handle = <&phy>;
140	zephyr,random-mac-address;
141	phy-connection-type = "rmii";
142};
143
144&enet_mdio {
145	status = "okay";
146	pinctrl-0 = <&pinmux_enet_mdio>;
147	pinctrl-names = "default";
148	phy: phy@0 {
149		compatible = "microchip,ksz8081";
150		reg = <0>;
151		status = "okay";
152		reset-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
153		int-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
154		microchip,interface-type = "rmii";
155	};
156};
157
158&enet_ptp_clock {
159	status = "okay";
160	pinctrl-0 = <&pinmux_ptp>;
161	pinctrl-names = "default";
162};
163
164&lpi2c1 {
165	status = "okay";
166	pinctrl-0 = <&pinmux_lpi2c1>;
167	pinctrl-names = "default";
168};
169
170&lpi2c4 {
171	status = "okay";
172	pinctrl-0 = <&pinmux_lpi2c4>;
173	pinctrl-names = "default";
174};
175
176&lpuart1 {
177	status = "okay";
178	current-speed = <115200>;
179	pinctrl-0 = <&pinmux_lpuart1>;
180	pinctrl-1 = <&pinmux_lpuart1_sleep>;
181	pinctrl-names = "default", "sleep";
182};
183
184&lpspi1 {
185	status = "okay";
186	/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
187	dmas = <&edma0 0 13>, <&edma0 1 14>;
188	dma-names = "rx", "tx";
189	pinctrl-0 = <&pinmux_lpspi1>;
190	pinctrl-names = "default";
191};
192
193zephyr_udc0: &usb1 {
194	status = "okay";
195};
196
197&usdhc1 {
198	status = "okay";
199	no-1-8-v;
200	pinctrl-0 = <&pinmux_usdhc1>;
201	pinctrl-1 = <&pinmux_usdhc1_slow>;
202	pinctrl-2 = <&pinmux_usdhc1_med>;
203	pinctrl-3 = <&pinmux_usdhc1_fast>;
204	pinctrl-names = "default", "slow", "med", "fast";
205	cd-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
206	pwr-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
207	sdmmc {
208		compatible = "zephyr,sdmmc-disk";
209		disk-name = "SD";
210		status = "okay";
211	};
212};
213
214&adc1 {
215	status = "okay";
216	pinctrl-0 = <&pinmux_adc1>;
217	pinctrl-names = "default";
218};
219
220&sai3 {
221	pinctrl-0 = <&pinmux_sai3>;
222	pinctrl-names = "default";
223};
224
225&edma0 {
226	status = "okay";
227};
228
229/* GPT and Systick are enabled. If power management is enabled, the GPT
230 * timer will be used instead of systick, as allows the core clock to
231 * be gated.
232 */
233&gpt_hw_timer {
234	status = "okay";
235};
236
237&systick {
238	status = "okay";
239};
240