1/* 2 * Copyright (c) 2020, NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/dts-v1/; 8 9#include <nxp/nxp_rt1024.dtsi> 10#include "mimxrt1024_evk-pinctrl.dtsi" 11#include <zephyr/dt-bindings/input/input-event-codes.h> 12 13/ { 14 model = "NXP MIMXRT1024-EVK board"; 15 compatible = "nxp,mimxrt1024"; 16 17 aliases { 18 led0 = &green_led; 19 sw0 = &user_button; 20 watchdog0 = &wdog0; 21 magn0 = &fxos8700; 22 accel0 = &fxos8700; 23 sdhc0 = &usdhc1; 24 mcuboot-button0 = &user_button; 25 }; 26 27 chosen { 28 zephyr,flash-controller = &w25q32jvwj0; 29 zephyr,flash = &w25q32jvwj0; 30 zephyr,code-partition = &slot0_partition; 31 zephyr,uart-mcumgr = &lpuart1; 32 zephyr,sram = &sdram0; 33 zephyr,itcm = &itcm; 34 zephyr,dtcm = &dtcm; 35 zephyr,console = &lpuart1; 36 zephyr,shell-uart = &lpuart1; 37 zephyr,canbus = &flexcan1; 38 }; 39 40 sdram0: memory@80000000 { 41 /* ISSI IS42S16160J-6TLI */ 42 device_type = "memory"; 43 reg = <0x80000000 DT_SIZE_M(32)>; 44 }; 45 46 leds { 47 compatible = "gpio-leds"; 48 green_led: led-1 { 49 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; 50 label = "User LD1"; 51 }; 52 }; 53 54 gpio_keys { 55 compatible = "gpio-keys"; 56 user_button: button-1 { 57 label = "User SW4"; 58 gpios = <&gpio5 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; 59 zephyr,code = <INPUT_KEY_0>; 60 }; 61 }; 62 63 arduino_header: connector { 64 compatible = "arduino-header-r3"; 65 #gpio-cells = <2>; 66 gpio-map-mask = <0xffffffff 0xffffffc0>; 67 gpio-map-pass-thru = <0 0x3f>; 68 gpio-map = <0 0 &gpio1 26 0>, /* A0 */ 69 <1 0 &gpio1 27 0>, /* A1 */ 70 <2 0 &gpio1 28 0>, /* A2 */ 71 <3 0 &gpio1 29 0>, /* A3 */ 72 <4 0 &gpio1 31 0>, /* A4 */ 73 <5 0 &gpio1 30 0>, /* A5 */ 74 <6 0 &gpio1 25 0>, /* D0 */ 75 <7 0 &gpio1 24 0>, /* D1 */ 76 <8 0 &gpio1 9 0>, /* D2 */ 77 <9 0 &gpio1 7 0>, /* D3 */ 78 <10 0 &gpio1 5 0>, /* D4 */ 79 <11 0 &gpio1 6 0>, /* D5 */ 80 <12 0 &gpio1 14 0>, /* D6 */ 81 <13 0 &gpio1 22 0>, /* D7 */ 82 <14 0 &gpio1 23 0>, /* D8 */ 83 <15 0 &gpio1 15 0>, /* D9 */ 84 <16 0 &gpio1 11 0>, /* D10 */ 85 <17 0 &gpio1 12 0>, /* D11 */ 86 <18 0 &gpio1 13 0>, /* D12 */ 87 <19 0 &gpio1 10 0>, /* D13 */ 88 <20 0 &gpio3 23 0>, /* D14 */ 89 <21 0 &gpio3 22 0>; /* D15 */ 90 }; 91}; 92 93arduino_serial: &lpuart2 { 94 pinctrl-0 = <&pinmux_lpuart2>; 95 pinctrl-1 = <&pinmux_lpuart2_sleep>; 96 pinctrl-names = "default", "sleep"; 97}; 98 99&w25q32jvwj0 { 100 status = "okay"; 101 partitions { 102 compatible = "fixed-partitions"; 103 #address-cells = <1>; 104 #size-cells = <1>; 105 boot_partition: partition@0 { 106 label = "mcuboot"; 107 reg = <0x00000000 DT_SIZE_K(128)>; 108 }; 109 /* The MCUBoot swap-move algorithm uses the last 2 sectors 110 * of the primary slot0 for swap status and move. 111 */ 112 slot0_partition: partition@20000 { 113 label = "image-0"; 114 reg = <0x00020000 (DT_SIZE_K(1920) + DT_SIZE_K(8))>; 115 }; 116 slot1_partition: partition@202000 { 117 label = "image-1"; 118 reg = <0x00202000 DT_SIZE_K(1920)>; 119 }; 120 storage_partition: partition@3E2000 { 121 label = "storage"; 122 reg = <0x003E2000 DT_SIZE_K(120)>; 123 }; 124 }; 125}; 126 127&enet_mac { 128 status = "okay"; 129 pinctrl-0 = <&pinmux_enet>; 130 pinctrl-names = "default"; 131 phy-handle = <&phy>; 132 zephyr,random-mac-address; 133 phy-connection-type = "rmii"; 134}; 135 136&enet_mdio { 137 status = "okay"; 138 pinctrl-0 = <&pinmux_enet_mdio>; 139 pinctrl-names = "default"; 140 phy: phy@0 { 141 compatible = "microchip,ksz8081"; 142 reg = <0>; 143 status = "okay"; 144 reset-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 145 int-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; 146 microchip,interface-type = "rmii"; 147 }; 148}; 149 150&enet_ptp_clock { 151 status = "okay"; 152 pinctrl-0 = <&pinmux_ptp>; 153 pinctrl-names = "default"; 154}; 155 156&lpuart1 { 157 status = "okay"; 158 current-speed = <115200>; 159 pinctrl-0 = <&pinmux_lpuart1>; 160 pinctrl-1 = <&pinmux_lpuart1_sleep>; 161 pinctrl-names = "default", "sleep"; 162}; 163 164&lpuart2 { 165 pinctrl-0 = <&pinmux_lpuart2>; 166 pinctrl-1 = <&pinmux_lpuart2_sleep>; 167 pinctrl-names = "default", "sleep"; 168}; 169 170&flexcan1 { 171 status = "okay"; 172 pinctrl-0 = <&pinmux_flexcan1>; 173 pinctrl-names = "default"; 174 175 can-transceiver { 176 max-bitrate = <5000000>; 177 }; 178}; 179 180&wdog0 { 181 status = "okay"; 182}; 183 184&lpi2c4 { 185 status = "okay"; 186 pinctrl-0 = <&pinmux_lpi2c4>; 187 pinctrl-names = "default"; 188 scl-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; 189 sda-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 190 191 fxos8700: fxos8700@1f { 192 compatible = "nxp,fxos8700"; 193 reg = <0x1f>; 194 }; 195}; 196 197&edma0 { 198 status = "okay"; 199}; 200 201&lpspi1 { 202 status = "okay"; 203 /* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */ 204 dmas = <&edma0 0 13>, <&edma0 1 14>; 205 dma-names = "rx", "tx"; 206 pinctrl-0 = <&pinmux_lpspi1>; 207 pinctrl-names = "default"; 208}; 209 210&adc1 { 211 status = "okay"; 212 pinctrl-0 = <&pinmux_adc1>; 213 pinctrl-names = "default"; 214}; 215 216/* GPT and Systick are enabled. If power management is enabled, the GPT 217 * timer will be used instead of systick, as allows the core clock to 218 * be gated. 219 */ 220&gpt_hw_timer { 221 status = "okay"; 222}; 223 224&systick { 225 status = "okay"; 226}; 227 228zephyr_udc0: &usb1 { 229 status = "okay"; 230}; 231 232&usdhc1 { 233 status = "okay"; 234 pinctrl-0 = <&pinmux_usdhc1>; 235 pinctrl-1 = <&pinmux_usdhc1_slow>; 236 pinctrl-2 = <&pinmux_usdhc1_med>; 237 pinctrl-3 = <&pinmux_usdhc1_fast>; 238 pinctrl-names = "default", "slow", "med", "fast"; 239 cd-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 240 pwr-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>; 241 no-1-8-v; 242 sdmmc { 243 compatible = "zephyr,sdmmc-disk"; 244 disk-name = "SD"; 245 status = "okay"; 246 }; 247}; 248