1# Copyright 2023 NXP 2# SPDX-License-Identifier: Apache-2.0 3 4description: | 5 NXP LCDIC Controller. This controller implements 8080 and SPI mode MIPI-DBI 6 compliant transfers. 7compatible: "nxp,lcdic" 8 9include: ["mipi-dbi-controller.yaml", "pinctrl-device.yaml"] 10 11properties: 12 reg: 13 required: true 14 15 interrupts: 16 required: true 17 18 clocks: 19 required: true 20 21 nxp,swap-bytes: 22 type: boolean 23 description: | 24 Swap bytes while transferring on LCDIC. When set, the LCDIC will send 25 the most significant byte first when using multibyte pixel formats. 26 27 reset-gpios: 28 type: phandle-array 29 description: | 30 Reset GPIO pin. The controller will set this pin to logic high to reset 31 the display. If not provided, the LCDIC module's reset pin will be used 32 to reset attached displays. 33 34 nxp,write-inactive-cycles: 35 type: int 36 default: 6 37 description: | 38 Set minimum count of write inactive cycles, as a multiple of the module 39 clock frequency. This controls the length of the inactive period of the 40 WRX signal. Default is IP reset value. Only valid in 8080 mode. 41 42 nxp,write-active-cycles: 43 type: int 44 default: 6 45 description: | 46 Set minimum count of write active cycles, as a multiple of the module 47 clock frequency. This controls the length of the active period of the 48 WRX signal. Default is IP reset value. Only valid in 8080 mode. 49 50 nxp,timer0-ratio: 51 type: int 52 default: 8 53 description: | 54 Ratio for timer0, used for setting timer0 period (which is used for reset 55 and TX/RX short command timeout). Formula is: 56 timer0_period = (2 ^ timer0_ratio) / lcdic_freq 57 Default is IP reset value 58 59 nxp,timer1-ratio: 60 type: int 61 default: 9 62 description: | 63 Ratio for timer1, used for setting timer1 period (which is used for TE 64 wait time, timeout, and long command timeout). Formula is: 65 timer1_period = (2 ^ timer1_ratio) * timer0_period 66 Default is IP reset value 67