1/*
2 * Copyright 2019,2023 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nxp/nxp_rt1015.dtsi>
10#include "mimxrt1015_evk-pinctrl.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "NXP MIMXRT1015-EVK board";
15	compatible = "nxp,mimxrt1015";
16
17	aliases {
18		led0 = &green_led;
19		sw0 = &user_button;
20		mcuboot-button0 = &user_button;
21	};
22
23	chosen {
24		zephyr,sram = &ocram;
25		zephyr,itcm = &itcm;
26		zephyr,dtcm = &dtcm;
27		zephyr,console = &lpuart1;
28		zephyr,shell-uart = &lpuart1;
29		zephyr,flash = &at25sf128a;
30		zephyr,flash-controller = &at25sf128a;
31		zephyr,code-partition = &slot0_partition;
32		zephyr,uart-mcumgr = &lpuart1;
33	};
34
35	leds {
36		compatible = "gpio-leds";
37		green_led: led-1 {
38			gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
39			label = "User LD1";
40		};
41	};
42
43	gpio_keys {
44		compatible = "gpio-keys";
45		user_button: button-1 {
46			label = "User SW4";
47			gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
48			zephyr,code = <INPUT_KEY_0>;
49		};
50	};
51
52	arduino_header: connector {
53		compatible = "arduino-header-r3";
54		#gpio-cells = <2>;
55		gpio-map-mask = <0xffffffff 0xffffffc0>;
56		gpio-map-pass-thru = <0 0x3f>;
57		gpio-map = <0 0 &gpio1 29 0>,	/* A0 */
58			   <1 0 &gpio1 14 0>,	/* A1 */
59			   <2 0 &gpio1 28 0>,	/* A2 */
60			   <3 0 &gpio1 26 0>,	/* A3 */
61			   <4 0 &gpio1 31 0>,	/* A4 */
62			   <5 0 &gpio1 30 0>,	/* A5 */
63			   <6 0 &gpio3 1 0>,	/* D0 */
64			   <7 0 &gpio3 0 0>,	/* D1 */
65			   <8 0 &gpio2 20 0>,	/* D2 */
66			   <9 0 &gpio2 26 0>,	/* D3 */
67			   <10 0 &gpio3 2 0>,	/* D4 */
68			   <11 0 &gpio2 27 0>,	/* D5 */
69			   <12 0 &gpio1 27 0>,	/* D6 */
70			   <13 0 &gpio1 15 0>,	/* D7 */
71			   <14 0 &gpio2 21 0>,	/* D8 */
72			   <15 0 &gpio2 22 0>,	/* D9 */
73			   <16 0 &gpio1 11 0>,	/* D10 */
74			   <17 0 &gpio1 12 0>,	/* D11 */
75			   <18 0 &gpio1 13 0>,	/* D12 */
76			   <19 0 &gpio1 10 0>,	/* D13 */
77			   <20 0 &gpio1 31 0>,	/* D14 */
78			   <21 0 &gpio1 30 0>;	/* D15 */
79	};
80};
81
82arduino_serial: &lpuart4 {
83	pinctrl-0 = <&pinmux_lpuart4>;
84	pinctrl-1 = <&pinmux_lpuart4_sleep>;
85	pinctrl-names = "default", "sleep";
86};
87
88&flexspi {
89	status = "okay";
90	reg = <0x402a8000 0x4000>, <0x60000000 DT_SIZE_M(16)>;
91	at25sf128a: at25sf128a@0 {
92		compatible = "nxp,imx-flexspi-nor";
93		size = <DT_SIZE_M(16 * 8)>;
94		reg = <0>;
95		spi-max-frequency = <133000000>;
96		status = "okay";
97		jedec-id = [1f 89 01];
98		erase-block-size = <4096>;
99		write-block-size = <1>;
100
101		partitions {
102			compatible = "fixed-partitions";
103			#address-cells = <1>;
104			#size-cells = <1>;
105			boot_partition: partition@0 {
106				label = "mcuboot";
107				reg = <0x00000000 DT_SIZE_K(128)>;
108			};
109			/* The MCUBoot swap-move algorithm uses the last 3 sectors
110			 * of the primary slot0 for swap status and move.
111			 */
112			slot0_partition: partition@20000 {
113				label = "image-0";
114				reg = <0x00020000 (DT_SIZE_M(7) + DT_SIZE_K(12))>;
115			};
116			slot1_partition: partition@723000 {
117				label = "image-1";
118				reg = <0x00723000 DT_SIZE_M(7)>;
119			};
120			storage_partition: partition@E23000 {
121				label = "storage";
122				reg = <0x00E23000 (DT_SIZE_M(2) - DT_SIZE_K(140))>;
123			};
124		};
125	};
126};
127
128&lpi2c1 {
129	status = "okay";
130	pinctrl-0 = <&pinmux_lpi2c1>;
131	pinctrl-names = "default";
132};
133
134&lpuart1 {
135	status = "okay";
136	current-speed = <115200>;
137	pinctrl-0 = <&pinmux_lpuart1>;
138	pinctrl-1 = <&pinmux_lpuart1_sleep>;
139	pinctrl-names = "default", "sleep";
140};
141
142&lpspi1 {
143	status = "okay";
144	/* DMA channels 0 and 1, muxed to LPSPI1 RX and TX */
145	dmas = <&edma0 0 13>, <&edma0 1 14>;
146	dma-names = "rx", "tx";
147	pinctrl-0 = <&pinmux_lpspi1>;
148	pinctrl-names = "default";
149};
150
151zephyr_udc0: &usb1 {
152	status = "okay";
153};
154
155&adc1 {
156	status = "okay";
157	pinctrl-0 = <&pinmux_adc1>;
158	pinctrl-names = "default";
159};
160
161&edma0 {
162	status = "okay";
163};
164
165&sai1 {
166	pinctrl-0 = <&pinmux_sai1>;
167	pinctrl-names = "default";
168};
169
170/* GPT and Systick are enabled. If power management is enabled, the GPT
171 * timer will be used instead of systick, as allows the core clock to
172 * be gated.
173 */
174&gpt_hw_timer {
175	status = "okay";
176};
177
178&systick {
179	status = "okay";
180};
181