1# Copyright (c) 2020 STMICROELECTRONICS
2# SPDX-License-Identifier: Apache-2.0
3
4# Common fields for STM32 UART peripherals.
5description: STM32 UART-BASE
6
7include:
8  - name: uart-controller.yaml
9    property-blocklist:
10      - clock-frequency
11  - name: pinctrl-device.yaml
12  - name: reset-device.yaml
13  - name: uart-controller-pin-inversion.yaml
14
15properties:
16  reg:
17    required: true
18
19  clocks:
20    required: true
21
22  resets:
23    required: true
24
25  interrupts:
26    required: true
27
28  single-wire:
29    type: boolean
30    description: |
31      Enable the single wire half-duplex communication.
32      Using this mode, TX and RX lines are internally connected and
33      only TX pin is used afterwards and should be configured.
34      RX/TX conflicts must be handled on user side.
35
36  tx-rx-swap:
37    type: boolean
38    description:
39      Swap the TX and RX pins. Used in case of a cross wired connection.
40
41  pinctrl-0:
42    required: true
43
44  pinctrl-names:
45    required: true
46
47  wakeup-line:
48    type: int
49    description: |
50      EXTI line number matching the device wakeup interrupt mask register.
51      This property is required on stm32 devices where the wakeup interrupt signal could be
52      configured masked at boot (sm32wl55 for instance), preventing the device to wakeup
53      the core from stop mode(s).
54      Valid range: 0 - 31
55
56  de-enable:
57    type: boolean
58    description: |
59      Enable activating an external transeiver through the DE pin which must also be configured
60      using pinctrl.
61
62  de-assert-time:
63    type: int
64    default: 0
65    description: |
66      Defines the time between the activation of the DE signal and the beginning of the start bit.
67      It is expressed in 16th of a bit time.
68      Valid range: 0 - 31
69
70  de-deassert-time:
71    type: int
72    default: 0
73    description: |
74      Defines the time between the activation of the DE signal and the beginning of the start bit.
75      It is expressed in 16th of a bit time.
76      Valid range: 0 - 31
77
78  de-invert:
79    type: boolean
80    description: |
81      Invert the binary logic of the de pin. When enabled, physical logic levels are inverted and
82      we use 1=Low, 0=High instead of 1=High, 0=Low.
83
84  fifo-enable:
85    type: boolean
86    description: |
87      Enables transmit and receive FIFO using default FIFO configuration (typically threshold is
88      set to 1/8).
89      In TX, FIFO allows to work in burst mode, easing scheduling of loaded applications. It also
90      allows more reliable communication with UART devices sensitive to variation of inter-frames
91      delays.
92      In RX, FIFO reduces overrun occurrences.
93