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/Zephyr-latest/dts/bindings/power/
Dnxp,aon-wakeup-pin.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,aon-wakeup-pin"
16 wakeup-level:
19 - "low"
20 - "high"
21 default: "high"
23 Wakeup level on the pin, default is wakeup on high level
/Zephyr-latest/dts/bindings/usb/
Dnxp,usbphy.yaml2 # SPDX-License-Identifier: Apache-2.0
5 NXP USB high speed phy that is used on NXP RTxxxx, RTxxx, MCX, LPC and Kinetis
6 platforms if high speed usb is supported on these platforms.
14 tx-d-cal:
18 It is board level's value that is used to trim the nominal 17.78mA
19 current source for the High Speed TX drivers on USB_DP and USB_DM.
21 tx-cal-45-dp-ohms:
25 It is board level's value that is used to trim the nominal 17.78mA
26 current source for the High Speed TX drivers on USB_DP and USB_DM.
28 tx-cal-45-dm-ohms:
[all …]
/Zephyr-latest/dts/bindings/gpio/
Dzephyr,gpio-emul.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "zephyr,gpio-emul"
8 include: [gpio-controller.yaml, base.yaml]
11 rising-edge:
15 falling-edge:
19 high-level:
20 description: Enables support for high level interrupt detection
23 low-level:
24 description: Enables support for low level interrupt detection
27 "#gpio-cells":
[all …]
/Zephyr-latest/dts/bindings/pinctrl/
Dnuvoton,npcx-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
10 - bias-pull-down: Enable pull-down resistor.
11 - bias-pull-up: Enable pull-up resistor.
12 - drive-open-drain: Output driver is open-drain.
15 - pinmux-locked: Lock pinmux configuration for peripheral device
16 - pinmux-gpio: Inverse pinmux back to gpio
17 - psl-in-mode: Select the assertion detection mode of PSL input
18 - psl-in-pol: Select the assertion detection polarity of PSL input
20 An example for NPCX7 family, include the chip level pinctrl DTSI file in the
21 board level DTS:
[all …]
Dnxp,mcux-rt11xx-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
15 drive-strength = "high";
16 slew-rate = "slow";
20 Both pins will be configured with a weak latch, high drive strength,
22 Note that the soc level iomuxc dts file can be examined to find the possible
25 drive-open-drain: ODE/ODE_LPSR=1
26 input-enable: SION=1 (in SW_MUX_CTL_PAD register)
27 bias-pull-down: PUE=1, PUS=0
28 bias-pull-up: PUE=1, PUS=1
29 bias-disable: PULL=11 (in supported registers)
[all …]
Dpincfg-node.yaml2 # SPDX-License-Identifier: Apache-2.0
16 https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml
19 bias-disable:
23 bias-high-impedance:
25 description: high impedance mode ("third-state", "floating")
27 bias-bus-hold:
31 bias-pull-up:
33 description: enable pull-up resistor
35 bias-pull-down:
37 description: enable pull-down resistor
[all …]
Dene,kb1200-pinctrl.yaml1 # SPDX-License-Identifier: Apache-2.0
9 - bias-disable: Disable pull-up/down resistor.
10 - bias-pull-up: Enable pull-up resistor.
11 - bias-pull-down: Enable pull-down resistor.
12 - drive-push-pull: Output driver is push-pull.
13 - drive-open-drain: Output driver is open-drain.
14 - output-disable: Disable GPIO output driver data
15 - output-enable: Ensable GPIO output driver data
16 - output-high: GPIO output data high
17 - output-low: GPIO output data low
[all …]
Dite,it8xxx2-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
20 /* You can put this in places like a board-pinctrl.dtsi file in
24 /* include pre-defined pins and functions for the SoC used by the board */
25 #include <dt-bindings/pinctrl/it8xxx2-pinctrl.h>
31 gpio-voltage = "1p8";
35 gpio-voltage = "1v8";
40 bias-pull-up;
51 To link pin configurations with a device, use a pinctrl-N property for some
54 #include "board-pinctrl.dtsi"
57 pinctrl-0 = <&uart1_rx_pb0_default &uart1_tx_pb1_default>;
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Dmicrochip,xec-pinctrl.yaml3 # SPDX-License-Identifier: Apache-2.0
7 Based on pincfg-node.yaml binding.
23 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
26 - bias-disable: Disable pull-up/down (default behavior, not required).
27 - bias-pull-down: Enable pull-down resistor.
28 - bias-pull-up: Enable pull-up resistor.
29 - drive-push-pull: Output driver is push-pull (default, not required).
30 - drive-open-drain: Output driver is open-drain.
31 - output-high: Set output state high when pin configured.
32 - output-low: Set output state low when pin configured.
[all …]
Dmicrochip,mec5-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
6 Based on pincfg-node.yaml binding.
22 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
25 - bias-disable: Disable pull-up/down (default behavior, not required).
26 - bias-pull-down: Enable pull-down resistor.
27 - bias-pull-up: Enable pull-up resistor.
28 - drive-push-pull: Output driver is push-pull (default, not required).
29 - drive-open-drain: Output driver is open-drain.
30 - output-high: Set output state high when pin configured.
31 - output-low: Set output state low when pin configured.
[all …]
/Zephyr-latest/dts/bindings/i2c/
Datmel,sam-i2c-twim.yaml1 # Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
2 # SPDX-License-Identifier: Apache-2.0
7 The Atmel Two-wire Master Interface (TWIM) interconnects components on a
8 unique two-wire bus, made up of one clock line and one data line with speeds
9 of up to 3.4 Mbit/s, based on a byte-oriented transfer format. The TWIM is
20 std-clk-slew-lim = <0>;
21 std-clk-strength-low = "0.5";
22 std-data-slew-lim = <0>;
23 std-data-strength-low = "0.5";
25 hs-clk-slew-lim = <0>;
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/Zephyr-latest/include/zephyr/dt-bindings/gpio/
Dnordic-nrf-gpio.h4 * SPDX-License-Identifier: Apache-2.0
10 * @brief nRF-specific GPIO Flags
11 * @defgroup gpio_interface_nrf nRF-specific GPIO Flags
20 * Standard (S) or High (H) drive modes can be applied to both pin levels, 0 or
21 * 1. High drive mode will increase current capabilities of the pin (refer to
24 * When the pin is configured to operate in open-drain mode (wired-and), the
25 * drive mode can only be selected for the 0 level (1 is disconnected).
26 * Similarly, when the pin is configured to operate in open-source mode
27 * (wired-or), the drive mode can only be set for the 1 level
33 * - Bit 8: Drive mode for '0' (0=Standard, 1=High)
[all …]
/Zephyr-latest/dts/bindings/spi/
Dnordic,nrf-spi-common.yaml2 # SPDX-License-Identifier: Apache-2.0
6 include: [spi-controller.yaml, pinctrl-device.yaml, nordic-clockpin.yaml]
15 pinctrl-0:
18 pinctrl-names:
21 max-frequency:
26 property must be set at SoC level DTS files.
28 overrun-character:
31 Configurable, defaults to 0xff (line high), the most common value used
34 easydma-maxcnt-bits:
39 property must be set at SoC level DTS files.
[all …]
/Zephyr-latest/samples/subsys/tracing/
Dgpio.overlay4 * SPDX-License-Identifier: Apache-2.0
10 compatible = "zephyr,gpio-emul";
11 rising-edge;
12 falling-edge;
13 high-level;
14 low-level;
15 gpio-controller;
16 #gpio-cells = < 0x2 >;
/Zephyr-latest/tests/drivers/gpio/gpio_basic_api/src/
Dtest_gpio_port.c5 * SPDX-License-Identifier: Apache-2.0
10 #define ALL_BITS ((gpio_port_value_t)-1)
15 /* Short-hand for a checked read of PIN_IN raw state */
30 /* Short-hand for a checked read of PIN_IN logical state */
45 /* Short-hand for a checked write of PIN_OUT raw state */
59 /* Short-hand for a checked write of PIN_OUT logic state */
81 TC_PRINT("Validate device %s and %s\n", dev_in->name, dev_out->name); in setup()
84 TC_PRINT("Check %s output %d connected to %s input %d\n", dev_out->name, PIN_OUT, in setup()
85 dev_in->name, PIN_IN); in setup()
99 TC_PRINT("FATAL output pin not wired to input pin? (out low => in high)\n"); in setup()
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/Zephyr-latest/doc/build/dts/
Dindex.rst9 - to describe hardware to the :ref:`device_model_api`
10 - to provide that hardware's initial configuration
12 This page links to a high level guide on devicetree as well as reference
15 .. _dt-guide:
20 The pages in this section are a high-level guide to using devicetree for Zephyr
29 api-usage.rst
31 zephyr-user-node.rst
34 dt-vs-kconfig.rst
36 .. _dt-reference:
42 built-in bindings.
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/Zephyr-latest/doc/project/
Dproposals.rst1 .. _feature-tracking:
44 - Label new features requests as ``feature-request``
45 - The TSC discusses new ``feature-request`` items regularly and triages them.
50 - High = Next milestone
51 - Medium = As soon as possible
52 - Low = Best effort
54 - After the initial discussion and triaging, the label is moved from
55 ``feature-request`` to ``feature`` with the target milestone and an assignee.
57 All items marked as ``feature-request`` are non-binding and those without an
68 communicates the high-level overview of a project's strategy, while a release
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/Zephyr-latest/dts/bindings/sdhc/
Dnxp,imx-usdhc.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nxp,imx-usdhc"
8 include: [sdhc.yaml, pinctrl-device.yaml]
14 data-timeout:
20 read-watermark:
24 Number of words used as read watermark level in FIFO queue for USDHC
26 write-watermark:
30 Number of words used as write watermark level in FIFO queue for USDHC
41 pwr-gpios:
42 type: phandle-array
[all …]
/Zephyr-latest/dts/bindings/input/
Despressif,esp32-touch-sensor.yaml2 # SPDX-License-Identifier: Apache-2.0
8 sensor is defined in a child node of the touch-sensor node and defines a specific key
13 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 #include <zephyr/dt-bindings/input/esp32-touch-sensor-input.h>
17 compatible = "espressif,esp32-touch";
20 debounce-interval-ms = <30>;
21 href-microvolt = <27000000>;
22 lref-microvolt = <500000>;
23 href-atten-microvolt = <1000000>;
24 filter-mode = <ESP32_TOUCH_FILTER_MODE_IIR_16>;
[all …]
/Zephyr-latest/subsys/emul/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
20 too high, or may return invalid measurements if calibration has not
21 yet been completed. This allows for testing that high-level code can
34 module-str = emul
/Zephyr-latest/include/zephyr/drivers/
Dgpio.h2 * Copyright (c) 2019-2020 Nordic Semiconductor ASA
5 * Copyright (c) 2015-2016 Intel Corporation.
7 * SPDX-License-Identifier: Apache-2.0
27 #include <zephyr/dt-bindings/gpio/gpio.h>
61 /* Initializes output to a high state. */
64 /* Initializes output based on logic level */
71 /** Configures GPIO pin as output and initializes it to a high state. */
87 * interrupts. The interrupts can be sensitive to pin physical or logical level.
88 * Interrupts sensitive to pin logical level take into account GPIO_ACTIVE_LOW
89 * flag. If a pin was configured as Active Low, physical level low will be
[all …]
/Zephyr-latest/doc/hardware/peripherals/can/
Dtransceiver.rst13 A CAN transceiver is an external device that converts the logic level signals
14 from the CAN controller to the bus-levels. The bus lines are called
15 CAN High (CAN H) and CAN Low (CAN L).
18 These wires use the logic levels whereas the bus-level is interpreted
22 the same voltage level. This state is also the idle state.
23 To write a dominant bit to the bus, open-drain transistors tie CAN H to Vdd
25 The first and last node use a 120-ohm resistor between CAN H and CAN L to
27 This structure is called a wired-AND.
/Zephyr-latest/dts/bindings/sensor/
Dnxp,lpcmp.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: NXP low-power analog comparator (LPCMP)
8 include: [sensor-device.yaml, pinctrl-device.yaml]
17 enable-output-pin:
22 use-unfiltered-output:
27 enable-output-invert:
32 hysteresis-level:
35 - 0
36 - 1
37 - 2
[all …]
/Zephyr-latest/dts/bindings/video/
Dst,stm32-dcmi.yaml4 # SPDX-License-Identifier: Apache-2.0
9 Example of node configuration at board level:
14 pinctrl-0 = <&dcmi_hsync_pa4 &dcmi_pixclk_pa6 &dcmi_vsync_pb7
17 pinctrl-names = "default";
18 bus-width = <8>;
19 hsync-active = <0>;
20 vsync-active = <0>;
21 pixelclk-active = <1>;
22 capture-rate = <1>;
29 remote-endpoint = <&ov2640_ep_out>;
[all …]
/Zephyr-latest/dts/bindings/mfd/
Dnordic,npm2100.yaml2 # SPDX-License-Identifier: Apache-2.0
8 include: i2c-device.yaml
14 host-int-gpios:
15 type: phandle-array
18 host-int-type:
21 - "edge"
22 - "level"
25 Using interrupt level triggering instead of edge triggering
28 pmic-int-pin:
31 - 0
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