Lines Matching +full:high +full:- +full:level

2 # SPDX-License-Identifier: Apache-2.0
15       drive-strength = "high";
16       slew-rate = "slow";
20   Both pins will be configured with a weak latch, high drive strength,
22   Note that the soc level iomuxc dts file can be examined to find the possible
25   drive-open-drain: ODE/ODE_LPSR=1
26   input-enable: SION=1 (in SW_MUX_CTL_PAD register)
27   bias-pull-down: PUE=1, PUS=0
28   bias-pull-up: PUE=1, PUS=1
29   bias-disable: PULL=11 (in supported registers)
30   slew-rate: SRE=<enum_idx>
31   drive-strength: DSE=<enum_idx>
47 compatible: "nxp,mcux-rt11xx-pinctrl"
51 child-binding:
53   child-binding:
58       - name: pincfg-node.yaml
59         property-allowlist:
60           - drive-open-drain
61           - input-enable
62           - bias-disable
63           - bias-pull-down
64           - bias-pull-up
71           Pin mux selections for this group. See the soc level iomuxc DTSI file
73       drive-strength:
76           - "normal"
77           - "high"
80           0 (normal) - sets pin to normal drive strength
81           1 (high) - sets pin to high drive strength
82       slew-rate:
85           - "fast"
86           - "slow"