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/Zephyr-latest/scripts/west_commands/runners/
Ddediprog.py4 # SPDX-License-Identifier: Apache-2.0
14 DEFAULT_MAX_RETRIES = 3
17 '''Runner front-end for DediProg (dpcmd).'''
19 def __init__(self, cfg, spi_image, vcc, retries): argument
22 self.vcc = vcc
35 parser.add_argument('--spi-image', required=True,
37 parser.add_argument('--vcc',
38 help='VCC (0=3.5V, 1=2.5V, 2=1.8V)')
39 parser.add_argument('--retries', default=5,
46 vcc=args.vcc,
[all …]
/Zephyr-latest/dts/bindings/gpio/
Dstemma-qt-connector.yaml2 # SPDX-License-Identifier: Apache-2.0
5 STEMMA QT is a 4-pin JST-SH connector for I2C devices.
10 - VCC (3-5V)
11 - GND
14 but the connector form and VCC voltage are different.
16 …https://learn.adafruit.com/introducing-adafruit-stemma-qt/stemma-qt-comparison#quick-comparison-30…
18 compatible: "stemma-qt-connector"
20 include: [gpio-nexus.yaml, base.yaml]
Darduino-mkr-header.yaml2 # SPDX-License-Identifier: Apache-2.0
9 * One side of the 14-pin header is analog inputs and digital signals.
12 D0-D5 is a digital output.
13 * The other side 14-pin header is power supplies and peripheral interface.
14 There are 5V and VCC power supply, GND, and RESET pin. UART, I2C,
21 - AREF 5V -
22 15 A0/D15/DAC0 VIN -
23 16 A1/D16 VCC -
24 17 A2/D17 GND -
25 18 A3/D18 RESET -
[all …]
Dnxp,lcd-8080.yaml2 # SPDX-License-Identifier: Apache-2.0
5 compatible: "nxp,lcd-8080"
8 GPIO pins exposed on NXP LCD 8080 interface (e.g., used on LCD-PAR-035 panel).
15 3 Not connected
17 5 VCC
29 17-32 LCD 8080 interface D0 - D15
31 include: [gpio-nexus.yaml, base.yaml]
Dsparkfun-pro-micro-header.yaml2 # SPDX-License-Identifier: Apache-2.0
10 Proceeding counter-clockwise:
11 * A 12-pin Power and Digital Input header. This has input signals
13 * An 12-pin Power and Digital/Analog Input header. This
15 non-monotonically decreasing numbering.
19 1 D1/TXO RAW -
20 0 D0/RXI GND -
21 - GND RST -
22 - GND VCC -
24 3 D3 D20/A2 20
[all …]
/Zephyr-latest/tests/boards/mec172xevb_assy6906/i2c_api/
DREADME.txt17 * JP49 1-2 Connected Connect PCA9555 VCC to +3.3V_STBY
18 * JP53 1-2 Connected Select address 0100b, which means 0x26
19 * JP12 13-14 Connected Connect I2C01_SDA from CPU to header J20
20 * JP12 4-5 Connected Connect I2C01_SCL from CPU to header J20
22 * JP77 7-8 Connected External pull-up for I2C01_SDA
23 * JP77 9-10 Connected External pull-up for I2C01_SCL
26 * JP58.3 J20.3 Connected Connect NXP PCA95xx to I2C01
/Zephyr-latest/soc/ene/kb1200/reg/
Dgcfg.h4 * SPDX-License-Identifier: Apache-2.0
21 volatile uint8_t VCCSTA; /*VCC Status Register */
22 volatile uint8_t Reserved1[3]; /*Reserved */
28 volatile uint8_t Reserved4[3]; /*Reserved */
33 volatile uint8_t Reserved6[3]; /*Reserved */
35 volatile uint8_t Reserved7[3]; /*Reserved */
38 volatile uint8_t Reserved8[3]; /*Reserved */
/Zephyr-latest/samples/sensor/tmp116/
DREADME.rst29 * Breakout **GND** pin <--> Nucleo **GND** pin
30 * Breakout **VCC** pin <--> Nucleo **3V3** pin
31 * Breakout **SDA** pin <--> Nucleo **CN5-D14** pin
32 * Breakout **SCL** pin <--> Nucleo **CN5-D15** pin
40 .. zephyr-app-commands::
41 :zephyr-app: samples/sensor/tmp116
58 .. code-block:: console
60 Device TMP116 - 0x200010a8 is ready
/Zephyr-latest/dts/bindings/sensor/
Dti,tmag5273.yaml2 # SPDX-License-Identifier: Apache-2.0
5 Texas Instruments Low-Power Linear 3D Hall-Effect Sensor with an I2C interface.
17 #include <zephyr/dt-bindings/sensor/tmag5273.h>
27 include: [sensor-device.yaml, i2c-device.yaml]
30 operation-mode:
38 - 0 # TMAG5273_DT_OPER_MODE_CONTINUOUS (continuous)
39 - 1 # TMAG5273_DT_OPER_MODE_STANDBY (standby)
44 enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11]
49 - 0 # TMAG5273_DT_AXIS_NONE
50 - 1 # TMAG5273_DT_AXIS_X
[all …]
/Zephyr-latest/boards/heltec/heltec_wifi_lora32_v2/
Dheltec_wifi_lora32_v2_procpu.dts4 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
9 #include "heltec_wifi_lora32_v2-pinctrl.dtsi"
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
14 model = "Heltec Wi-Fi Lora32 V2 PROCPU";
18 uart-0 = &uart0;
19 i2c-0 = &i2c0;
27 compatible = "gpio-leds";
35 label = "External VCC";
45 compatible = "gpio-keys";
[all …]
/Zephyr-latest/boards/vcc-gnd/yd_stm32h750vb/
Dyd_stm32h750vb.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h750vbtx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "VCC-GND Studio STM32H750VB";
20 spi-flash0 = &w25q128jv;
25 zephyr,shell-uart = &usart1;
28 zephyr,flash-controller = &w25q128jv;
32 compatible = "gpio-leds";
54 compatible = "gpio-keys";
[all …]
/Zephyr-latest/boards/aconno/acn52832/doc/
Dindex.rst7 nRF52832 ARM Cortex-M4F CPU and the following devices:
13 * :abbr:`I2C (Inter-Integrated Circuit)`
20 * :abbr:`UART (Universal asynchronous receiver-transmitter)`
28 Additionally to the SoC the board provides an on-board antenna with a RF matching circuit,
29 two external oscillators with 32 MHz and 32.768 kHz, load capacitors, a tag-connector
30 and a RGB-LED.
36 ------
38 +-------+-------------+--------------------+---------------+
39 | PIN # | Tag-Connect | NRF52832 Functions | Configuration |
42 +-------+-------------+--------------------+---------------+
[all …]
/Zephyr-latest/boards/seeed/lora_e5_dev_board/doc/
Dlora_e5_dev_board.rst6 The LoRa-E5 Dev Board is a compact board for the evaluation of the
7 Seeed Studio LoRa-E5 STM32WLE5JC module.
8 The LoRa-E5-HF STM32WLE5JC Module supports multiple LPWAN protocols on the
10 All GPIOs of the LoRa-E5 Module are laid out supporting
11 various data protocols and interfaces including RS-485 and Grove.
16 The boards LoRa-E5 Module packages a STM32WLE5JC SOC, a 32MHz TCXO,
17 and a 32.768kHz crystal oscillator in a 28-pin SMD package.
18 This STM32WLEJC SOC is powered by ARM Cortex-M4 core and integrates Semtech
21 - LoRa-E5 STM32WLE5JC Module with STM32WLE5JC multiprotocol LPWAN single-core
22 32-bit microcontroller (Arm® Cortex®-M4 at 48 MHz) in 28-pin SMD package
[all …]
/Zephyr-latest/boards/96boards/aerocore2/doc/
Dindex.rst10 STM32F427VIT6 Cortex-M4 CPU primarily designed for use in drones.
26 - STM32F427VIT6 in LQFP100 package
27 - ARM |reg| 32-bit Cortex |reg|-M4 CPU with FPU
28 - 168 MHz max CPU frequency
29 - VDD from 1.7 V to 3.6 V
30 - 2048 KB Flash
31 - 256 KB SRAM
32 - GPIO with external interrupt capability
33 - 12-bit ADC with 16 channels
34 - RTC
[all …]
/Zephyr-latest/boards/microchip/mec172xevb_assy6906/doc/
Dindex.rst14 - MEC172x ARM Cortex-M4 Processor
15 - 416 KB RAM and 128 KB boot ROM
16 - Keyboard interface
17 - ADC & GPIO headers
18 - UART0 and UART1
19 - FAN0, FAN1, FAN2 headers
20 - FAN PWM interface
21 - JTAG/SWD, ETM and MCHP Trace ports
22 - PECI interface 3.0
23 - I2C voltage translator
[all …]
/Zephyr-latest/boards/microchip/mec15xxevb_assy6853/doc/
Dindex.rst10 MEC150x except for an enhanced Boot-ROM SPI loader. The SPI image format has
18 - MEC1521HA0SZ ARM Cortex-M4 Processor
19 - 256 KB RAM and 64 KB boot ROM
20 - Keyboard interface
21 - ADC & GPIO headers
22 - UART0, UART1, and UART2
23 - FAN0, FAN1, FAN2 headers
24 - FAN PWM interface
25 - JTAG/SWD, ETM and MCHP Trace ports
26 - PECI interface 3.0
[all …]
/Zephyr-latest/soc/ite/ec/common/
Dchip_chipregs.h3 * SPDX-License-Identifier: Apache-2.0
48 /* --- General Control (GCTRL) --- */
52 /* RISC-V JTAG Debug Interface Enable */
54 /* RISC-V JTAG Debug Interface Selection */
67 /* --- External GPIO Control (EGPIO) --- */
240 volatile uint8_t Reserved4[3];
265 /* 0x049: PWM Output Open-Drain Enable */
274 #define IT8XXX2_PWM_T0DVS BIT(3)
280 /* --- Wake-Up Control (WUC) --- */
284 /* TODO: should a defined interface for configuring wake-up interrupts */
[all …]
/Zephyr-latest/boards/shields/atmel_rf2xx/doc/
Dindex.rst11 true SPI-to-antenna solution and can be operated by any external
20 There are compatible designations for `AT AVR-RZ600`_ and `AT REB233-XPRO`_.
21 This means, any Atmel board with 10-pin Xplained or 20-pin Xplained Pro
33 The RZ600 Development Kit needs Atmel Xplained or Xplained-Pro header
36 selected. For Xplained-Pro header the `atmel_rf2xx_legacy`_ must be enabled.
40 :alt: AVR-RZ600
45 +---------+--------+-------------------------------------+
48 | 1 | RST | GPIO - Reset |
49 +---------+--------+-------------------------------------+
50 | 2 | MISC | DNU - Do Not Use |
[all …]
/Zephyr-latest/boards/olimex/olimexino_stm32/doc/
Dindex.rst6 The OLIMEXINO-STM32 board is based on the STMicroelectronics STM32F103RB ARM
7 Cortex-M3 CPU.
10 `OLIMEXINO-STM32 website`_ and `OLIMEXINO-STM32 user manual`_.
20 +-----------+------------+-------------------------+
23 | NVIC | on-chip | nested vectored |
25 +-----------+------------+-------------------------+
26 | SYSTICK | on-chip | system clock |
27 +-----------+------------+-------------------------+
28 | UART | on-chip | serial port |
29 +-----------+------------+-------------------------+
[all …]
/Zephyr-latest/tests/unit/cbprintf/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
96 /* We can't determine at build-time whether int is 64-bit, so assume
138 /* This has to be more than 255 so we can test over-sized widths. */
158 int idx = outbuf->idx - ((outbuf->idx == outbuf->size) ? 1 : 0); in outbuf_null_terminate()
160 outbuf->buf[idx] = 0; in outbuf_null_terminate()
168 if (buf->idx < buf->size) { in out()
169 buf->buf[buf->idx++] = (char)(unsigned char)c; in out()
175 __printf_like(2, 3)
253 CBPRINTF_STATIC_PACKAGE(&package[PKG_ALIGN_OFFSET], _len - 1, \
256 zassert_equal(st_pkg_rv, -ENOSPC); \
[all …]
/Zephyr-latest/doc/hardware/peripherals/
D1-Wire_bus_topology.drawio.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- Do not edit this file with editors other than diagrams.net -->
3 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
4 …-0.5 -0.5 521 171" content="&lt;mxfile host=&quot;Electron&quot; modified=&quot;2022-07-04T19:35:4…
/Zephyr-latest/tests/drivers/sensor/adltc2990/src/
Dmain.c2 * SPDX-FileCopyrightText: Copyright (c) 2023 Carl Zeiss Meditec AG
3 * SPDX-License-Identifier: Apache-2.0
17 zassert_ok(sensor_sample_fetch_chan(fixture->dev, SENSOR_CHAN_VOLTAGE)); \
18 zassert_ok(sensor_channel_get(fixture->dev, SENSOR_CHAN_VOLTAGE, sensor_val)); \
21 (pin_voltage - 0.01f) * ((r1 + r2) / (float)r2), \
26 (double)((pin_voltage - 0.01f) * ((r1 + r2) / (float)r2)), \
31 zassert_ok(sensor_sample_fetch_chan(fixture->dev, SENSOR_CHAN_CURRENT)); \
32 zassert_ok(sensor_channel_get(fixture->dev, SENSOR_CHAN_CURRENT, sensor_val)); \
35 (pin_voltage - 0.01f) * ADLTC2990_MICROOHM_CONVERSION_FACTOR / r_microohms, \
37 "%f Out of Range [%f,%f] input %f, current-resistor: %dµΩ\nCheck if the sensor " \
[all …]
/Zephyr-latest/include/zephyr/sd/
Dsd_spec.h2 * Copyright 2022-2023 NXP
4 * SPDX-License-Identifier: Apache-2.0
32 SD_SEND_RELATIVE_ADDR = 3,
33 MMC_SEND_RELATIVE_ADDR = 3,
69 * to inform the SD card the next command is an application-specific one.
87 /* Bits 0-2 reserved */
88 SD_R1_AUTH_ERR = BIT(3),
99 /* Bits 17-18 reserved */
142 SDMMC_R1_STANDBY = 3U,
159 SD_SPI_R1CMD_CRC_ERR = BIT(3),
[all …]
/Zephyr-latest/drivers/gpio/
Dgpio_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
12 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
57 ((struct gpio_ite_data *)(dev)->data)
60 ((const struct gpio_ite_cfg *)(dev)->config)
63 * Convert wake-up controller (WUC) group to the corresponding wake-up edge
73 * From WUESR1-WUESR4, the address increases by ones. From WUESR5 on in wuesr()
77 (volatile uint8_t *)(IT8XXX2_WUC_WUESR1 + grp-1) : in wuesr()
78 (volatile uint8_t *)(IT8XXX2_WUC_WUESR5 + 4*(grp-5)); in wuesr()
82 * Convert wake-up controller (WUC) group to the corresponding wake-up edge
[all …]
/Zephyr-latest/boards/others/stm32_min_dev/doc/
Dindex.rst7 breadboard-friendly breakout board for the `STM32F103x8`_ CPU. There
10 - Blue Pill Board
11 - Black Pill Board
50 +--------+---------------+
54 +--------+---------------+
56 +--------+---------------+
58 +--------+---------------+
59 | V3 | VCC |
60 +--------+---------------+
67 silk screen on the PCB reads BX- or BX+ to indicate 0 and 1 logic lines for B0 and B1
[all …]

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