1.. zephyr:board:: mec15xxevb_assy6853 2 3Overview 4******** 5 6The MEC15xxEVB_ASSY6853 kit is a future development platform to evaluate the 7Microchip MEC15XX series microcontrollers. This board needs to be mated with 8part number MEC1501 144WFBA SOLDER DC ASSY 6860(cpu board) in order to operate. 9The MEC152x has superseded the MEC1501 in production. MEC152x is identical to 10MEC150x except for an enhanced Boot-ROM SPI loader. The SPI image format has 11been updated requiring a new SPI image tool. MEC1501 and MEC152x SPI image 12formats are not compatible with each other. Evaluation and cpu boards are 13compatible. 14 15Hardware 16******** 17 18- MEC1521HA0SZ ARM Cortex-M4 Processor 19- 256 KB RAM and 64 KB boot ROM 20- Keyboard interface 21- ADC & GPIO headers 22- UART0, UART1, and UART2 23- FAN0, FAN1, FAN2 headers 24- FAN PWM interface 25- JTAG/SWD, ETM and MCHP Trace ports 26- PECI interface 3.0 27- I2C voltage translator 28- 10 SMBUS headers 29- 4 SGPIO headers 30- VCI interface 31- 5 independent Hardware Driven PS/2 Ports 32- eSPI header 33- 3 Breathing/Blinking LEDs 34- 2 Sockets for SPI NOR chips 35- One reset and VCC_PWRDGD pushbuttons 36- One external PCA9555 I/O port with jumper selectable I2C address. 37- One external LTC2489 delta-sigma ADC with jumper selectable I2C address. 38- Board power jumper selectable from +5V 2.1mm/5.5mm barrel connector or USB Micro A connector. 39 40For more information about the SOC's please see `MEC152x Reference Manual`_ 41 42Supported Features 43================== 44 45The mec15xxevb_assy6853 board configuration supports the following hardware 46features: 47 48+-----------+------------+-------------------------------------+ 49| Interface | Controller | Driver/Component | 50+===========+============+=====================================+ 51| NVIC | on-chip | nested vector interrupt controller | 52+-----------+------------+-------------------------------------+ 53| SYSTICK | on-chip | systick | 54+-----------+------------+-------------------------------------+ 55| UART | on-chip | serial port | 56+-----------+------------+-------------------------------------+ 57| GPIO | on-chip | gpio | 58+-----------+------------+-------------------------------------+ 59| I2C | on-chip | i2c | 60+-----------+------------+-------------------------------------+ 61| PINMUX | on-chip | pinmux | 62+-----------+------------+-------------------------------------+ 63| PS/2 | on-chip | ps2 | 64+-----------+------------+-------------------------------------+ 65| KSCAN | on-chip | kscan | 66+-----------+------------+-------------------------------------+ 67| TACH | on-chip | tachometer | 68+-----------+------------+-------------------------------------+ 69 70 71 72 73Other hardware features are not currently supported by Zephyr (at the moment) 74 75The default configuration can be found in the 76:zephyr_file:`boards/microchip/mec15xxevb_assy6853/mec15xxevb_assy6853_defconfig` Kconfig file. 77 78Connections and IOs 79=================== 80 81This evaluation board kit is comprised of the following HW blocks: 82 83- MEC15xx EVB ASSY 6853 Rev A `MEC15xx EVB Schematic`_ 84- MEC1501 144WFBA SOLDER DC ASSY 6883 with MEC152x silicon `MEC1501 Daughter Card Schematic`_ 85- SPI DONGLE ASSY 6791 `SPI Dongle Schematic`_ 86 87System Clock 88============ 89 90The MEC1521 MCU is configured to use the 48Mhz internal oscillator with the 91on-chip PLL to generate a resulting EC clock rate of 12 MHz. See Processor clock 92control register in chapter 4 "4.0 POWER, CLOCKS, and RESETS" of the data sheet in 93the references at the end of this document. 94 95Serial Port 96=========== 97 98UART2 is configured for serial logs. 99 100Jumper settings 101*************** 102 103Please follow the jumper settings below to properly demo this 104board. Advanced users may deviate from this recommendation. 105 106Jumper setting for MEC15xx EVB Assy 6853 Rev A1p0 107================================================= 108 109Power-related jumpers 110--------------------- 111 112If you wish to power from +5V power brick, then connect to barrel connector ``P11`` 113(5.5mm OD, 2.1mm ID) and move the jumper to ``JP88 5-6``. 114 115If you wish to power from micro-USB type A/B connector ``P12``, move the 116jumper to ``JP88 7-8``. 117 118 119.. note:: A single jumper is required in JP88. 120 121+-------+------+------+------+------+------+------+------+------+------+------+ 122| JP22 | JP32 | JP33 | JP37 | JP43 | JP47 | JP54 | JP56 | JP58 | JP64 | JP65 | 123+=======+======+======+======+======+======+======+======+======+======+======+ 124| 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 125+-------+------+------+------+------+------+------+------+------+------+------+ 126 127+------+------+------+------+------+------+------+------+------+------+ 128| JP72 | JP73 | JP76 | JP79 | JP80 | JP81 | JP82 | JP84 | JP87 | JP89 | 129+======+======+======+======+======+======+======+======+======+======+ 130| 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 1-2 | 131+------+------+------+------+------+------+------+------+------+------+ 132 133+------+------+-------+-------+-------+ 134| JP90 | JP91 | JP100 | JP101 | JP118 | 135+======+======+=======+=======+=======+ 136| 1-2 | 1-2 | 1-2 | 1-2 | 2-3 | 137+------+------+-------+-------+-------+ 138 139These jumpers configure VCC Power good, nRESETI and JTAG_STRAP respectively. 140 141+------------------+-----------+--------------+ 142| JP5 | JP4 | JP45 | 143| (VCC Power good) | (nRESETI) | (JTAG_STRAP) | 144+==================+===========+==============+ 145| 1-2 | 1-2 | 2-3 | 146+------------------+-----------+--------------+ 147 148Boot-ROM Straps. 149---------------- 150 151These jumpers configure MEC1501 Boot-ROM straps. 152 153+-------------+------------+--------------+-------------+ 154| JP93 | JP11 | JP46 | JP96 | 155| (CMP_STRAP) | (CR_STRAP) | (VTR2_STRAP) | (BSS_STRAP) | 156+=============+============+==============+=============+ 157| 2-3 | 1-2 | 2-3 | 1-2 | 158+-------------+------------+--------------+-------------+ 159 160``JP96 1-2`` pulls SHD SPI CS0# up to VTR2. MEC1501 Boot-ROM samples 161SHD SPI CS0# and if high, it loads code from SHD SPI. 162 163Peripheral Routing Jumpers 164-------------------------- 165 166Each column of the following table illustrates how to enable UART2, SWD, 167PVT SPI, SHD SPI and LED0-2 respectively. 168 169+----------+----------+--------+-----------+----------+---------+ 170| JP48 | JP9 | JP9 | JP38 | JP98 | JP41 | 171| (UART2) | (UART2) | (SWD) | (PVT SPI) | (SHD SPI)| (LED0-2)| 172+==========+==========+========+===========+==========+=========+ 173| 1-2 | | 2-3 | 2-3 | 2-3 | 1-2 | 174+----------+----------+--------+-----------+----------+---------+ 175| 4-5 | 4-5 | | 5-6 | 5-6 | 3-4 | 176+----------+----------+--------+-----------+----------+---------+ 177| 7-8 | | 8-9 | 8-9 | 8-9 | 5-6 | 178+----------+----------+--------+-----------+----------+---------+ 179| 10-11 | 10-11 | | 11-12 | 11-12 | | 180+----------+----------+--------+-----------+----------+---------+ 181| | | | 14-15 | 14-15 | | 182+----------+----------+--------+-----------+----------+---------+ 183| | | | 17-18 | 20-21 | | 184+----------+----------+--------+-----------+----------+---------+ 185 186.. note:: For UART2 make sure JP39 have jumpers connected 1-2, 3-4. 187 188To receive UART2 serial output, please refer to the picture below 189to make sure that JP9 configured for UART2 output. 190 191.. image:: mec15xxevb_assy6853_jp9_1.jpg 192 :align: center 193 :alt: JP9 header Assy6853 194 195Jumper settings for MEC1501 144WFBGA Socket DC Assy 6883 Rev B1p0 196================================================================= 197 198The jumper configuration explained above covers the base board. The ASSY 1996883 MEC1501 CPU board provides capability for an optional, external 32KHz 200clock source. The card includes a 32KHz crystal oscillator. The card can 201also be configured to use an external 50% duty cycle 32KHz source on the 202XTAL2/32KHZ_IN pin. Note, firmware must set the MEC15xx clock enable 203register to select the external source matching the jumper settings. If 204using the MEC15xx internal silicon oscillator then the 32K jumper settings 205are don't cares. ``JP1`` is for scoping test clock outputs. Please refer to 206the schematic in reference section below. 207 208Parallel 32KHz crystal configuration 209------------------------------------ 210+-------+-------+ 211| JP2 | JP3 | 212+=======+=======+ 213| 1-2 | 2-3 | 214+-------+-------+ 215 216External 32KHz 50% duty cycle configuration 217------------------------------------------- 218+-------+-------+ 219| JP2 | JP3 | 220+=======+=======+ 221| NC | 1-2 | 222+-------+-------+ 223 224 225Jumper settings for MEC1503 144WFBGA Socket DC Assy 6856 Rev B1p0 226================================================================= 227 228The MEC1503 ASSY 6856 CPU card does not include an onboard external 22932K crystal or oscillator. The one jumper block ``JP1`` is for scoping 230test clock outputs not for configuration. Please refer to schematic 231in reference section below. 232 233Programming and Debugging 234************************* 235 236Setup 237===== 238#. If you use Dediprog SF100 programmer, then setup it. 239 240 Windows version can be found at the `SF100 Product page`_. 241 242 Linux version source code can be found at `SF100 Linux GitHub`_. 243 Follow the `SF100 Linux manual`_ to complete setup of the SF100 programmer. 244 For Linux please make sure that you copied ``60-dediprog.rules`` 245 from the ``SF100Linux`` folder to the :code:`/etc/udev/rules.s` (or rules.d) 246 then restart service using: 247 248 .. code-block:: console 249 250 $ udevadm control --reload 251 252 Add directory with program ``dpcmd`` (on Linux) 253 or ``dpcmd.exe`` (on Windows) to your ``PATH``. 254 255#. Clone the `MEC152x SPI Image Gen`_ repository or download the files within 256 that directory. For the pre-production MEC150x use `MEC150x SPI Image Gen`_ 257 repository. 258 259#. Make the image generation available for Zephyr, by making the tool 260 searchable by path, or by setting an environment variable 261 ``EVERGLADES_SPI_GEN``, for example: 262 263 .. code-block:: console 264 265 export EVERGLADES_SPI_GEN=<path to tool>/everglades_spi_gen_RomE 266 267 Note that the tools for Linux and Windows have different file names. 268 For the pre-production MEC1501 SOC use everglades_spi_gen_lin64. 269 270#. If needed, a custom SPI image configuration file can be specified 271 to override the default one. 272 273 .. code-block:: console 274 275 export EVERGLADES_SPI_CFG=custom_spi_cfg.txt 276 277Wiring 278======== 279#. Connect the SPI Dongle ASSY 6791 to ``J44`` in the EVB. 280 281 .. image:: spidongle_assy6791_view1.jpg 282 :align: center 283 :alt: SPI DONGLE ASSY 6791 Connected 284 285#. Connect programmer to the header J6 on the Assy6791 board, it will flash the SPI NOR chip ``U3`` 286 Make sure that your programmer's offset is 0x0. 287 For programming you can use Dediprog SF100 or a similar tool for flashing SPI chips. 288 289 .. list-table:: Microchip board wiring 290 :align: center 291 292 * - 293 .. image:: spidongle_assy6791.jpg 294 :align: center 295 :alt: SPI DONGLE ASSY 6791 296 297 - 298 .. image:: spidongle_assy6791_view2.jpg 299 :align: center 300 :alt: SPI DONGLE ASSY 6791 view 2 301 302 | 303 304 .. image:: dediprog_connector_2.jpg 305 :align: center 306 :alt: SPI DONGLE ASSY 6791 Connected 307 308 309 .. note:: Remember that SPI MISO/MOSI are swapped on Dediprog headers! 310 Use separate wires to connect Dediprog pins with pins on the Assy6791 SPI board. 311 Wiring connection is described in the table below. 312 313 +------------+---------------+ 314 | Dediprog | Assy6791 | 315 | Connector | J6 Connector | 316 +============+===============+ 317 | VCC | 1 | 318 +------------+---------------+ 319 | GND | 2 | 320 +------------+---------------+ 321 | CS | 3 | 322 +------------+---------------+ 323 | CLK | 4 | 324 +------------+---------------+ 325 | MISO | 6 | 326 +------------+---------------+ 327 | MOSI | 5 | 328 +------------+---------------+ 329 330#. Connect UART2 port of the MEC15xxEVB_ASSY_6853 board 331 to your host computer using the RS232 cable. 332 333#. Apply power to the board via a micro-USB cable. 334 Configure this option by using a jumper between ``JP88 7-8``. 335 336 .. image:: jp88_power_options.jpg 337 :align: center 338 :alt: SPI DONGLE ASSY 6791 Connected 339 340#. Final wiring for the board should look like this: 341 342 .. image:: mec_board_setup.jpg 343 :align: center 344 :alt: SPI DONGLE ASSY 6791 Connected 345 346Building 347======== 348#. Build :zephyr:code-sample:`hello_world` application as you would normally do. 349 350#. The file :file:`spi_image.bin` will be created if the build system 351 can find the image generation tool. This binary image can be used 352 to flash the SPI chip. 353 354Flashing 355======== 356#. Run your favorite terminal program to listen for output. 357 Under Linux the terminal should be :code:`/dev/ttyUSB0`. Do not close it. 358 359 For example: 360 361 .. code-block:: console 362 363 $ minicom -D /dev/ttyUSB0 -o 364 365 The -o option tells minicom not to send the modem initialization 366 string. Connection should be configured as follows: 367 368 - Speed: 115200 369 - Data: 8 bits 370 - Parity: None 371 - Stop bits: 1 372 373#. Flash your board using ``west`` from the second terminal window. 374 Split first and second terminal windows to view both of them. 375 376 .. code-block:: console 377 378 $ west flash 379 380 .. note:: When west process started press Reset button and do not release it 381 till the whole west process will not be finished successfully. 382 383 .. image:: reset_button_1.jpg 384 :align: center 385 :alt: SPI DONGLE ASSY 6791 Connected 386 387 388 .. note:: If you don't want to press Reset button every time, you can disconnect 389 SPI Dongle ASSY 6791 from the EVB during the west flash programming. 390 Then connect it back to the ``J44`` header and apply power to the EVB. 391 Result will be the same. 392 393 394#. You should see ``"Hello World! mec15xxevb_assy6853"`` in the first terminal window. 395 If you don't see this message, press the Reset button and the message should appear. 396 397Debugging 398========= 399This board comes with a Cortex ETM port which facilitates tracing and debugging 400using a single physical connection. In addition, it comes with sockets for 401JTAG only sessions. 402 403Troubleshooting 404=============== 405#. In case you don't see your application running, please make sure ``LED7``, ``LED8``, and ``LED1`` 406 are lit. If one of these is off, then check the power-related jumpers again. 407 408#. If you can't program the board using Dediprog, disconnect the Assy6791 409 from the main board Assy6853 and try again. 410 411#. If Dediprog can't detect the onboard flash, press the board's Reset button and try again. 412 413Notes 414===== 415#. To enable PCA9555PW and test the I2C on mec15xxevb_assy6853, additional works are needed: 416 417 As the I2C slave device NXP pca95xx on mec15xxevb_assy6853 is connected to I2C00 port, 418 however, I2C00 port is shared with UART2 RS232 to TTL converter used to catch serial log, 419 so it's not possible to use UART2 and I2C00 port simultaneously. We need to change to use 420 I2C01 port by making some jumpers setting as below: 421 422 * JP99 1-2 Connected Connect I2C01_SDA from CPU to header J5 423 * JP99 13-14 Connected Connect I2C01_SCL from CPU to header J5 424 * JP25 21-22 Connected External pull-up for I2C01_SDA 425 * JP25 23-24 Connected External pull-up for I2C01_SCL 426 * 427 * JP44.1 J5.1 Connected Connect NXP PCA95xx to I2C01 428 * JP44.3 J5.3 Connected Connect NXP PCA95xx to I2C01 429 430 431References 432********** 433.. target-notes:: 434 435.. _MEC1501 Preliminary Data Sheet: 436 https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1501_Datasheet.pdf 437.. _MEC1501 Reference Manual: 438 https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1501_Datasheet.pdf 439.. _MEC152x Preliminary Data Sheet: 440 https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC152x/MEC152x_Datasheet.pdf 441.. _MEC152x Reference Manual: 442 https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC152x/MEC152x_Datasheet.pdf 443.. _MEC15xx EVB Schematic: 444 https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/Everglades%20EVB%20-%20Assy_6853%20Rev%20A1p1%20-%20SCH.pdf 445.. _MEC1501 Daughter Card Schematic: 446 https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1501%20Socket%20DC%20for%20EVERGLADES%20EVB%20-%20Assy_6883%20Rev%20A0p1%20-%20SCH.pdf 447.. _MEC1503 Daughter Card Schematic: 448 https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/MEC1503%20Socket%20DC%20for%20EVERGLADES%20EVB%20-%20Assy_6856%20Rev%20A1p0%20-%20SCH.pdf 449.. _SPI Dongle Schematic: 450 https://github.com/MicrochipTech/CPGZephyrDocs/blob/master/MEC1501/SPI%20Dongles%20and%20Aardvark%20Interposer%20Assy%206791%20Rev%20A1p1%20-%20SCH.pdf 451.. _MEC152x SPI Image Gen: 452 https://github.com/MicrochipTech/CPGZephyrDocs/tree/master/MEC152x/SPI_image_gen 453.. _MEC150x SPI Image Gen: 454 https://github.com/MicrochipTech/CPGZephyrDocs/tree/master/MEC1501/SPI_image_gen 455.. _SF100 Linux GitHub: 456 https://github.com/DediProgSW/SF100Linux 457.. _SF100 Product page: 458 https://www.dediprog.com/product/SF100 459.. _SF100 Linux manual: 460 https://www.dediprog.com/download/save/727.pdf 461
