1.. zephyr:board:: stm32_min_dev 2 3Overview 4******** 5 6The STM32 Minimum Development Board, is a popular and inexpensive 7breadboard-friendly breakout board for the `STM32F103x8`_ CPU. There 8are two variants of the board: 9 10- Blue Pill Board 11- Black Pill Board 12 13Zephyr applications can use the stm32_min_dev@blue or stm32_min_dev@black board 14configuration to use these boards. 15 16As the name suggests, these boards have the bare minimum components required to 17power on the CPU. For practical use, you'll need to add additional components 18and circuits using a breadboard, for example. 19 20Pin Mapping 21=========== 22 23This port is a starting point for your own customizations and not a complete 24port for a specific board. Most of the GPIOs on the STM32 SoC has been exposed 25in the external header with silk screen labels that match the SoC's pin names. 26 27Each board vendor has their own variations in pin mapping on their boards' 28external connectors and placement of components. Many vendors use port PC13/PB12 29for connecting an LED, so only this device is supported by our Zephyr port. 30Additional device support is left for the user to implement. 31 32More information on hooking up peripherals and lengthy how to articles can be 33found at `EmbedJournal`_. 34 35The pinout diagram of STM32 Minimum Development Blue Pill board can be seen 36below. The Black Pill's one is similar: 37 38.. figure:: img/stm32_min_dev_pinout_blue.jpg 39 :align: center 40 :alt: Pinout for STM32 Minimum Development Blue Pill Board 41 42 Pinout for STM32 Minimum Development Blue Pill Board 43 44 45STLinkV2 connection: 46==================== 47 48The board can be flashed by using STLinkV2 with the following connections. 49 50+--------+---------------+ 51| Pin | STLINKv2 | 52+========+===============+ 53| G | GND | 54+--------+---------------+ 55| CLK | Clock | 56+--------+---------------+ 57| IO | SW IO | 58+--------+---------------+ 59| V3 | VCC | 60+--------+---------------+ 61 62Boot Configuration 63================== 64 65The boot configuration for this board is configured through jumpers on B0 (Boot 0) 66and B1 (Boot 1). The pins B0 and B1 are present in between logic 0 and 1 lines. The 67silk screen on the PCB reads BX- or BX+ to indicate 0 and 1 logic lines for B0 and B1 68respectively. 69 70+--------+--------+-------------------+---------------------------------------------+ 71| Boot 1 | Boot 0 | Boot Mode | Aliasing | 72+========+========+===================+=============================================+ 73| X | 0 | Main Flash Memory | Main flash memory is selected as boot space | 74+--------+--------+-------------------+---------------------------------------------+ 75| 0 | 1 | System Memory | System memory is selected as boot space | 76+--------+--------+-------------------+---------------------------------------------+ 77| 1 | 1 | Embedded SRAM | Embedded SRAM is selected as boot space | 78+--------+--------+-------------------+---------------------------------------------+ 79 80 81Supported Features 82================== 83 84The stm32_min_dev board configuration supports the following hardware features: 85 86+-----------+------------+----------------------+ 87| Interface | Controller | Driver/Component | 88+===========+============+======================+ 89| NVIC | on-chip | nested vectored | 90| | | interrupt controller | 91+-----------+------------+----------------------+ 92| SYSTICK | on-chip | system clock | 93+-----------+------------+----------------------+ 94| UART | on-chip | serial port | 95+-----------+------------+----------------------+ 96| GPIO | on-chip | gpio | 97+-----------+------------+----------------------+ 98| I2C | on-chip | i2c | 99+-----------+------------+----------------------+ 100| PWM | on-chip | pwm | 101+-----------+------------+----------------------+ 102| SPI | on-chip | spi | 103+-----------+------------+----------------------+ 104| USB | on-chip | USB device | 105+-----------+------------+----------------------+ 106| ADC | on-chip | adc | 107+-----------+------------+----------------------+ 108 109Other hardware features have not been enabled yet for this board. 110 111Connections and IOs 112=================== 113 114Default Zephyr Peripheral Mapping: 115---------------------------------- 116 117- UART_1 TX/RX: PA9/PA10 118- UART_2 TX/RX: PA2/PA3 119- UART_3 TX/RX: PB10/PB11 120- I2C_1 SCL/SDA : PB6/PB7 121- I2C_2 SCL/SDA : PB10/PB11 122- PWM_1_CH1: PA8 123- SPI_1 NSS_OE/SCK/MISO/MOSI: PA4/PA5/PA6/PA7 124- SPI_2 NSS_OE/SCK/MISO/MOSI: PB12/PB13/PB14/PB15 125- USB_DC DM/DP: PA11/PA12 126- ADC_1: PA0 127 128System Clock 129------------ 130 131The on-board 8Mhz crystal is used to produce a 72Mhz system clock with PLL. 132 133Serial Port 134----------- 135 136STM32 Minimum Development Board has 3 U(S)ARTs. The Zephyr console output is 137assigned to UART_1. Default settings are 115200 8N1. 138 139On-Board LEDs 140------------- 141 142The board has one on-board LED that is connected to PB12/PC13 on the black/blue 143variants respectively. 144 145Programming and Debugging 146************************* 147 148Applications for the ``stm32_min_dev@(blue|black)`` board configuration can be 149built and flashed in the usual way (see :ref:`build_an_application` and 150:ref:`application_run` for more details). 151 152Flashing 153======== 154 155Here is an example for the :zephyr:code-sample:`blinky` application. 156 157.. zephyr-app-commands:: 158 :zephyr-app: samples/basic/blinky 159 :board: stm32_min_dev 160 :goals: build flash 161 162Debugging 163========= 164 165You can debug an application in the usual way. Here is an example for the 166:zephyr:code-sample:`hello_world` application. 167 168.. zephyr-app-commands:: 169 :zephyr-app: samples/hello_world 170 :board: stm32_min_dev 171 :maybe-skip-config: 172 :goals: debug 173 174.. _STM32F103x8: 175 https://www.st.com/resource/en/datasheet/stm32f103c8.pdf 176.. _EmbedJournal: 177 https://embedjournal.com/tag/stm32-min-dev/ 178