1/*
2 * Copyright(c) 2024 John Sanpe <sanpeqf@gmail.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/h7/stm32h750Xb.dtsi>
9#include <st/h7/stm32h750vbtx-pinctrl.dtsi>
10#include <zephyr/dt-bindings/input/input-event-codes.h>
11
12/ {
13	model = "VCC-GND Studio STM32H750VB";
14	compatible = "st,stm32h750vb";
15
16	aliases {
17		led0 = &yellow_led;
18		led1 = &blue_led;
19		sw0 = &user_button;
20		spi-flash0 = &w25q128jv;
21	};
22
23	chosen {
24		zephyr,console = &usart1;
25		zephyr,shell-uart = &usart1;
26		zephyr,sram = &sram0;
27		zephyr,flash = &flash0;
28		zephyr,flash-controller = &w25q128jv;
29	};
30
31	leds {
32		compatible = "gpio-leds";
33		red_led: led_1 {
34			gpios = <&gpioa 13 GPIO_ACTIVE_HIGH>;
35			label = "LED1";
36			status = "disabled";
37		};
38		green_led: led_2 {
39			gpios = <&gpioa 14 GPIO_ACTIVE_HIGH>;
40			label = "LED2";
41			status = "disabled";
42		};
43		yellow_led: led_3 {
44			gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
45			label = "LED3";
46		};
47		blue_led: led_4 {
48			gpios = <&gpiob 4 GPIO_ACTIVE_HIGH>;
49			label = "LED4";
50		};
51	};
52
53	gpio_keys {
54		compatible = "gpio-keys";
55		user_button: button {
56			gpios = <&gpiob 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
57			zephyr,code = <INPUT_KEY_0>;
58			label = "USR";
59		};
60	};
61};
62
63&clk_hse {
64	clock-frequency = <DT_FREQ_M(25)>;
65	status = "okay";
66};
67
68&clk_lse {
69	status = "okay";
70};
71
72&pll {
73	div-m = <5>;
74	mul-n = <192>;
75	div-p = <2>;
76	div-q = <4>;
77	div-r = <4>;
78	clocks = <&clk_hse>;
79	status = "okay";
80};
81
82&rcc {
83	clocks = <&pll>;
84	clock-frequency = <DT_FREQ_M(480)>;
85	d1cpre = <1>;
86	hpre = <2>;
87	d1ppre = <2>;
88	d2ppre1 = <2>;
89	d2ppre2 = <2>;
90	d3ppre = <2>;
91};
92
93&usart1 {
94	pinctrl-names = "default";
95	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
96	current-speed = <115200>;
97	status = "okay";
98};
99
100&sdmmc1 {
101	pinctrl-names = "default";
102	pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
103		     &sdmmc1_d2_pc10 &sdmmc1_d3_pc11
104		     &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
105	cd-gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
106	status = "okay";
107};
108
109&quadspi {
110	pinctrl-names = "default";
111	pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb10
112		     &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12
113		     &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>;
114	status = "okay";
115
116	w25q128jv: qspi-nor-flash@90000000 {
117		compatible = "st,stm32-qspi-nor";
118		reg = <0x90000000 DT_SIZE_M(16)>;
119		qspi-max-frequency = <80000000>;
120		spi-bus-width = <4>;
121		status = "okay";
122
123		partitions {
124			compatible = "fixed-partitions";
125			#address-cells = <1>;
126			#size-cells = <1>;
127
128			storage_partition: partition@0 {
129				label = "storage";
130				reg = <0x0 DT_SIZE_M(16)>;
131			};
132		};
133	};
134};
135