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/Zephyr-latest/dts/arm/st/f2/
Dstm32f207.dtsi19 clocks = <&rcc STM32_CLOCK(AHB1, 25U)>,
20 <&rcc STM32_CLOCK(AHB1, 26U)>,
21 <&rcc STM32_CLOCK(AHB1, 27U)>,
22 <&rcc STM32_CLOCK(AHB1, 28U)>;
Dstm32f2.dtsi132 clocks = <&rcc STM32_CLOCK(AHB1, 0U)>;
140 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
148 clocks = <&rcc STM32_CLOCK(AHB1, 2U)>;
156 clocks = <&rcc STM32_CLOCK(AHB1, 3U)>;
164 clocks = <&rcc STM32_CLOCK(AHB1, 4U)>;
172 clocks = <&rcc STM32_CLOCK(AHB1, 5U)>;
180 clocks = <&rcc STM32_CLOCK(AHB1, 6U)>;
188 clocks = <&rcc STM32_CLOCK(AHB1, 7U)>;
196 clocks = <&rcc STM32_CLOCK(AHB1, 8U)>;
387 clocks = <&rcc STM32_CLOCK(AHB1, 21U)>;
[all …]
/Zephyr-latest/dts/arm/st/f4/
Dstm32f407.dtsi19 clocks = <&rcc STM32_CLOCK(AHB1, 25U)>,
20 <&rcc STM32_CLOCK(AHB1, 26U)>,
21 <&rcc STM32_CLOCK(AHB1, 27U)>,
22 <&rcc STM32_CLOCK(AHB1, 28U)>;
Dstm32f4.dtsi163 clocks = <&rcc STM32_CLOCK(AHB1, 0U)>;
171 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
179 clocks = <&rcc STM32_CLOCK(AHB1, 2U)>;
187 clocks = <&rcc STM32_CLOCK(AHB1, 3U)>;
195 clocks = <&rcc STM32_CLOCK(AHB1, 4U)>;
203 clocks = <&rcc STM32_CLOCK(AHB1, 5U)>;
211 clocks = <&rcc STM32_CLOCK(AHB1, 6U)>;
219 clocks = <&rcc STM32_CLOCK(AHB1, 7U)>;
564 clocks = <&rcc STM32_CLOCK(AHB1, 21U)>;
573 clocks = <&rcc STM32_CLOCK(AHB1, 22U)>;
Dstm32f405.dtsi26 clocks = <&rcc STM32_CLOCK(AHB1, 5U)>;
34 clocks = <&rcc STM32_CLOCK(AHB1, 6U)>;
42 clocks = <&rcc STM32_CLOCK(AHB1, 8U)>;
203 clocks = <&rcc STM32_CLOCK(AHB1, 29U)>,
239 clocks = <&rcc STM32_CLOCK(AHB1, 18U)>;
Dstm32f427.dtsi23 clocks = <&rcc STM32_CLOCK(AHB1, 9U)>;
31 clocks = <&rcc STM32_CLOCK(AHB1, 10U)>;
/Zephyr-latest/dts/arm/st/f1/
Dstm32f107.dtsi17 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
28 clocks = <&rcc STM32_CLOCK(AHB1, 14U)>,
29 <&rcc STM32_CLOCK(AHB1, 15U)>,
30 <&rcc STM32_CLOCK(AHB1, 16U)>;
/Zephyr-latest/dts/arm/st/g0/
Dstm32g0_crypt.dtsi16 clocks = <&rcc STM32_CLOCK(AHB1, 16U)>;
17 resets = <&rctl STM32_RESET(AHB1, 16U)>;
26 clocks = <&rcc STM32_CLOCK(AHB1, 18U)>;
/Zephyr-latest/dts/arm/st/f7/
Dstm32f745.dtsi35 clocks = <&rcc STM32_CLOCK(AHB1, 9U)>;
43 clocks = <&rcc STM32_CLOCK(AHB1, 10U)>;
84 clocks = <&rcc STM32_CLOCK(AHB1, 25U)>,
85 <&rcc STM32_CLOCK(AHB1, 26U)>,
86 <&rcc STM32_CLOCK(AHB1, 27U)>,
87 <&rcc STM32_CLOCK(AHB1, 28U)>;
Dstm32f765.dtsi37 clocks = <&rcc STM32_CLOCK(AHB1, 9U)>;
45 clocks = <&rcc STM32_CLOCK(AHB1, 10U)>;
77 clocks = <&rcc STM32_CLOCK(AHB1, 25U)>,
78 <&rcc STM32_CLOCK(AHB1, 26U)>,
79 <&rcc STM32_CLOCK(AHB1, 27U)>,
80 <&rcc STM32_CLOCK(AHB1, 28U)>;
Dstm32f7.dtsi172 clocks = <&rcc STM32_CLOCK(AHB1, 0U)>;
180 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
188 clocks = <&rcc STM32_CLOCK(AHB1, 2U)>;
196 clocks = <&rcc STM32_CLOCK(AHB1, 3U)>;
204 clocks = <&rcc STM32_CLOCK(AHB1, 4U)>;
212 clocks = <&rcc STM32_CLOCK(AHB1, 5U)>;
220 clocks = <&rcc STM32_CLOCK(AHB1, 6U)>;
228 clocks = <&rcc STM32_CLOCK(AHB1, 7U)>;
236 clocks = <&rcc STM32_CLOCK(AHB1, 8U)>;
729 clocks = <&rcc STM32_CLOCK(AHB1, 29U)>,
[all …]
/Zephyr-latest/dts/arm/st/f3/
Dstm32f302Xc.dtsi26 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
45 clocks = <&rcc STM32_CLOCK(AHB1, 21U)>;
Dstm32f3.dtsi82 clocks = <&rcc STM32_CLOCK(AHB1, 4U)>;
134 clocks = <&rcc STM32_CLOCK(AHB1, 17U)>;
142 clocks = <&rcc STM32_CLOCK(AHB1, 18U)>;
150 clocks = <&rcc STM32_CLOCK(AHB1, 19U)>;
158 clocks = <&rcc STM32_CLOCK(AHB1, 20U)>;
166 clocks = <&rcc STM32_CLOCK(AHB1, 22U)>;
432 clocks = <&rcc STM32_CLOCK(AHB1, 0U)>;
Dstm32f373Xc.dtsi25 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
Dstm32f303.dtsi71 clocks = <&rcc STM32_CLOCK(AHB1, 21U)>;
146 clocks = <&rcc STM32_CLOCK(AHB1, 28U)>;
163 clocks = <&rcc STM32_CLOCK(AHB1, 28U)>;
Dstm32f303Xe.dtsi32 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
Dstm32f303Xb.dtsi32 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
Dstm32f334.dtsi34 clocks = <&rcc STM32_CLOCK(AHB1, 28U)>;
/Zephyr-latest/dts/arm/st/f0/
Dstm32f0.dtsi89 clocks = <&rcc STM32_CLOCK(AHB1, 4U)>;
137 clocks = <&rcc STM32_CLOCK(AHB1, 17U)>;
145 clocks = <&rcc STM32_CLOCK(AHB1, 18U)>;
153 clocks = <&rcc STM32_CLOCK(AHB1, 19U)>;
161 clocks = <&rcc STM32_CLOCK(AHB1, 20U)>;
169 clocks = <&rcc STM32_CLOCK(AHB1, 22U)>;
359 clocks = <&rcc STM32_CLOCK(AHB1, 0U)>;
/Zephyr-latest/dts/arm/st/l1/
Dstm32l1.dtsi89 clocks = <&rcc STM32_CLOCK(AHB1, 15U)>;
400 clocks = <&rcc STM32_CLOCK(AHB1, 0U)>;
408 clocks = <&rcc STM32_CLOCK(AHB1, 1U)>;
416 clocks = <&rcc STM32_CLOCK(AHB1, 2U)>;
424 clocks = <&rcc STM32_CLOCK(AHB1, 3U)>;
432 clocks = <&rcc STM32_CLOCK(AHB1, 4U)>;
440 clocks = <&rcc STM32_CLOCK(AHB1, 5U)>;
467 clocks = <&rcc STM32_CLOCK(AHB1, 24U)>;
/Zephyr-latest/dts/bindings/clock/
Dst,stm32wba-rcc.yaml82 Common AHB1, AHB2, AHB4 prescaler. Defines actual core clock frequency
84 The HCLK clocks CPU, AHB1, AHB2, memories and DMA.
Dst,stm32wb-rcc.yaml37 The HCLK1 clocks CPU1, AHB1, AHB2, AHB3 and SRAM1.
/Zephyr-latest/dts/arm/st/h7/
Dstm32h745.dtsi57 clocks = <&rcc STM32_CLOCK(AHB1, 25U)>,
71 clocks = <&rcc STM32_CLOCK(AHB1, 27U)>,
/Zephyr-latest/dts/arm/st/l0/
Dstm32l072.dtsi44 clocks = <&rcc STM32_CLOCK(AHB1, 20U)>;
/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dgd32l23x.h28 /* AHB1 peripherals */

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